ARM: tegra12: dvfs: Set CPU rate limit to 2.2GHz
Alex Frid [Thu, 13 Mar 2014 21:40:01 +0000 (14:40 -0700)]
Set CPU rate limit to 2.2GHz for Tegra12 sku 0x27.

Bug 1475295

Change-Id: Ia96011bf398dfb35721b201bd799ea66e9cdf78e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/381750
(cherry picked from commit f703fdc9373905a82437f673ab557c32ac63c59c)
Reviewed-on: http://git-master/r/422544
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

arch/arm/mach-tegra/tegra12_dvfs.c
arch/arm/mach-tegra/tegra12_edp.c
arch/arm/mach-tegra/tegra12_speedo.c

index 6064b0d..d2fbb8d 100644 (file)
@@ -141,8 +141,8 @@ void __init tegra12x_vdd_cpu_align(int step_uv, int offset_uv)
 
 /* CPU DVFS tables */
 static unsigned long cpu_max_freq[] = {
-/* speedo_id   0        1        2        3      */
-               2014500, 2320500, 2116500, 2524500,
+/* speedo_id   0        1        2        3        4        5       */
+               2014500, 2320500, 2116500, 2524500, 1500000, 2218500,
 };
 
 static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
index 91570e0..10d6ec9 100644 (file)
@@ -272,6 +272,10 @@ static struct tegra_edp_cpu_leakage_params t12x_leakage_params[] = {
                .cpu_speedo_id      = 3, /* Prod SKU */
                EDP_PARAMS_COMMON_PART,
        },
+       {
+               .cpu_speedo_id      = 5, /* Prod SKU */
+               EDP_PARAMS_COMMON_PART,
+       },
 };
 
 #ifdef CONFIG_TEGRA_GPU_EDP
index 92244be..b5862a7 100644 (file)
@@ -106,7 +106,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku)
        case 0x1F:
        case 0x87:
        case 0x27:
-               cpu_speedo_id = 2;
+               cpu_speedo_id = sku == 0x27 ? 5 : 2;
                soc_speedo_id = 0;
                gpu_speedo_id = 1;
                threshold_index = 0;