ARM: tegra: t14x: Clear DPD_ENABLE on LP0 exit
Seshendra Gadagottu [Fri, 18 Jan 2013 01:09:16 +0000 (17:09 -0800)]
T14X core power management code needs to clear
PMC_DPD_ENABLE during LP0 exit.

Bug 1193188

Change-Id: I852194e3a88cf2b08589affa91ea4710ef8df337
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/192226
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arch/arm/mach-tegra/pm.c

index b0d3efe..c40fdc1 100644 (file)
@@ -140,6 +140,9 @@ struct suspend_context tegra_sctx;
 #define PMC_DPAD_ORIDE         0x1C
 #define PMC_WAKE_DELAY         0xe0
 #define PMC_DPD_SAMPLE         0x20
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+#define PMC_DPD_ENABLE         0x24
+#endif
 #define PMC_IO_DPD_REQ          0x1B8
 #define PMC_IO_DPD2_REQ         0x1C0
 
@@ -763,6 +766,11 @@ static void tegra_common_resume(void)
        /* Clear DPD sample */
        writel(0x0, pmc + PMC_DPD_SAMPLE);
 
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+       /* Clear DPD Enable */
+       writel(0x0, pmc + PMC_DPD_ENABLE);
+#endif
+
        writel(tegra_sctx.mc[0], mc + MC_SECURITY_START);
        writel(tegra_sctx.mc[1], mc + MC_SECURITY_SIZE);
        writel(tegra_sctx.mc[2], mc + MC_SECURITY_CFG2);