video: tegra: dsi: Added Mipi calibration clock entry
Vineel Kumar Reddy Kovvuri [Tue, 2 Jul 2013 10:55:47 +0000 (15:55 +0530)]
Added mipi-cal-fixed entry in tegra12 clocks file

Change-Id: I78b504aa7c9428c615ff6fb6013099bf2fe5ff53
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/244281
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

arch/arm/mach-tegra/tegra12_clocks.c

index 88fb498..053e410 100644 (file)
@@ -6861,6 +6861,7 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("i2c5-fast", "tegra14-i2c.4",        "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
        PERIPH_CLK("i2c6-fast", "tegra14-i2c.5",        "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
        PERIPH_CLK("mipi-cal",  "mipi-cal",             NULL,   56,     0,      60000000,  mux_clk_m,   0),
+       PERIPH_CLK("mipi-cal-fixed", "mipi-cal-fixed",  NULL,   0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
        PERIPH_CLK("uarta",     "serial-tegra.0",               NULL,   6,      0x178,  800000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
        PERIPH_CLK("uartb",     "serial-tegra.1",               NULL,   7,      0x17c,  800000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
        PERIPH_CLK("uartc",     "serial-tegra.2",               NULL,   55,     0x1a0,  800000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),