Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Linus Torvalds [Thu, 2 May 2013 16:28:03 +0000 (09:28 -0700)]
Pull ARM SoC device-tree updates from Olof Johansson:
 "Part 1 of device-tree updates for 3.10.  The bulk of the churn in this
  branch is due to i.MX moving from C-defined pin control over to device
  tree, which is a one-time conversion that will allow greater
  flexibility down the road.

  Besides that, there's PCI-e bindings for Marvell mvebu platforms and a
  handful of cleanups to tegra due to the new include file functionality
  of the device tree compiler"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits)
  arm: mvebu: PCIe Device Tree informations for Armada XP GP
  arm: mvebu: PCIe Device Tree informations for Armada 370 DB
  arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
  arm: mvebu: PCIe Device Tree informations for Armada XP DB
  arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
  arm: mvebu: add PCIe Device Tree informations for Armada XP
  arm: mvebu: add PCIe Device Tree informations for Armada 370
  ARM: sunxi: unify osc24M_fixed and osc24M
  arm: vt8500: Add SDHC support to WM8505 DT
  ARM: dts: Add a 64 bits version of the skeleton device tree
  ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
  ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
  ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
  ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
  ARM: dts: imx6dl-wandboard: Add USB Host support
  ARM: dts: imx51 cpu node
  ARM: dts: Add missing imx27-phytec-phycore dtb target
  ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
  ARM: i.MX51: Add PATA support
  ARM: dts: Add initial support for Wandboard Dual-Lite
  ...

18 files changed:
1  2 
arch/arm/boot/dts/armada-370-mirabox.dts
arch/arm/boot/dts/armada-370.dtsi
arch/arm/boot/dts/at91sam9260.dtsi
arch/arm/boot/dts/at91sam9263ek.dts
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9m10g45ek.dts
arch/arm/boot/dts/at91sam9n12ek.dts
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/boot/dts/at91sam9x5ek.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/orion5x.dtsi
arch/arm/boot/dts/wm8505.dtsi
arch/arm/configs/kirkwood_defconfig
arch/arm/mach-imx/src.c
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/pinctrl/pinctrl-imx.c

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                                        };
                                };
  
 +                              spi0 {
 +                                      pinctrl_spi0: spi0-0 {
 +                                              atmel,pins =
 +                                                      <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
 +                                                       0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
 +                                                       0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
 +                                      };
 +                              };
 +
 +                              spi1 {
 +                                      pinctrl_spi1: spi1-0 {
 +                                              atmel,pins =
 +                                                      <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
 +                                                       0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
 +                                                       0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
 +                                      };
 +                              };
 +
+                               i2c0 {
+                                       pinctrl_i2c0: i2c0-0 {
+                                               atmel,pins =
+                                                       <0 30 0x1 0x0   /* PA30 periph A I2C0 data */
+                                                        0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
+                                       };
+                               };
+                               i2c1 {
+                                       pinctrl_i2c1: i2c1-0 {
+                                               atmel,pins =
+                                                       <2 0 0x3 0x0    /* PC0 periph C I2C1 data */
+                                                        2 1 0x3 0x0>;  /* PC1 periph C I2C1 clock */
+                                       };
+                               };
+                               i2c2 {
+                                       pinctrl_i2c2: i2c2-0 {
+                                               atmel,pins =
+                                                       <1 4 0x2 0x0    /* PB4 periph B I2C2 data */
+                                                        1 5 0x2 0x0>;  /* PB5 periph B I2C2 clock */
+                                       };
+                               };
+                               i2c_gpio0 {
+                                       pinctrl_i2c_gpio0: i2c_gpio0-0 {
+                                               atmel,pins =
+                                                       <0 30 0x0 0x2   /* PA30 gpio multidrive I2C0 data */
+                                                        0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
+                                       };
+                               };
+                               i2c_gpio1 {
+                                       pinctrl_i2c_gpio1: i2c_gpio1-0 {
+                                               atmel,pins =
+                                                       <2 0 0x0 0x2    /* PC0 gpio multidrive I2C1 data */
+                                                        2 1 0x0 0x2>;  /* PC1 gpio multidrive I2C1 clock */
+                                       };
+                               };
+                               i2c_gpio2 {
+                                       pinctrl_i2c_gpio2: i2c_gpio2-0 {
+                                               atmel,pins =
+                                                       <1 4 0x0 0x2    /* PB4 gpio multidrive I2C2 data */
+                                                        1 5 0x0 0x2>;  /* PB5 gpio multidrive I2C2 clock */
+                                       };
+                               };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
                                };
                        };
  
 +                      spi0: spi@f0000000 {
 +                              #address-cells = <1>;
 +                              #size-cells = <0>;
 +                              compatible = "atmel,at91rm9200-spi";
 +                              reg = <0xf0000000 0x100>;
 +                              interrupts = <13 4 3>;
 +                              pinctrl-names = "default";
 +                              pinctrl-0 = <&pinctrl_spi0>;
 +                              status = "disabled";
 +                      };
 +
 +                      spi1: spi@f0004000 {
 +                              #address-cells = <1>;
 +                              #size-cells = <0>;
 +                              compatible = "atmel,at91rm9200-spi";
 +                              reg = <0xf0004000 0x100>;
 +                              interrupts = <14 4 3>;
 +                              pinctrl-names = "default";
 +                              pinctrl-0 = <&pinctrl_spi1>;
 +                              status = "disabled";
 +                      };
++
+                       rtc@fffffeb0 {
+                               compatible = "atmel,at91rm9200-rtc";
+                               reg = <0xfffffeb0 0x40>;
+                               interrupts = <1 4 7>;
+                               status = "disabled";
+                       };
                };
  
                nand0: nand@40000000 {
Simple merge
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@@@ -21,7 -21,10 +21,8 @@@ obj-$(CONFIG_PINCTRL_IMX35)  += pinctrl-
  obj-$(CONFIG_PINCTRL_IMX51)   += pinctrl-imx51.o
  obj-$(CONFIG_PINCTRL_IMX53)   += pinctrl-imx53.o
  obj-$(CONFIG_PINCTRL_IMX6Q)   += pinctrl-imx6q.o
+ obj-$(CONFIG_PINCTRL_IMX6Q)   += pinctrl-imx6dl.o
 -obj-$(CONFIG_PINCTRL_PXA3xx)  += pinctrl-pxa3xx.o
  obj-$(CONFIG_PINCTRL_FALCON)  += pinctrl-falcon.o
 -obj-$(CONFIG_PINCTRL_MMP2)    += pinctrl-mmp2.o
  obj-$(CONFIG_PINCTRL_MXS)     += pinctrl-mxs.o
  obj-$(CONFIG_PINCTRL_IMX23)   += pinctrl-imx23.o
  obj-$(CONFIG_PINCTRL_IMX28)   += pinctrl-imx28.o
Simple merge