ARM: tegra: Remove GIC bypass mode for hotplug
Scott Williams [Thu, 2 Feb 2012 23:20:15 +0000 (15:20 -0800)]
Every call to tegra_gic_pass_through_disable() is preceded by a
call to tegra_gic_cpu_disable(). However, the call from hotplug
shutdown is superfluous on Cortex-A9 and wrong on Cortex-A15.

Consolidate the two disable functions into a single function
taking a parameter that indicates whether to enable bypass mode:
the call from the hotplug shutdown path does not enable bypass,
the call from the CPU suspend path does.

BUG 929216

Change-Id: I0b11dc89b27aeb42b3ddffb0cfe1a65eb7a50f93
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/79092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

Rebase-Id: Re1f145785b568cdd45bc5656e1d009298698b580

arch/arm/mach-tegra/gic.c
arch/arm/mach-tegra/gic.h
arch/arm/mach-tegra/hotplug.c
arch/arm/mach-tegra/pm.c

index 2b21eff..2a6c0c8 100644 (file)
@@ -31,9 +31,19 @@ static bool is_vgic;
 
 #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
 
-void tegra_gic_cpu_disable(void)
+void tegra_gic_cpu_disable(bool pass_through)
 {
-       writel(0, tegra_gic_cpu_base + GIC_CPU_CTRL);
+       u32 gic_cpu_ctrl = 0;
+
+#ifndef CONFIG_ARCH_TEGRA_2x_SOC
+       if (pass_through) {
+               if (is_vgic)
+                       gic_cpu_ctrl = 0x1E0;
+               else
+                       gic_cpu_ctrl = 2;
+       }
+#endif
+       writel(gic_cpu_ctrl, tegra_gic_cpu_base + GIC_CPU_CTRL);
 }
 
 void tegra_gic_cpu_enable(void)
@@ -41,16 +51,6 @@ void tegra_gic_cpu_enable(void)
        writel(1, tegra_gic_cpu_base + GIC_CPU_CTRL);
 }
 
-#ifndef CONFIG_ARCH_TEGRA_2x_SOC
-
-void tegra_gic_pass_through_disable(void)
-{
-       u32 val = readl(tegra_gic_cpu_base + GIC_CPU_CTRL);
-       val |= 2; /* enableNS = disable GIC pass through */
-       writel(val, tegra_gic_cpu_base + GIC_CPU_CTRL);
-}
-
-#endif
 #endif
 
 #if defined(CONFIG_PM_SLEEP)
index 22bb85f..eac5bf5 100644 (file)
 
 #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
 
-void tegra_gic_cpu_disable(void);
+void tegra_gic_cpu_disable(bool pass_through);
 void tegra_gic_cpu_enable(void);
 
-#ifndef CONFIG_ARCH_TEGRA_2x_SOC
-
-void tegra_gic_pass_through_disable(void);
-
-#endif
 #endif
 
 
index 2d0f7bd..f91c84c 100644 (file)
@@ -43,13 +43,7 @@ void tegra_cpu_die(unsigned int cpu)
 
 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
        /* Disable GIC CPU interface for this CPU. */
-       tegra_gic_cpu_disable();
-
-       /* Tegra3 enters LPx states via WFI - do not propagate legacy IRQs
-          to CPU core to avoid fall through WFI; then GIC output will be
-          enabled, however at this time - CPU is dying - no interrupt should
-          have affinity to this CPU. */
-       tegra_gic_pass_through_disable();
+       tegra_gic_cpu_disable(false);
 #endif
 
        /* Flush the L1 data cache. */
index 58b9ca8..b51b202 100644 (file)
@@ -433,13 +433,7 @@ static void suspend_cpu_complex(u32 mode)
                flowctrl_writel(reg, FLOW_CTRL_CPU_CSR(i));
        }
 
-       tegra_gic_cpu_disable();
-#ifndef CONFIG_ARCH_TEGRA_2x_SOC
-       /* Tegra3 enters LPx states via WFI - do not propagate legacy IRQs
-          to CPU core to avoid fall through WFI (IRQ-to-flow controller wake
-          path is not affected). */
-       tegra_gic_pass_through_disable();
-#endif
+       tegra_gic_cpu_disable(true);
 }
 
 void tegra_clear_cpu_in_lp2(int cpu)