ARM: tegra: t14x: flush complete outer cache
Seshendra Gadagottu [Thu, 13 Dec 2012 00:37:21 +0000 (16:37 -0800)]
T14x has outer cache per cluster. So flush complete
outer cache before doing cluster switch and do the
complete outer cache initialization after cluster switch.

Change-Id: I8ca5bddcdb3755244accfa9062abdf1ecee7d7c1
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/172029
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

arch/arm/mach-tegra/pm.c

index 4d57774..b0d3efe 100644 (file)
@@ -673,6 +673,9 @@ unsigned int tegra_idle_power_down_last(unsigned int sleep_time,
        tegra_cluster_switch_time(flags, tegra_cluster_switch_time_id_prolog);
 #ifdef CONFIG_CACHE_L2X0
        flush_cache_all();
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+       outer_flush_all();
+#else
        /*
         * No need to flush complete L2. Cleaning kernel and IO mappings
         * is enough for the LP code sequence that has L2 disabled but
@@ -681,11 +684,16 @@ unsigned int tegra_idle_power_down_last(unsigned int sleep_time,
        pgd = cpu_get_pgd();
        outer_clean_range(__pa(pgd + USER_PTRS_PER_PGD),
                          __pa(pgd + PTRS_PER_PGD));
+#endif
        outer_disable();
 #endif
        tegra_sleep_cpu(PHYS_OFFSET - PAGE_OFFSET);
 
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+       tegra_init_cache(true);
+#else
        tegra_init_cache(false);
+#endif
 
 #ifdef CONFIG_TRUSTED_FOUNDATIONS
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC