ARM: shmobile: r8a7740: add DMAEngine support for USB
Kuninori Morimoto [Mon, 25 Jun 2012 10:37:10 +0000 (03:37 -0700)]
Current shdmac can support USB DMAC on r8a7740.
This support reduce CPU duty when USB access.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>

arch/arm/mach-shmobile/clock-r8a7740.c
arch/arm/mach-shmobile/include/mach/r8a7740.h
arch/arm/mach-shmobile/setup-r8a7740.c

index 39b1311..daf3eac 100644 (file)
@@ -463,7 +463,7 @@ enum {
 
        MSTP230,
        MSTP222,
-       MSTP218, MSTP217, MSTP216,
+       MSTP218, MSTP217, MSTP216, MSTP214,
        MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
 
        MSTP329, MSTP328, MSTP323, MSTP320,
@@ -489,6 +489,7 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 18, 0), /* DMAC1 */
        [MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 17, 0), /* DMAC2 */
        [MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 16, 0), /* DMAC3 */
+       [MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 14, 0), /* USBDMAC */
        [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  7, 0), /* SCIFA5 */
        [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  6, 0), /* SCIFB */
        [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  4, 0), /* SCIFA0 */
@@ -567,6 +568,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.0",               &mstp_clks[MSTP204]),
        CLKDEV_DEV_ID("sh-sci.8",               &mstp_clks[MSTP206]),
        CLKDEV_DEV_ID("sh-sci.5",               &mstp_clks[MSTP207]),
+       CLKDEV_DEV_ID("sh-dma-engine.3",        &mstp_clks[MSTP214]),
        CLKDEV_DEV_ID("sh-dma-engine.2",        &mstp_clks[MSTP216]),
        CLKDEV_DEV_ID("sh-dma-engine.1",        &mstp_clks[MSTP217]),
        CLKDEV_DEV_ID("sh-dma-engine.0",        &mstp_clks[MSTP218]),
index 0f14ce8..8bd7b9c 100644 (file)
@@ -600,6 +600,8 @@ enum {
        SHDMA_SLAVE_FSIA_RX,
        SHDMA_SLAVE_FSIA_TX,
        SHDMA_SLAVE_FSIB_TX,
+       SHDMA_SLAVE_USBHS_TX,
+       SHDMA_SLAVE_USBHS_RX,
 };
 
 #endif /* __ASM_R8A7740_H__ */
index 320c43a..5e84609 100644 (file)
@@ -501,6 +501,92 @@ static struct platform_device dma2_device = {
        },
 };
 
+/* USB-DMAC */
+/* Transmit sizes and respective CHCR register values */
+enum {
+       USBTS_XMIT_SZ_8BYTE             = 0,
+       USBTS_XMIT_SZ_16BYTE            = 1,
+       USBTS_XMIT_SZ_32BYTE            = 2,
+};
+
+/* log2(size / 8) - used to calculate number of transfers */
+static const unsigned int dma_usbts_shift[] = {
+       [USBTS_XMIT_SZ_8BYTE]   = 3,
+       [USBTS_XMIT_SZ_16BYTE]  = 4,
+       [USBTS_XMIT_SZ_32BYTE]  = 5,
+};
+
+static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
+       {
+               .offset = 0,
+       }, {
+               .offset = 0x20,
+       },
+};
+
+#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
+
+static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
+       {
+               .slave_id       = SHDMA_SLAVE_USBHS_TX,
+               .chcr           = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
+       }, {
+               .slave_id       = SHDMA_SLAVE_USBHS_RX,
+               .chcr           = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
+       },
+};
+
+static struct sh_dmae_pdata usb_dma_platform_data = {
+       .slave          = r8a7740_usb_dma_slaves,
+       .slave_num      = ARRAY_SIZE(r8a7740_usb_dma_slaves),
+       .channel        = r8a7740_usb_dma_channels,
+       .channel_num    = ARRAY_SIZE(r8a7740_usb_dma_channels),
+       .ts_low_shift   = 6,
+       .ts_low_mask    = 0xc0,
+       .ts_high_shift  = 0,
+       .ts_high_mask   = 0,
+       .ts_shift       = dma_usbts_shift,
+       .ts_shift_num   = ARRAY_SIZE(dma_usbts_shift),
+       .dmaor_init     = DMAOR_DME,
+       .chcr_offset    = 0x14,
+       .chcr_ie_bit    = 1 << 5,
+       .dmaor_is_32bit = 1,
+       .needs_tend_set = 1,
+       .no_dmars       = 1,
+       .slave_only     = 1,
+};
+
+static struct resource r8a7740_usb_dma_resources[] = {
+       {
+               /* Channel registers and DMAOR */
+               .start  = 0xe68a0020,
+               .end    = 0xe68a0064 - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* VCR/SWR/DMICR */
+               .start  = 0xe68a0000,
+               .end    = 0xe68a0014 - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* IRQ for channels */
+               .start  = evt2irq(0x0a00),
+               .end    = evt2irq(0x0a00),
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device usb_dma_device = {
+       .name           = "sh-dma-engine",
+       .id             = 3,
+       .resource       = r8a7740_usb_dma_resources,
+       .num_resources  = ARRAY_SIZE(r8a7740_usb_dma_resources),
+       .dev            = {
+               .platform_data  = &usb_dma_platform_data,
+       },
+};
+
 /* I2C */
 static struct resource i2c0_resources[] = {
        [0] = {
@@ -550,6 +636,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
        &dma0_device,
        &dma1_device,
        &dma2_device,
+       &usb_dma_device,
 };
 
 /*