ARM: tegra: Add support for simulation platform
Scott Williams [Wed, 25 Jan 2012 22:18:43 +0000 (14:18 -0800)]
Disable actions that can't be simulated or take a long time on
the simulator.

Change-Id: I97b68d56e6c76ea256555e2389b2e6eae52ecf57
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/77457
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

Rebase-Id: R882982965259be2babafee0de453997b2e0ab61a

arch/arm/mach-tegra/include/mach/latency_allowance.h
arch/arm/mach-tegra/powergate.c

index 8644075..b35657c 100644 (file)
@@ -87,7 +87,7 @@ enum tegra_la_id {
        TEGRA_LA_MAX_ID
 };
 
-#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_TEGRA_FPGA_PLATFORM)
+#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || !defined(CONFIG_TEGRA_SILICON_PLATFORM)
 static inline int tegra_set_latency_allowance(enum tegra_la_id id,
                                                int bandwidth_in_mbps)
 {
@@ -104,7 +104,6 @@ static inline int tegra_enable_latency_scaling(enum tegra_la_id id,
 
 static inline void tegra_disable_latency_scaling(enum tegra_la_id id)
 {
-       return;
 }
 #else
 int tegra_set_latency_allowance(enum tegra_la_id id,
index 54d5570..5e8a591 100644 (file)
@@ -201,7 +201,8 @@ static void mc_write(u32 val, unsigned long reg)
        writel(val, mc + reg);
 }
 
-#if !defined(CONFIG_ARCH_TEGRA_2x_SOC)
+#if !defined(CONFIG_ARCH_TEGRA_2x_SOC) && \
+       !defined(CONFIG_TEGRA_SIMULATION_PLATFORM)
 
 #define MC_CLIENT_HOTRESET_CTRL        0x200
 #define MC_CLIENT_HOTRESET_STAT        0x204