ARM: perf: index Xscale and ARMv6 event counters starting from zero
Will Deacon [Tue, 19 Jul 2011 21:41:36 +0000 (22:41 +0100)]
Now that the ARMv7 PMU backend indexes event counters from zero, follow
suit and do the same for ARMv6 and Xscale.

Acked-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

arch/arm/kernel/perf_event_v6.c
arch/arm/kernel/perf_event_xscale.c

index d1abe97..87f29b5 100644 (file)
@@ -54,7 +54,7 @@ enum armv6_perf_types {
 };
 
 enum armv6_counters {
-       ARMV6_CYCLE_COUNTER = 1,
+       ARMV6_CYCLE_COUNTER = 0,
        ARMV6_COUNTER0,
        ARMV6_COUNTER1,
 };
@@ -487,7 +487,7 @@ armv6pmu_handle_irq(int irq_num,
        perf_sample_data_init(&data, 0);
 
        cpuc = &__get_cpu_var(cpu_hw_events);
-       for (idx = 0; idx <= armpmu->num_events; ++idx) {
+       for (idx = 0; idx < armpmu->num_events; ++idx) {
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
 
index 730b1c2..54312fc 100644 (file)
@@ -40,7 +40,7 @@ enum xscale_perf_types {
 };
 
 enum xscale_counters {
-       XSCALE_CYCLE_COUNTER    = 1,
+       XSCALE_CYCLE_COUNTER    = 0,
        XSCALE_COUNTER0,
        XSCALE_COUNTER1,
        XSCALE_COUNTER2,
@@ -249,7 +249,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
        perf_sample_data_init(&data, 0);
 
        cpuc = &__get_cpu_var(cpu_hw_events);
-       for (idx = 0; idx <= armpmu->num_events; ++idx) {
+       for (idx = 0; idx < armpmu->num_events; ++idx) {
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;
 
@@ -581,7 +581,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
        perf_sample_data_init(&data, 0);
 
        cpuc = &__get_cpu_var(cpu_hw_events);
-       for (idx = 0; idx <= armpmu->num_events; ++idx) {
+       for (idx = 0; idx < armpmu->num_events; ++idx) {
                struct perf_event *event = cpuc->events[idx];
                struct hw_perf_event *hwc;