ARM: tegra11x: cpuidle: Remove LP2 references
Bo Yan [Tue, 30 Oct 2012 20:51:33 +0000 (13:51 -0700)]
This change completely removes references to lp2 in cpuidle-t11x.c,
some related changes also affect cpuidle-t2.c, cpuidle-t3.c, and a
few other files.

bug 1034196

Change-Id: Ic2387bf614b39bd08ed4b2fc6e996f6fbf8306c0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160017
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

arch/arm/mach-tegra/cpuidle-t11x.c
arch/arm/mach-tegra/cpuidle-t2.c
arch/arm/mach-tegra/cpuidle-t3.c
arch/arm/mach-tegra/cpuidle.c
arch/arm/mach-tegra/cpuidle.h
arch/arm/mach-tegra/pm-t3.c
arch/arm/mach-tegra/pm.c
arch/arm/mach-tegra/pm.h
arch/arm/mach-tegra/timer-t3.c

index c5c3786..031cfa2 100644 (file)
@@ -88,14 +88,14 @@ module_param(fast_cluster_power_down_mode, uint, 0644);
 
 static struct clk *cpu_clk_for_dvfs;
 
-static int lp2_exit_latencies[5];
+static int pd_exit_latencies[5];
 
 static struct {
        unsigned int cpu_ready_count[5];
        unsigned int tear_down_count[5];
-       unsigned long long cpu_wants_lp2_time[5];
+       unsigned long long cpu_wants_pd_time[5];
        unsigned long long cpu_pg_time[5];
-       unsigned long long rail_pg_time;
+       unsigned long long rail_pd_time;
        unsigned long long c0nc_pg_time;
        unsigned long long c1nc_pg_time;
        unsigned int rail_gating_count;
@@ -110,8 +110,8 @@ static struct {
        unsigned int c1nc_gating_bin[32];
        unsigned int c1nc_gating_done_count;
        unsigned int c1nc_gating_done_count_bin[32];
-       unsigned int lp2_int_count[NR_IRQS];
-       unsigned int last_lp2_int_count[NR_IRQS];
+       unsigned int pd_int_count[NR_IRQS];
+       unsigned int last_pd_int_count[NR_IRQS];
 } idle_stats;
 
 static inline unsigned int time_to_bin(unsigned int time)
@@ -130,14 +130,14 @@ static inline unsigned int cpu_number(unsigned int n)
        return is_lp_cluster() ? 4 : n;
 }
 
-void tegra11x_cpu_idle_stats_lp2_ready(unsigned int cpu)
+void tegra11x_cpu_idle_stats_pd_ready(unsigned int cpu)
 {
        idle_stats.cpu_ready_count[cpu_number(cpu)]++;
 }
 
-void tegra11x_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us)
+void tegra11x_cpu_idle_stats_pd_time(unsigned int cpu, s64 us)
 {
-       idle_stats.cpu_wants_lp2_time[cpu_number(cpu)] += us;
+       idle_stats.cpu_wants_pd_time[cpu_number(cpu)] += us;
 }
 
 /* Allow rail off only if all secondary CPUs are power gated, and no
@@ -156,7 +156,7 @@ static bool tegra_rail_off_is_allowed(void)
        return true;
 }
 
-bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev,
+bool tegra11x_pd_is_allowed(struct cpuidle_device *dev,
        struct cpuidle_state *state)
 {
        s64 request;
@@ -166,10 +166,10 @@ bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev,
                return false;
 
        request = ktime_to_us(tick_nohz_get_sleep_length());
-       if (state->exit_latency != lp2_exit_latencies[cpu_number(dev->cpu)]) {
+       if (state->exit_latency != pd_exit_latencies[cpu_number(dev->cpu)]) {
                /* possible on the 1st entry after cluster switch*/
-               state->exit_latency = lp2_exit_latencies[cpu_number(dev->cpu)];
-               tegra_lp2_update_target_residency(state);
+               state->exit_latency = pd_exit_latencies[cpu_number(dev->cpu)];
+               tegra_pd_update_target_residency(state);
        }
        if (request < state->target_residency) {
                /* Not enough time left to enter LP2 */
@@ -179,7 +179,7 @@ bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev,
        return true;
 }
 
-static inline void tegra11_lp2_restore_affinity(void)
+static inline void tegra11_irq_restore_affinity(void)
 {
 #ifdef CONFIG_SMP
        /* Disable the distributor. */
@@ -254,8 +254,8 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
                        return false;
                }
 
-               /* Cancel LP2 wake timers for all secondary CPUs */
-               tegra_lp2_timer_cancel_secondary();
+               /* Cancel power gating wake timers for all secondary CPUs */
+               tegra_pd_timer_cancel_secondary();
 
                /* Save and disable the affinity setting for the other
                   CPUs and route all interrupts to CPU0. */
@@ -268,7 +268,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
        cpu_pm_enter();
 
        sleep_time = request -
-               lp2_exit_latencies[cpu_number(dev->cpu)];
+               pd_exit_latencies[cpu_number(dev->cpu)];
 
        bin = time_to_bin((u32)request / 1000);
        idle_stats.tear_down_count[cpu_number(dev->cpu)]++;
@@ -297,11 +297,11 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
                }
        }
 
-       if (tegra_idle_lp2_last(sleep_time, flag) == 0)
+       if (tegra_idle_power_down_last(sleep_time, flag) == 0)
                sleep_completed = true;
        else {
                int irq = tegra_gic_pending_interrupt();
-               idle_stats.lp2_int_count[irq]++;
+               idle_stats.pd_int_count[irq]++;
        }
 
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
@@ -310,7 +310,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
                tegra_dvfs_rail_on(tegra_cpu_rail, exit_time);
 
        if (flag == TEGRA_POWER_CLUSTER_PART_CRAIL)
-               idle_stats.rail_pg_time +=
+               idle_stats.rail_pd_time +=
                        ktime_to_us(ktime_sub(exit_time, entry_time));
        else if (flag == TEGRA_POWER_CLUSTER_PART_NONCPU) {
                if (is_lp_cluster())
@@ -322,7 +322,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
        }
 
        if (multi_cpu_entry)
-               tegra11_lp2_restore_affinity();
+               tegra11_irq_restore_affinity();
 
        if (sleep_completed) {
                /*
@@ -331,10 +331,10 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
                 */
                int offset = ktime_to_us(ktime_sub(exit_time, entry_time))
                        - request;
-               int latency = lp2_exit_latencies[cpu_number(dev->cpu)] +
+               int latency = pd_exit_latencies[cpu_number(dev->cpu)] +
                        offset / 16;
                latency = clamp(latency, 0, 10000);
-               lp2_exit_latencies[cpu_number(dev->cpu)] = latency;
+               pd_exit_latencies[cpu_number(dev->cpu)] = latency;
                state->exit_latency = latency;          /* for idle governor */
                smp_wmb();
 
@@ -393,7 +393,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
                }
        }
 
-       if (!tegra_is_lp2_timer_ready(dev->cpu) ||
+       if (!tegra_is_cpu_wake_timer_ready(dev->cpu) ||
            (request < state->target_residency) ||
            (!ts) || (ts->nohz_mode == NOHZ_MODE_INACTIVE)) {
                /*
@@ -409,7 +409,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        sleep_time = request - state->exit_latency;
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
        arch_timer_suspend(&timer_context);
-       tegra_lp2_set_trigger(sleep_time);
+       tegra_pd_set_trigger(sleep_time);
 #endif
        idle_stats.tear_down_count[cpu_number(dev->cpu)]++;
 
@@ -427,8 +427,8 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        if (!arch_timer_get_state(&timer_context))
                sleep_completed = (timer_context.cntp_tval <= 0);
 #else
-       sleep_completed = !tegra_lp2_timer_remain();
-       tegra_lp2_set_trigger(0);
+       sleep_completed = !tegra_pd_timer_remain();
+       tegra_pd_set_trigger(0);
        arch_timer_resume(&timer_context);
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
 #endif
@@ -440,10 +440,10 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
                 * adjust the exit latency based on measurement
                 */
                int offset = sleep_time - request;
-               int latency = lp2_exit_latencies[cpu_number(dev->cpu)] +
+               int latency = pd_exit_latencies[cpu_number(dev->cpu)] +
                        offset / 16;
                latency = clamp(latency, 0, 10000);
-               lp2_exit_latencies[cpu_number(dev->cpu)] = latency;
+               pd_exit_latencies[cpu_number(dev->cpu)] = latency;
                state->exit_latency = latency;          /* for idle governor */
                smp_wmb();
        }
@@ -453,15 +453,15 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        return true;
 }
 
-bool tegra11x_idle_lp2(struct cpuidle_device *dev,
+bool tegra11x_idle_power_down(struct cpuidle_device *dev,
                           struct cpuidle_state *state)
 {
-       bool entered_lp2;
+       bool power_down;
        bool cpu_gating_only = false;
        bool power_gating_cpu_only = true;
        s64 request = ktime_to_us(tick_nohz_get_sleep_length());
 
-       tegra_set_cpu_in_lp2(dev->cpu);
+       tegra_set_cpu_in_pd(dev->cpu);
        cpu_gating_only = (((fast_cluster_power_down_mode
                        << TEGRA_POWER_CLUSTER_PART_SHIFT)
                        & TEGRA_POWER_CLUSTER_PART_MASK) == 0);
@@ -481,17 +481,17 @@ bool tegra11x_idle_lp2(struct cpuidle_device *dev,
                power_gating_cpu_only = true;
 
        if (power_gating_cpu_only)
-               entered_lp2 = tegra_cpu_core_power_down(dev, state, request);
+               power_down = tegra_cpu_core_power_down(dev, state, request);
        else
-               entered_lp2 = tegra_cpu_cluster_power_down(dev, state, request);
+               power_down = tegra_cpu_cluster_power_down(dev, state, request);
 
-       tegra_clear_cpu_in_lp2(dev->cpu);
+       tegra_clear_cpu_in_pd(dev->cpu);
 
-       return entered_lp2;
+       return power_down;
 }
 
 #ifdef CONFIG_DEBUG_FS
-int tegra11x_lp2_debug_show(struct seq_file *s, void *data)
+int tegra11x_pd_debug_show(struct seq_file *s, void *data)
 {
        int bin;
        int i;
@@ -533,11 +533,11 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data)
        seq_printf(s, "\n");
        seq_printf(s, "cpu ready time:                 " \
                        "%8llu %8llu %8llu %8llu %8llu ms\n",
-               div64_u64(idle_stats.cpu_wants_lp2_time[0], 1000),
-               div64_u64(idle_stats.cpu_wants_lp2_time[1], 1000),
-               div64_u64(idle_stats.cpu_wants_lp2_time[2], 1000),
-               div64_u64(idle_stats.cpu_wants_lp2_time[3], 1000),
-               div64_u64(idle_stats.cpu_wants_lp2_time[4], 1000));
+               div64_u64(idle_stats.cpu_wants_pd_time[0], 1000),
+               div64_u64(idle_stats.cpu_wants_pd_time[1], 1000),
+               div64_u64(idle_stats.cpu_wants_pd_time[2], 1000),
+               div64_u64(idle_stats.cpu_wants_pd_time[3], 1000),
+               div64_u64(idle_stats.cpu_wants_pd_time[4], 1000));
 
        seq_printf(s, "cpu power gating time:          " \
                        "%8llu %8llu %8llu %8llu %8llu ms\n",
@@ -547,39 +547,40 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data)
                div64_u64(idle_stats.cpu_pg_time[3], 1000),
                div64_u64(idle_stats.cpu_pg_time[4], 1000));
 
-       seq_printf(s, "lp2 %%:                         %7d%% %7d%% %7d%% %7d%% %7d%%\n",
-               (int)(idle_stats.cpu_wants_lp2_time[0] ?
+       seq_printf(s, "power gated %%:                 " \
+                       "%7d%% %7d%% %7d%% %7d%% %7d%%\n",
+               (int)(idle_stats.cpu_wants_pd_time[0] ?
                        div64_u64(idle_stats.cpu_pg_time[0] * 100,
-                       idle_stats.cpu_wants_lp2_time[0]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[1] ?
+                       idle_stats.cpu_wants_pd_time[0]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[1] ?
                        div64_u64(idle_stats.cpu_pg_time[1] * 100,
-                       idle_stats.cpu_wants_lp2_time[1]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[2] ?
+                       idle_stats.cpu_wants_pd_time[1]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[2] ?
                        div64_u64(idle_stats.cpu_pg_time[2] * 100,
-                       idle_stats.cpu_wants_lp2_time[2]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[3] ?
+                       idle_stats.cpu_wants_pd_time[2]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[3] ?
                        div64_u64(idle_stats.cpu_pg_time[3] * 100,
-                       idle_stats.cpu_wants_lp2_time[3]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[4] ?
+                       idle_stats.cpu_wants_pd_time[3]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[4] ?
                        div64_u64(idle_stats.cpu_pg_time[4] * 100,
-                       idle_stats.cpu_wants_lp2_time[4]) : 0));
+                       idle_stats.cpu_wants_pd_time[4]) : 0));
 
        seq_printf(s, "\n");
        seq_printf(s, "rail gating time  c0nc gating time  c1nc gating time\n");
        seq_printf(s, "%8llu ms          %8llu ms          %8llu ms\n",
-               div64_u64(idle_stats.rail_pg_time, 1000),
+               div64_u64(idle_stats.rail_pd_time, 1000),
                div64_u64(idle_stats.c0nc_pg_time, 1000),
                div64_u64(idle_stats.c1nc_pg_time, 1000));
        seq_printf(s, "%8d%%             %8d%%             %8d%%\n",
-               (int)(idle_stats.cpu_wants_lp2_time[0] ?
-                       div64_u64(idle_stats.rail_pg_time * 100,
-                       idle_stats.cpu_wants_lp2_time[0]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[0] ?
+               (int)(idle_stats.cpu_wants_pd_time[0] ?
+                       div64_u64(idle_stats.rail_pd_time * 100,
+                       idle_stats.cpu_wants_pd_time[0]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[0] ?
                        div64_u64(idle_stats.c0nc_pg_time * 100,
-                       idle_stats.cpu_wants_lp2_time[0]) : 0),
-               (int)(idle_stats.cpu_wants_lp2_time[4] ?
+                       idle_stats.cpu_wants_pd_time[0]) : 0),
+               (int)(idle_stats.cpu_wants_pd_time[4] ?
                        div64_u64(idle_stats.c1nc_pg_time * 100,
-                       idle_stats.cpu_wants_lp2_time[4]) : 0));
+                       idle_stats.cpu_wants_pd_time[4]) : 0));
 
        seq_printf(s, "\n");
 
@@ -629,15 +630,15 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data)
                "int", "name", "count", "last count");
        seq_printf(s, "--------------------------------------------\n");
        for (i = 0; i < NR_IRQS; i++) {
-               if (idle_stats.lp2_int_count[i] == 0)
+               if (idle_stats.pd_int_count[i] == 0)
                        continue;
                seq_printf(s, "%3d %20s %6d %10d\n",
                        i, irq_to_desc(i)->action ?
                                irq_to_desc(i)->action->name ?: "???" : "???",
-                       idle_stats.lp2_int_count[i],
-                       idle_stats.lp2_int_count[i] -
-                               idle_stats.last_lp2_int_count[i]);
-               idle_stats.last_lp2_int_count[i] = idle_stats.lp2_int_count[i];
+                       idle_stats.pd_int_count[i],
+                       idle_stats.pd_int_count[i] -
+                               idle_stats.last_pd_int_count[i]);
+               idle_stats.last_pd_int_count[i] = idle_stats.pd_int_count[i];
        };
        return 0;
 }
@@ -647,19 +648,19 @@ int __init tegra11x_cpuidle_init_soc(struct tegra_cpuidle_ops *idle_ops)
 {
        int i;
        struct tegra_cpuidle_ops ops = {
-               tegra11x_idle_lp2,
-               tegra11x_cpu_idle_stats_lp2_ready,
-               tegra11x_cpu_idle_stats_lp2_time,
-               tegra11x_lp2_is_allowed,
+               tegra11x_idle_power_down,
+               tegra11x_cpu_idle_stats_pd_ready,
+               tegra11x_cpu_idle_stats_pd_time,
+               tegra11x_pd_is_allowed,
 #ifdef CONFIG_DEBUG_FS
-               tegra11x_lp2_debug_show
+               tegra11x_pd_debug_show
 #endif
        };
 
        cpu_clk_for_dvfs = tegra_get_clock_by_name("cpu_g");
 
-       for (i = 0; i < ARRAY_SIZE(lp2_exit_latencies); i++)
-               lp2_exit_latencies[i] = tegra_lp2_exit_latency;
+       for (i = 0; i < ARRAY_SIZE(pd_exit_latencies); i++)
+               pd_exit_latencies[i] = tegra_pg_exit_latency;
 
        *idle_ops = ops;
        return 0;
index 7538404..1736b79 100644 (file)
@@ -217,7 +217,7 @@ static int tegra2_idle_lp2_cpu_0(struct cpuidle_device *dev,
        tegra_dvfs_rail_off(tegra_cpu_rail, entry_time);
 
        if (request > state->target_residency) {
-               s64 sleep_time = request - tegra_lp2_exit_latency;
+               s64 sleep_time = request - tegra_pg_exit_latency;
 
                bin = time_to_bin((u32)request / 1000);
                idle_stats.lp2_count++;
@@ -225,7 +225,7 @@ static int tegra2_idle_lp2_cpu_0(struct cpuidle_device *dev,
 
                clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
 
-               if (tegra_idle_lp2_last(sleep_time, 0) == 0)
+               if (tegra_idle_power_down_last(sleep_time, 0) == 0)
                        sleep_completed = true;
                else {
                        int irq = tegra_gic_pending_interrupt();
@@ -250,9 +250,9 @@ static int tegra2_idle_lp2_cpu_0(struct cpuidle_device *dev,
                 */
                s64 actual_time = ktime_to_us(ktime_sub(exit_time, entry_time));
                long offset = (long)(actual_time - request);
-               int latency = tegra_lp2_exit_latency + offset / 16;
+               int latency = tegra_pg_exit_latency + offset / 16;
                latency = clamp(latency, 0, 10000);
-               tegra_lp2_exit_latency = latency;
+               tegra_pg_exit_latency = latency;
                smp_wmb();
 
                idle_stats.lp2_completed_count++;
@@ -272,7 +272,7 @@ static bool tegra2_idle_lp2_cpu_1(struct cpuidle_device *dev,
 #ifdef CONFIG_SMP
        struct tegra_twd_context twd_context;
 
-       if (request < tegra_lp2_exit_latency) {
+       if (request < tegra_pg_exit_latency) {
                tegra2_cpu_clear_resettable();
                cpu_do_idle();
                return false;
@@ -305,7 +305,7 @@ bool tegra2_idle_lp2(struct cpuidle_device *dev,
                        struct cpuidle_state *state)
 {
        s64 request = ktime_to_us(tick_nohz_get_sleep_length());
-       bool last_cpu = tegra_set_cpu_in_lp2(dev->cpu);
+       bool last_cpu = tegra_set_cpu_in_pd(dev->cpu);
        bool entered_lp2 = false;
 
        cpu_pm_enter();
@@ -329,7 +329,7 @@ bool tegra2_idle_lp2(struct cpuidle_device *dev,
        }
 
        cpu_pm_exit();
-       tegra_clear_cpu_in_lp2(dev->cpu);
+       tegra_clear_cpu_in_pd(dev->cpu);
 
        return entered_lp2;
 }
index 3d588aa..bde4dfb 100644 (file)
@@ -177,7 +177,7 @@ bool tegra3_lp2_is_allowed(struct cpuidle_device *dev,
        if (state->exit_latency != lp2_exit_latencies[cpu_number(dev->cpu)]) {
                /* possible on the 1st entry after cluster switch*/
                state->exit_latency = lp2_exit_latencies[cpu_number(dev->cpu)];
-               tegra_lp2_update_target_residency(state);
+               tegra_pd_update_target_residency(state);
        }
        if (request < state->target_residency) {
                /* Not enough time left to enter LP2 */
@@ -262,7 +262,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
                }
 
                /* Cancel LP2 wake timers for all secondary CPUs */
-               tegra_lp2_timer_cancel_secondary();
+               tegra_pd_timer_cancel_secondary();
 
                /* Save and disable the affinity setting for the other
                   CPUs and route all interrupts to CPU0. */
@@ -286,7 +286,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev,
        if (!is_lp_cluster())
                tegra_dvfs_rail_off(tegra_cpu_rail, entry_time);
 
-       if (tegra_idle_lp2_last(sleep_time, 0) == 0)
+       if (tegra_idle_power_down_last(sleep_time, 0) == 0)
                sleep_completed = true;
        else {
                int irq = tegra_gic_pending_interrupt();
@@ -410,7 +410,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        }
 #endif
 
-       if (!tegra_is_lp2_timer_ready(dev->cpu) ||
+       if (!tegra_is_cpu_wake_timer_ready(dev->cpu) ||
            (request < state->target_residency) ||
            (!ts) || (ts->nohz_mode == NOHZ_MODE_INACTIVE)) {
                /*
@@ -427,13 +427,13 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        sleep_time = request - state->exit_latency;
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
        tegra_twd_suspend(&twd_context);
-       tegra_lp2_set_trigger(sleep_time);
+       tegra_pd_set_trigger(sleep_time);
 #endif
 #ifdef CONFIG_ARM_ARCH_TIMER
        sleep_time = request - state->exit_latency;
        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
        arch_timer_suspend(&timer_context);
-       tegra_lp2_set_trigger(sleep_time);
+       tegra_pd_set_trigger(sleep_time);
 #endif
 #endif
        idle_stats.tear_down_count[cpu_number(dev->cpu)]++;
@@ -466,8 +466,8 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
                sleep_completed = (timer_context.cntp_tval <= 0);
 #endif
 #else
-       sleep_completed = !tegra_lp2_timer_remain();
-       tegra_lp2_set_trigger(0);
+       sleep_completed = !tegra_pd_timer_remain();
+       tegra_pd_set_trigger(0);
 #ifdef CONFIG_HAVE_ARM_TWD
        tegra_twd_resume(&twd_context);
 #endif
@@ -501,7 +501,7 @@ bool tegra3_idle_lp2(struct cpuidle_device *dev,
                           struct cpuidle_state *state)
 {
        s64 request = ktime_to_us(tick_nohz_get_sleep_length());
-       bool last_cpu = tegra_set_cpu_in_lp2(dev->cpu);
+       bool last_cpu = tegra_set_cpu_in_pd(dev->cpu);
        bool entered_lp2;
 
        if ((dev->cpu == 0) && last_cpu)
@@ -513,7 +513,7 @@ bool tegra3_idle_lp2(struct cpuidle_device *dev,
                entered_lp2 = false;
        }
 
-       tegra_clear_cpu_in_lp2(dev->cpu);
+       tegra_clear_cpu_in_pd(dev->cpu);
 
        return entered_lp2;
 }
@@ -625,7 +625,7 @@ int __init tegra3_cpuidle_init_soc(struct tegra_cpuidle_ops *idle_ops)
        twd_clk = tegra_get_clock_by_name("twd");
 
        for (i = 0; i < ARRAY_SIZE(lp2_exit_latencies); i++)
-               lp2_exit_latencies[i] = tegra_lp2_exit_latency;
+               lp2_exit_latencies[i] = tegra_pg_exit_latency;
 
        *idle_ops = ops;
 
index 6155be0..24d99ae 100644 (file)
@@ -51,9 +51,9 @@
 #include "sleep.h"
 #include "timer.h"
 
-int tegra_lp2_exit_latency;
-static int tegra_lp2_power_off_time;
-static unsigned int tegra_lp2_min_residency;
+int tegra_pg_exit_latency;
+static int tegra_pd_power_off_time;
+static unsigned int tegra_pd_min_residency;
 
 static int tegra_idle_enter_clock_gating(struct cpuidle_device *dev,
                                int index);
@@ -91,42 +91,45 @@ static int tegra_idle_enter_clock_gating(struct cpuidle_device *dev,
        return index;
 }
 
-static bool lp2_in_idle __read_mostly = false;
+static bool power_down_in_idle __read_mostly;
 
 #ifdef CONFIG_PM_SLEEP
-static bool lp2_in_idle_modifiable __read_mostly = true;
-static bool lp2_disabled_by_suspend;
+static bool pd_in_idle_modifiable __read_mostly = true;
+static bool pd_disabled_by_suspend;
 static struct tegra_cpuidle_ops tegra_idle_ops;
 
-void tegra_lp2_in_idle(bool enable)
+void tegra_pd_in_idle(bool enable)
 {
-       /* If LP2 in idle is permanently disabled it can't be re-enabled. */
-       if (lp2_in_idle_modifiable) {
-               lp2_in_idle = enable;
-               lp2_in_idle_modifiable = enable;
+       /*
+        * If power down in idle is permanently disabled it can't be
+        * re-enabled.
+        */
+       if (pd_in_idle_modifiable) {
+               power_down_in_idle = enable;
+               pd_in_idle_modifiable = enable;
                if (!enable)
                        pr_warn("LP2 in idle disabled\n");
        }
 }
 
-void tegra_lp2_update_target_residency(struct cpuidle_state *state)
+void tegra_pd_update_target_residency(struct cpuidle_state *state)
 {
        state->target_residency = state->exit_latency +
-               tegra_lp2_power_off_time;
-       if (state->target_residency < tegra_lp2_min_residency)
-               state->target_residency = tegra_lp2_min_residency;
+               tegra_pd_power_off_time;
+       if (state->target_residency < tegra_pd_min_residency)
+               state->target_residency = tegra_pd_min_residency;
 }
 
-static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
+static int tegra_idle_enter_pd(struct cpuidle_device *dev,
        int index)
 {
        ktime_t enter, exit;
        s64 us;
        struct cpuidle_state *state = &dev->states[index];
-       bool entered_lp2;
+       bool powered_down;
 
-       if (!lp2_in_idle || lp2_disabled_by_suspend ||
-           !tegra_idle_ops.lp2_is_allowed(dev, state)) {
+       if (!power_down_in_idle || pd_disabled_by_suspend ||
+           !tegra_idle_ops.pd_is_allowed(dev, state)) {
                return dev->states[dev->safe_state_index].enter(dev,
                                        dev->safe_state_index);
        }
@@ -139,8 +142,8 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
 
        enter = ktime_get();
 
-       tegra_idle_ops.cpu_idle_stats_lp2_ready(dev->cpu);
-       entered_lp2 = tegra_idle_ops.tegra_idle_lp2(dev, state);
+       tegra_idle_ops.cpu_idle_stats_pd_ready(dev->cpu);
+       powered_down = tegra_idle_ops.tegra_idle_pd(dev, state);
 
        trace_cpu_powergate_rcuidle((unsigned long)readl(
                                            IO_ADDRESS(TEGRA_TMR1_BASE)
@@ -156,14 +159,14 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
        smp_rmb();
 
        /* Update LP2 latency provided no fall back to clock gating */
-       if (entered_lp2) {
-               tegra_lp2_set_global_latency(state);
-               tegra_lp2_update_target_residency(state);
+       if (powered_down) {
+               tegra_pd_set_global_latency(state);
+               tegra_pd_update_target_residency(state);
        }
-       tegra_idle_ops.cpu_idle_stats_lp2_time(dev->cpu, us);
+       tegra_idle_ops.cpu_idle_stats_pd_time(dev->cpu, us);
 
        dev->last_residency = (int)us;
-       return (entered_lp2) ? index : 0;
+       return (powered_down) ? index : 0;
 }
 #endif
 
@@ -198,11 +201,11 @@ static int tegra_cpuidle_register_device(unsigned int cpu)
        state->exit_latency = tegra_cpu_power_good_time();
        state->target_residency = tegra_cpu_power_off_time() +
                tegra_cpu_power_good_time();
-       if (state->target_residency < tegra_lp2_min_residency)
-               state->target_residency = tegra_lp2_min_residency;
+       if (state->target_residency < tegra_pd_min_residency)
+               state->target_residency = tegra_pd_min_residency;
        state->power_usage = 0;
        state->flags = CPUIDLE_FLAG_TIME_VALID;
-       state->enter = tegra_idle_enter_lp2;
+       state->enter = tegra_idle_enter_pd;
        dev->state_count++;
 #endif
 
@@ -220,9 +223,9 @@ static int tegra_cpuidle_pm_notify(struct notifier_block *nb,
 {
 #ifdef CONFIG_PM_SLEEP
        if (event == PM_SUSPEND_PREPARE)
-               lp2_disabled_by_suspend = true;
+               pd_disabled_by_suspend = true;
        else if (event == PM_POST_SUSPEND)
-               lp2_disabled_by_suspend = false;
+               pd_disabled_by_suspend = false;
 #endif
 
        return NOTIFY_OK;
@@ -244,9 +247,9 @@ static int __init tegra_cpuidle_init(void)
        }
 
 #ifdef CONFIG_PM_SLEEP
-       tegra_lp2_min_residency = tegra_cpu_lp2_min_residency();
-       tegra_lp2_exit_latency = tegra_cpu_power_good_time();
-       tegra_lp2_power_off_time = tegra_cpu_power_off_time();
+       tegra_pd_min_residency = tegra_cpu_lp2_min_residency();
+       tegra_pg_exit_latency = tegra_cpu_power_good_time();
+       tegra_pd_power_off_time = tegra_cpu_power_off_time();
 
        tegra_cpuidle_init_soc(&tegra_idle_ops);
 #endif
@@ -271,13 +274,16 @@ static void __exit tegra_cpuidle_exit(void)
 }
 module_exit(tegra_cpuidle_exit);
 
-static int lp2_in_idle_set(const char *arg, const struct kernel_param *kp)
+static int pd_in_idle_set(const char *arg, const struct kernel_param *kp)
 {
 #ifdef CONFIG_PM_SLEEP
        int ret;
 
-       /* If LP2 in idle is permanently disabled it can't be re-enabled. */
-       if (lp2_in_idle_modifiable) {
+       /*
+        * If power down in idle is permanently disabled it can't be
+        * re-enabled.
+        */
+       if (pd_in_idle_modifiable) {
                ret = param_set_bool(arg, kp);
                return ret;
        }
@@ -285,26 +291,26 @@ static int lp2_in_idle_set(const char *arg, const struct kernel_param *kp)
        return -ENODEV;
 }
 
-static int lp2_in_idle_get(char *buffer, const struct kernel_param *kp)
+static int pd_in_idle_get(char *buffer, const struct kernel_param *kp)
 {
        return param_get_bool(buffer, kp);
 }
 
-static struct kernel_param_ops lp2_in_idle_ops = {
-       .set = lp2_in_idle_set,
-       .get = lp2_in_idle_get,
+static struct kernel_param_ops pd_in_idle_ops = {
+       .set = pd_in_idle_set,
+       .get = pd_in_idle_get,
 };
-module_param_cb(lp2_in_idle, &lp2_in_idle_ops, &lp2_in_idle, 0644);
+module_param_cb(power_down_in_idle, &pd_in_idle_ops, &power_down_in_idle, 0644);
 
 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_PM_SLEEP)
-static int tegra_lp2_debug_open(struct inode *inode, struct file *file)
+static int tegra_pd_debug_open(struct inode *inode, struct file *file)
 {
-       return single_open(file, tegra_idle_ops.lp2_debug_show,
+       return single_open(file, tegra_idle_ops.pd_debug_show,
                                inode->i_private);
 }
 
-static const struct file_operations tegra_lp2_debug_ops = {
-       .open           = tegra_lp2_debug_open,
+static const struct file_operations tegra_pd_debug_ops = {
+       .open           = tegra_pd_debug_open,
        .read           = seq_read,
        .llseek         = seq_lseek,
        .release        = single_release,
@@ -319,8 +325,8 @@ static int __init tegra_cpuidle_debug_init(void)
        if (!dir)
                return -ENOMEM;
 
-       d = debugfs_create_file("lp2", S_IRUGO, dir, NULL,
-               &tegra_lp2_debug_ops);
+       d = debugfs_create_file("power_down_stats", S_IRUGO, dir, NULL,
+               &tegra_pd_debug_ops);
        if (!d)
                return -ENOMEM;
 
index 08a41af..631dd33 100644 (file)
 
 #ifdef CONFIG_PM_SLEEP
 
-extern int tegra_lp2_exit_latency;
+extern int tegra_pg_exit_latency;
 
 struct tegra_cpuidle_ops {
-       bool (*tegra_idle_lp2)(struct cpuidle_device *dev,
+       bool (*tegra_idle_pd)(struct cpuidle_device *dev,
                                struct cpuidle_state *state);
-       void (*cpu_idle_stats_lp2_ready)(unsigned int cpu);
-       void (*cpu_idle_stats_lp2_time)(unsigned int cpu, s64 us);
-       bool (*lp2_is_allowed)(struct cpuidle_device *dev,
+       void (*cpu_idle_stats_pd_ready)(unsigned int cpu);
+       void (*cpu_idle_stats_pd_time)(unsigned int cpu, s64 us);
+       bool (*pd_is_allowed)(struct cpuidle_device *dev,
                                struct cpuidle_state *state);
 #ifdef CONFIG_DEBUG_FS
-       int (*lp2_debug_show)(struct seq_file *s, void *data);
+       int (*pd_debug_show)(struct seq_file *s, void *data);
 #endif
 };
 
@@ -54,22 +54,22 @@ static inline int tegra_cpuidle_init_soc(struct tegra_cpuidle_ops *ops)
 #endif
 }
 
-static inline void tegra_lp2_set_global_latency(struct cpuidle_state *state)
+static inline void tegra_pd_set_global_latency(struct cpuidle_state *state)
 {
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
-       state->exit_latency = tegra_lp2_exit_latency;
+       state->exit_latency = tegra_pg_exit_latency;
 #endif
        /* Tegra3 does not use global exit latency */
 }
 
-void tegra_lp2_update_target_residency(struct cpuidle_state *state);
+void tegra_pd_update_target_residency(struct cpuidle_state *state);
 
 #endif /* CONFIG_PM_SLEEP */
 
 #if defined(CONFIG_CPU_IDLE) && defined(CONFIG_PM_SLEEP)
-void tegra_lp2_in_idle(bool enable);
+void tegra_pd_in_idle(bool enable);
 #else
-static inline void tegra_lp2_in_idle(bool enable) {}
+static inline void tegra_pd_in_idle(bool enable) {}
 #endif
 
 #endif
index d989a90..6d2e9a2 100644 (file)
@@ -453,30 +453,30 @@ int tegra_cluster_control(unsigned int us, unsigned int flags)
 
        if (flags & TEGRA_POWER_SDRAM_SELFREFRESH) {
                if (us)
-                       tegra_lp2_set_trigger(us);
+                       tegra_pd_set_trigger(us);
 
                tegra_cluster_switch_prolog(flags);
                tegra_suspend_dram(TEGRA_SUSPEND_LP1, flags);
                tegra_cluster_switch_epilog(flags);
 
                if (us)
-                       tegra_lp2_set_trigger(0);
+                       tegra_pd_set_trigger(0);
        } else {
                int cpu;
 
                cpu = cpu_logical_map(smp_processor_id());
 
-               tegra_set_cpu_in_lp2(cpu);
+               tegra_set_cpu_in_pd(cpu);
                cpu_pm_enter();
                if (!timekeeping_suspended)
                        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER,
                                           &cpu);
-               tegra_idle_lp2_last(0, flags);
+               tegra_idle_power_down_last(0, flags);
                if (!timekeeping_suspended)
                        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT,
                                           &cpu);
                cpu_pm_exit();
-               tegra_clear_cpu_in_lp2(cpu);
+               tegra_clear_cpu_in_pd(cpu);
        }
        local_irq_restore(irq_flags);
 
index 9232a16..fab0c39 100644 (file)
@@ -498,7 +498,7 @@ static void suspend_cpu_complex(u32 mode)
        tegra_gic_cpu_disable(true);
 }
 
-void tegra_clear_cpu_in_lp2(int cpu)
+void tegra_clear_cpu_in_pd(int cpu)
 {
        spin_lock(&tegra_lp2_lock);
        BUG_ON(!cpumask_test_cpu(cpu, &tegra_in_lp2));
@@ -514,7 +514,7 @@ void tegra_clear_cpu_in_lp2(int cpu)
        spin_unlock(&tegra_lp2_lock);
 }
 
-bool tegra_set_cpu_in_lp2(int cpu)
+bool tegra_set_cpu_in_pd(int cpu)
 {
        bool last_cpu = false;
 
@@ -570,7 +570,8 @@ static inline void tegra_sleep_cpu(unsigned long v2p)
        cpu_suspend(v2p, tegra_sleep_cpu_finish);
 }
 
-unsigned int tegra_idle_lp2_last(unsigned int sleep_time, unsigned int flags)
+unsigned int tegra_idle_power_down_last(unsigned int sleep_time,
+                                       unsigned int flags)
 {
        u32 reg;
        unsigned int remain;
@@ -643,7 +644,7 @@ unsigned int tegra_idle_lp2_last(unsigned int sleep_time, unsigned int flags)
        }
 
        if (sleep_time)
-               tegra_lp2_set_trigger(sleep_time);
+               tegra_pd_set_trigger(sleep_time);
 
        cpu_cluster_pm_enter();
        suspend_cpu_complex(flags);
@@ -667,9 +668,9 @@ unsigned int tegra_idle_lp2_last(unsigned int sleep_time, unsigned int flags)
        restore_cpu_complex(flags);
        cpu_cluster_pm_exit();
 
-       remain = tegra_lp2_timer_remain();
+       remain = tegra_pd_timer_remain();
        if (sleep_time)
-               tegra_lp2_set_trigger(0);
+               tegra_pd_set_trigger(0);
 
        if (flags & TEGRA_POWER_CLUSTER_MASK) {
                tegra_cluster_switch_epilog(flags);
@@ -1299,7 +1300,7 @@ out:
 fail:
 #endif
        if (plat->suspend_mode == TEGRA_SUSPEND_NONE)
-               tegra_lp2_in_idle(false);
+               tegra_pd_in_idle(false);
 
        current_suspend_mode = plat->suspend_mode;
 }
index 0811ff4..aebe205 100644 (file)
@@ -89,8 +89,8 @@ unsigned long tegra_cpu_lp2_min_residency(void);
 unsigned long tegra_min_residency_noncpu(void);
 unsigned long tegra_min_residency_crail(void);
 #endif
-void tegra_clear_cpu_in_lp2(int cpu);
-bool tegra_set_cpu_in_lp2(int cpu);
+void tegra_clear_cpu_in_pd(int cpu);
+bool tegra_set_cpu_in_pd(int cpu);
 
 int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags);
 
@@ -122,7 +122,7 @@ u64 tegra_rtc_read_ms(void);
  */
 extern void (*tegra_deep_sleep)(int);
 
-unsigned int tegra_idle_lp2_last(unsigned int us, unsigned int flags);
+unsigned int tegra_idle_power_down_last(unsigned int us, unsigned int flags);
 
 #if defined(CONFIG_PM_SLEEP) && !defined(CONFIG_ARCH_TEGRA_2x_SOC)
 void tegra_lp0_suspend_mc(void);
@@ -177,7 +177,7 @@ unsigned long tegra2_lp2_timer_remain(void);
 #else
 void tegra3_lp2_set_trigger(unsigned long cycles);
 unsigned long tegra3_lp2_timer_remain(void);
-int tegra3_is_lp2_timer_ready(unsigned int cpu);
+int tegra3_is_cpu_wake_timer_ready(unsigned int cpu);
 void tegra3_lp2_timer_cancel_secondary(void);
 #endif
 
@@ -188,7 +188,7 @@ static inline void tegra_lp0_suspend_init(void)
 #endif
 }
 
-static inline void tegra_lp2_set_trigger(unsigned long cycles)
+static inline void tegra_pd_set_trigger(unsigned long cycles)
 {
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
        tegra2_lp2_set_trigger(cycles);
@@ -197,7 +197,7 @@ static inline void tegra_lp2_set_trigger(unsigned long cycles)
 #endif
 }
 
-static inline unsigned long tegra_lp2_timer_remain(void)
+static inline unsigned long tegra_pd_timer_remain(void)
 {
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
        return tegra2_lp2_timer_remain();
@@ -206,16 +206,16 @@ static inline unsigned long tegra_lp2_timer_remain(void)
 #endif
 }
 
-static inline int tegra_is_lp2_timer_ready(unsigned int cpu)
+static inline int tegra_is_cpu_wake_timer_ready(unsigned int cpu)
 {
 #if defined(CONFIG_TEGRA_LP2_CPU_TIMER) || defined(CONFIG_ARCH_TEGRA_2x_SOC)
        return 1;
 #else
-       return tegra3_is_lp2_timer_ready(cpu);
+       return tegra3_is_cpu_wake_timer_ready(cpu);
 #endif
 }
 
-static inline void tegra_lp2_timer_cancel_secondary(void)
+static inline void tegra_pd_timer_cancel_secondary(void)
 {
 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
        tegra3_lp2_timer_cancel_secondary();
index 85889e7..5a5e259 100644 (file)
@@ -184,7 +184,7 @@ static void tegra3_register_wake_timer(unsigned int cpu)
        test_lp2_wake_timer(cpu);
        return;
 fail:
-       tegra_lp2_in_idle(false);
+       tegra_pd_in_idle(false);
 }
 
 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_HOTPLUG_CPU)
@@ -234,7 +234,7 @@ unsigned long tegra3_lp2_timer_remain(void)
        return timer_readl(lp2_wake_timers[cpu] + TIMER_PCR) & 0x1ffffffful;
 }
 
-int tegra3_is_lp2_timer_ready(unsigned int cpu)
+int tegra3_is_cpu_wake_timer_ready(unsigned int cpu)
 {
        return cpumask_test_cpu(cpu, &wake_timer_ready);
 }