ARM: tegra: ardbeg: Add E1733 & E1735 power tree
Pradeep Goudagunta [Mon, 17 Jun 2013 12:47:09 +0000 (17:47 +0530)]
-Add E1733 and E1735 power tree.
-Cleanup existing code.

Bug 1259655
Bug 1298668

Change-Id: Iee914e10f552812e9cfa0a23399e1d4d34fe50b7
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/236281
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arch/arm/mach-tegra/board-ardbeg-power.c
arch/arm/mach-tegra/board-ardbeg.h
arch/arm/mach-tegra/board-laguna-power.c
arch/arm/mach-tegra/board-pmu-defines.h
arch/arm/mach-tegra/tegra-board-id.h

index f19ae47..363ecfb 100644 (file)
@@ -18,6 +18,8 @@
  */
 
 #include <linux/i2c.h>
+#include <linux/i2c/pca954x.h>
+#include <linux/i2c/pca953x.h>
 #include <linux/platform_device.h>
 #include <linux/resource.h>
 #include <linux/io.h>
@@ -25,6 +27,8 @@
 #include <mach/hardware.h>
 #include <linux/regulator/fixed.h>
 #include <linux/mfd/palmas.h>
+#include <linux/mfd/as3722-reg.h>
+#include <linux/mfd/as3722-plat.h>
 #include <linux/regulator/tps51632-regulator.h>
 #include <linux/regulator/machine.h>
 #include <linux/irq.h>
 #include "board-pmu-defines.h"
 #include "devices.h"
 #include "iomap.h"
+#include "tegra-board-id.h"
 
 #define PMC_CTRL                0x0
 #define PMC_CTRL_INTR_LOW       (1 << 17)
 
+#define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,  \
+               _tstep, _vsel)                                          \
+       static struct palmas_reg_init reg_init_data_##_name = {         \
+               .warm_reset = _warm_reset,                              \
+               .roof_floor =   _roof_floor,                            \
+               .mode_sleep = _mode_sleep,              \
+               .tstep = _tstep,                        \
+               .vsel = _vsel,          \
+       }
+
+
+/************************ ARDBEG E1733 based regulators ***********/
+static struct regulator_consumer_supply as3722_ldo0_supply[] = {
+       REGULATOR_SUPPLY("avdd_pll_m", NULL),
+       REGULATOR_SUPPLY("avdd_pll_ap_c2_c3", NULL),
+       REGULATOR_SUPPLY("avdd_pll_cud2dpd", NULL),
+       REGULATOR_SUPPLY("avdd_pll_c4", NULL),
+       REGULATOR_SUPPLY("avdd_lvds0_io", NULL),
+       REGULATOR_SUPPLY("vddio_ddr_hs", NULL),
+       REGULATOR_SUPPLY("avdd_pll_erefe", NULL),
+       REGULATOR_SUPPLY("avdd_pll_x", NULL),
+       REGULATOR_SUPPLY("avdd_pll_cg", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo1_supply[] = {
+       REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
+       REGULATOR_SUPPLY("vdd_cam1_1v8_cam", NULL),
+       REGULATOR_SUPPLY("vdd_cam2_1v8_cam", NULL),
+
+};
+
+static struct regulator_consumer_supply as3722_ldo2_supply[] = {
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-xhci"),
+       REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
+       REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
+       REGULATOR_SUPPLY("avdd_dsi_csi", "vi"),
+       REGULATOR_SUPPLY("avdd_hsic_com", NULL),
+       REGULATOR_SUPPLY("avdd_hsic_mdm", NULL),
+       REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo3_supply[] = {
+       REGULATOR_SUPPLY("vdd_rtc", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo4_supply[] = {
+       REGULATOR_SUPPLY("vdd_2v7_hv", NULL),
+       REGULATOR_SUPPLY("avdd_cam1_cam", NULL),
+       REGULATOR_SUPPLY("avdd_cam2_cam", NULL),
+       REGULATOR_SUPPLY("avdd_cam3_cam", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo5_supply[] = {
+       REGULATOR_SUPPLY("vdd_1v2_cam", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo6_supply[] = {
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
+       REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo7_supply[] = {
+       REGULATOR_SUPPLY("vdd_cam_1v1_cam", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo9_supply[] = {
+       REGULATOR_SUPPLY("avdd", "spi0.0"),
+};
+
+static struct regulator_consumer_supply as3722_ldo10_supply[] = {
+       REGULATOR_SUPPLY("avdd_af1_cam", NULL),
+};
+
+static struct regulator_consumer_supply as3722_ldo11_supply[] = {
+       REGULATOR_SUPPLY("vpp_fuse", NULL),
+};
+
+static struct regulator_consumer_supply as3722_sd0_supply[] = {
+       REGULATOR_SUPPLY("vdd_cpu", NULL),
+};
+
+static struct regulator_consumer_supply as3722_sd1_supply[] = {
+       REGULATOR_SUPPLY("vdd_core", NULL),
+};
+
+static struct regulator_consumer_supply as3722_sd2_supply[] = {
+       REGULATOR_SUPPLY("vddio_ddr", NULL),
+       REGULATOR_SUPPLY("vddio_ddr_mclk", NULL),
+       REGULATOR_SUPPLY("vddio_ddr3", NULL),
+       REGULATOR_SUPPLY("vcore1_ddr3", NULL),
+};
+
+static struct regulator_consumer_supply as3722_sd4_supply[] = {
+       REGULATOR_SUPPLY("avdd_pex_pll", "tegra-pcie"),
+       REGULATOR_SUPPLY("avddio_pex", "tegra-pcie"),
+       REGULATOR_SUPPLY("dvddio_pex", "tegra-pcie"),
+};
+
+static struct regulator_consumer_supply as3722_sd5_supply[] = {
+       REGULATOR_SUPPLY("vddio_sys", NULL),
+       REGULATOR_SUPPLY("vddio_sys_2", NULL),
+       REGULATOR_SUPPLY("vddio_audio", NULL),
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
+       REGULATOR_SUPPLY("vddio_uart", NULL),
+       REGULATOR_SUPPLY("vddio_bb", NULL),
+       REGULATOR_SUPPLY("vddio_gmi", NULL),
+       REGULATOR_SUPPLY("avdd_osc", NULL),
+       REGULATOR_SUPPLY("dvdd", "spi0.0"),
+       /* emmc 1.8v misssing
+       keyboard & touchpad 1.8v missing */
+};
+
+static struct regulator_consumer_supply as3722_sd6_supply[] = {
+       REGULATOR_SUPPLY("vdd_gpu", NULL),
+};
+
+AMS_PDATA_INIT(sd0, NULL, 900000, 1400000, 1, 1, 1);
+AMS_PDATA_INIT(sd1, NULL, 900000, 1400000, 1, 1, 1);
+AMS_PDATA_INIT(sd2, NULL, 1350000, 1350000, 1, 1, 1);
+AMS_PDATA_INIT(sd4, NULL, 1050000, 1050000, 0, 0, 1);
+AMS_PDATA_INIT(sd5, NULL, 1800000, 1800000, 1, 1, 1);
+AMS_PDATA_INIT(sd6, NULL, 900000, 1400000, 0, 1, 1);
+AMS_PDATA_INIT(ldo0, AS3722_SUPPLY(sd2), 1050000, 1250000, 0, 1, 1);
+AMS_PDATA_INIT(ldo1, NULL, 1800000, 1800000, 0, 1, 1);
+AMS_PDATA_INIT(ldo2, AS3722_SUPPLY(sd5), 1200000, 1200000, 0, 1, 1);
+AMS_PDATA_INIT(ldo3, NULL, 1000000, 1000000, 0, 1, 1);
+AMS_PDATA_INIT(ldo4, NULL, 2700000, 2700000, 0, 0, 1);
+AMS_PDATA_INIT(ldo5, AS3722_SUPPLY(sd5), 1200000, 1200000, 0, 0, 1);
+AMS_PDATA_INIT(ldo6, NULL, 3300000, 3300000, 0, 0, 1);
+AMS_PDATA_INIT(ldo7, AS3722_SUPPLY(sd5), 1050000, 1050000, 0, 0, 1);
+AMS_PDATA_INIT(ldo9, NULL, 3300000, 3300000, 0, 0, 1);
+AMS_PDATA_INIT(ldo10, NULL, 2700000, 2700000, 0, 0, 1);
+AMS_PDATA_INIT(ldo11, NULL, 1800000, 1800000, 0, 1, 1);
+
+/* config settings are OTP plus initial state
+ * GPIOsignal_out at 20h not configurable through OTP and is initialized to
+ * zero. To enable output, the invert bit must be turned on.
+ * GPIOxcontrol register format
+ * bit(s)  bitname
+ * ---------------------
+ *  7     gpiox_invert   invert input or output
+ * 6:3    gpiox_iosf     0: normal
+ * 2:0    gpiox_mode     0: input, 1: output push/pull, 3: ADC input (tristate)
+ *
+ * Examples:
+ * otp  meaning
+ * ------------
+ * 0x3  gpiox_invert=0(no invert), gpiox_iosf=0(normal), gpiox_mode=3(ADC input)
+ * 0x81 gpiox_invert=1(invert), gpiox_iosf=0(normal), gpiox_mode=1(output)
+ *
+ * Note: output state should be defined for gpiox_mode = output.  Do not change
+ * the state of the invert bit for critical devices such as GPIO 7 which enables
+ * SDRAM. Driver applies invert mask to output state to configure GPIOsignal_out
+ * register correctly.
+ * E.g. Invert = 1, (requested) output state = 1 => GPIOsignal_out = 0
+ */
+static struct as3722_gpio_config as3722_gpio_cfgs[] = {
+       {
+               /* otp = 0x3 IGPU_PRDGD*/
+               .gpio = AS3722_GPIO0,
+               .mode = AS3722_GPIO_MODE_OUTPUT_VDDL,
+       },
+       {
+               /* otp = 0x1  => REGEN_3 = LP0 gate (1.8V, 5 V)*/
+               .gpio = AS3722_GPIO1,
+               .invert     = AS3722_GPIO_CFG_INVERT, /* don't go into LP0 */
+               .mode       = AS3722_GPIO_MODE_OUTPUT_VDDH,
+               .output_state = AS3722_GPIO_CFG_OUTPUT_ENABLED,
+       },
+       {
+               /* otp = 0x3 PMU_REGEN1*/
+               .gpio = AS3722_GPIO2,
+               .invert     = AS3722_GPIO_CFG_NO_INVERT, /* don't go into LP0 */
+               .mode       = AS3722_GPIO_MODE_OUTPUT_VDDH,
+               .output_state = AS3722_GPIO_CFG_OUTPUT_ENABLED,
+       },
+       {
+               /* otp = 0x03 AP THERMISTOR */
+               .gpio = AS3722_GPIO3,
+               .mode = AS3722_GPIO_MODE_ADC_IN,
+       },
+       {
+               /* otp = 0x81 => on by default
+                * gates EN_AVDD_LCD
+                */
+               .gpio       = AS3722_GPIO4,
+               .invert     = AS3722_GPIO_CFG_NO_INVERT,
+               .mode       = AS3722_GPIO_MODE_OUTPUT_VDDH,
+               .output_state = AS3722_GPIO_CFG_OUTPUT_ENABLED,
+       },
+       {
+               /* otp = 0x3  CLK 23KHZ WIFI */
+               .gpio = AS3722_GPIO5,
+               .mode = AS3722_GPIO_MODE_ADC_IN,
+       },
+       {
+               /* otp = 0x3  SKIN TEMP */
+               .gpio = AS3722_GPIO6,
+               .mode = AS3722_GPIO_MODE_ADC_IN,
+       },
+       {
+               /* otp = 0x81  1.6V LP0*/
+               .gpio       = AS3722_GPIO7,
+               .invert     = AS3722_GPIO_CFG_INVERT,
+               .mode       = AS3722_GPIO_MODE_OUTPUT_VDDH,
+               .output_state = AS3722_GPIO_CFG_OUTPUT_ENABLED,
+       },
+};
+
+static struct as3722_platform_data as3722_pdata = {
+       .reg_pdata[AS3722_SD0] = &as3722_sd0_reg_pdata,
+       .reg_pdata[AS3722_SD1] = &as3722_sd1_reg_pdata,
+       .reg_pdata[AS3722_SD2] = &as3722_sd2_reg_pdata,
+       .reg_pdata[AS3722_SD4] = &as3722_sd4_reg_pdata,
+       .reg_pdata[AS3722_SD5] = &as3722_sd5_reg_pdata,
+       .reg_pdata[AS3722_SD6] = &as3722_sd6_reg_pdata,
+       .reg_pdata[AS3722_LDO0] = &as3722_ldo0_reg_pdata,
+       .reg_pdata[AS3722_LDO1] = &as3722_ldo1_reg_pdata,
+       .reg_pdata[AS3722_LDO2] = &as3722_ldo2_reg_pdata,
+       .reg_pdata[AS3722_LDO3] = &as3722_ldo3_reg_pdata,
+       .reg_pdata[AS3722_LDO4] = &as3722_ldo4_reg_pdata,
+       .reg_pdata[AS3722_LDO5] = &as3722_ldo5_reg_pdata,
+       .reg_pdata[AS3722_LDO6] = &as3722_ldo6_reg_pdata,
+       .reg_pdata[AS3722_LDO7] = &as3722_ldo7_reg_pdata,
+       .reg_pdata[AS3722_LDO9] = &as3722_ldo9_reg_pdata,
+       .reg_pdata[AS3722_LDO10] = &as3722_ldo10_reg_pdata,
+       .reg_pdata[AS3722_LDO11] = &as3722_ldo11_reg_pdata,
+       .core_init_data = NULL,
+       .gpio_base = AS3722_GPIO_BASE,
+       .irq_base = AS3722_IRQ_BASE,
+       .use_internal_int_pullup = 0,
+       .use_internal_i2c_pullup = 0,
+       .num_gpio_cfgs = ARRAY_SIZE(as3722_gpio_cfgs),
+       .gpio_cfgs     = as3722_gpio_cfgs,
+};
+
+static struct pca953x_platform_data tca6416_pdata = {
+       .gpio_base = PMU_TCA6416_GPIO_BASE,
+};
+
+static const struct i2c_board_info tca6416_expander[] = {
+       {
+               I2C_BOARD_INFO("tca6416", 0x20),
+               .platform_data = &tca6416_pdata,
+       },
+};
+
+
+static struct i2c_board_info __initdata as3722_regulators[] = {
+       {
+               I2C_BOARD_INFO("as3722", 0x40),
+               .flags = I2C_CLIENT_WAKE,
+               .irq = INT_EXTERNAL_PMU,
+               .platform_data = &as3722_pdata,
+       },
+};
+
+int __init ardbeg_as3722_regulator_init(void)
+{
+       void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+       u32 pmc_ctrl;
+
+
+       /* AS3722: Normal state of INT request line is LOW.
+        * configure the power management controller to trigger PMU
+        * interrupts when HIGH.
+        */
+       pmc_ctrl = readl(pmc + PMC_CTRL);
+       writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+
+       pr_info("%s: i2c_register_board_info\n", __func__);
+       i2c_register_board_info(4, as3722_regulators,
+                       ARRAY_SIZE(as3722_regulators));
+       return 0;
+}
+
+int __init ardbeg_ams_regulator_init(void)
+{
+       ardbeg_as3722_regulator_init();
+       return 0;
+}
+
+/**************** ARDBEG-TI913 based regulator ************/
+#define palmas_ti913_smps123_supply as3722_sd6_supply
+#define palmas_ti913_smps45_supply as3722_sd1_supply
+#define palmas_ti913_smps6_supply as3722_sd5_supply
+#define palmas_ti913_smps7_supply as3722_sd2_supply
+#define palmas_ti913_smps9_supply as3722_sd4_supply
+#define palmas_ti913_ldo1_supply as3722_ldo0_supply
+#define palmas_ti913_ldo2_supply as3722_ldo5_supply
+#define palmas_ti913_ldo3_supply as3722_ldo9_supply
+#define palmas_ti913_ldo4_supply as3722_ldo2_supply
+#define palmas_ti913_ldo5_supply as3722_ldo4_supply
+#define palmas_ti913_ldo6_supply as3722_ldo1_supply
+#define palmas_ti913_ldo7_supply as3722_ldo10_supply
+#define palmas_ti913_ldo8_supply as3722_ldo3_supply
+#define palmas_ti913_ldo9_supply as3722_ldo6_supply
+#define palmas_ti913_ldoln_supply as3722_ldo7_supply
+#define palmas_ti913_ldousb_supply as3722_ldo11_supply
+
+static struct regulator_consumer_supply palmas_ti913_regen1_supply[] = {
+       REGULATOR_SUPPLY("vdd_3v3", NULL),
+};
+
+PALMAS_PDATA_INIT(ti913_smps123, 900, 1400, NULL, 1, 1, 1, NORMAL);
+PALMAS_PDATA_INIT(ti913_smps45, 900, 1400, NULL, 1, 1, 1, NORMAL);
+PALMAS_PDATA_INIT(ti913_smps6, 1800, 1800, NULL, 1, 1, 1, NORMAL);
+PALMAS_PDATA_INIT(ti913_smps7, 1350, 1350, NULL, 1, 1, 1, NORMAL);
+PALMAS_PDATA_INIT(ti913_smps9, 1050, 1050, NULL, 0, 0, 0, NORMAL);
+PALMAS_PDATA_INIT(ti913_ldo1, 1050, 1250, palmas_rails(ti913_smps7),
+               1, 1, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo2, 1200, 1200, palmas_rails(ti913_smps6),
+               0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo3, 3100, 3100, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo4, 1200, 1200, palmas_rails(ti913_smps6),
+               0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo5, 2700, 2700, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo6, 1800, 1800, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo7, 2700, 2700, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldo8, 1000, 1000, NULL, 1, 1, 1, NORMAL);
+PALMAS_PDATA_INIT(ti913_ldo9, 1800, 3300, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldoln, 1050, 1050, palmas_rails(ti913_smps6),
+               0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_ldousb, 1800, 1800, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ti913_regen1, 3300, 3300, NULL, 1, 1, 1, 0);
+
+#define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
+static struct regulator_init_data *ardbeg_1735_reg_data[PALMAS_NUM_REGS] = {
+       NULL,
+       PALMAS_REG_PDATA(ti913_smps123),
+       NULL,
+       PALMAS_REG_PDATA(ti913_smps45),
+       NULL,
+       PALMAS_REG_PDATA(ti913_smps6),
+       PALMAS_REG_PDATA(ti913_smps7),
+       NULL,
+       PALMAS_REG_PDATA(ti913_smps9),
+       NULL,
+       PALMAS_REG_PDATA(ti913_ldo1),
+       PALMAS_REG_PDATA(ti913_ldo2),
+       PALMAS_REG_PDATA(ti913_ldo3),
+       PALMAS_REG_PDATA(ti913_ldo4),
+       PALMAS_REG_PDATA(ti913_ldo5),
+       PALMAS_REG_PDATA(ti913_ldo6),
+       PALMAS_REG_PDATA(ti913_ldo7),
+       PALMAS_REG_PDATA(ti913_ldo8),
+       PALMAS_REG_PDATA(ti913_ldo9),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       PALMAS_REG_PDATA(ti913_ldoln),
+       PALMAS_REG_PDATA(ti913_ldousb),
+       PALMAS_REG_PDATA(ti913_regen1),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+};
+
+PALMAS_REG_INIT(ti913_smps123, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+PALMAS_REG_INIT(ti913_smps6, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_smps7, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_smps9, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo1, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo2, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo3, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo4, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo5, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo6, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo7, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo8, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldo9, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldoln, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_ldousb, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(ti913_regen1, 0, 0, 0, 0, 0);
+
+#define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
+static struct palmas_reg_init *ardbeg_1735_reg_init[PALMAS_NUM_REGS] = {
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_smps123),
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_smps45),
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_smps6),
+       PALMAS_REG_INIT_DATA(ti913_smps7),
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_smps9),
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_ldo1),
+       PALMAS_REG_INIT_DATA(ti913_ldo2),
+       PALMAS_REG_INIT_DATA(ti913_ldo3),
+       PALMAS_REG_INIT_DATA(ti913_ldo4),
+       PALMAS_REG_INIT_DATA(ti913_ldo5),
+       PALMAS_REG_INIT_DATA(ti913_ldo6),
+       PALMAS_REG_INIT_DATA(ti913_ldo7),
+       PALMAS_REG_INIT_DATA(ti913_ldo8),
+       PALMAS_REG_INIT_DATA(ti913_ldo9),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       PALMAS_REG_INIT_DATA(ti913_ldoln),
+       PALMAS_REG_INIT_DATA(ti913_ldousb),
+       PALMAS_REG_INIT_DATA(ti913_regen1),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+};
+
+static struct palmas_pinctrl_config palmas_ti913_pincfg[] = {
+       PALMAS_PINMUX(POWERGOOD, POWERGOOD, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(VAC, VAC, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO0, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO1, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO2, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO3, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO4, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO5, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO6, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO7, GPIO, DEFAULT, DEFAULT),
+};
+
+static struct palmas_pinctrl_platform_data palmas_ti913_pinctrl_pdata = {
+       .pincfg = palmas_ti913_pincfg,
+       .num_pinctrl = ARRAY_SIZE(palmas_ti913_pincfg),
+       .dvfs1_enable = true,
+       .dvfs2_enable = false,
+};
+
+static struct palmas_pmic_platform_data pmic_ti913_platform = {
+       .enable_ldo8_tracking = true,
+       .disabe_ldo8_tracking_suspend = true,
+};
+
+static struct palmas_platform_data palmas_ti913_pdata = {
+       .gpio_base = PALMAS_TEGRA_GPIO_BASE,
+       .irq_base = PALMAS_TEGRA_IRQ_BASE,
+       .pmic_pdata = &pmic_ti913_platform,
+       .use_power_off = true,
+       .pinctrl_pdata = &palmas_ti913_pinctrl_pdata,
+};
+
+static struct i2c_board_info palma_ti913_device[] = {
+       {
+               I2C_BOARD_INFO("tps65913", 0x58),
+               .irq            = INT_EXTERNAL_PMU,
+               .platform_data  = &palmas_ti913_pdata,
+       },
+};
+
+int __init ardbeg_tps65913_regulator_init(void)
+{
+       void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+       u32 pmc_ctrl;
+       int i;
+
+       /* TPS65913: Normal state of INT request line is LOW.
+        * configure the power management controller to trigger PMU
+        * interrupts when HIGH.
+        */
+       pmc_ctrl = readl(pmc + PMC_CTRL);
+       writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+       for (i = 0; i < PALMAS_NUM_REGS ; i++) {
+               pmic_ti913_platform.reg_data[i] = ardbeg_1735_reg_data[i];
+               pmic_ti913_platform.reg_init[i] = ardbeg_1735_reg_init[i];
+       }
+
+       i2c_register_board_info(4, palma_ti913_device,
+                       ARRAY_SIZE(palma_ti913_device));
+       return 0;
+}
 
 /************************ ARDBEG based regulator *****************/
 static struct regulator_consumer_supply palmas_smps12_supply[] = {
@@ -219,30 +702,30 @@ static struct regulator_consumer_supply tps51632_dcdc_cpu_supply[] = {
 };
 
 static struct regulator_init_data tps51632_cpu_init_data = {
-       .constraints = {                                                \
-               .min_uV = 500000,                                       \
-               .max_uV = 1520000,                                      \
-               .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
-                                       REGULATOR_MODE_STANDBY),        \
-               .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
-                                       REGULATOR_CHANGE_STATUS |       \
-                                        REGULATOR_CHANGE_CONTROL |     \
-                                       REGULATOR_CHANGE_VOLTAGE),      \
-               .always_on = 1,                                         \
-               .boot_on =  1,                                          \
-               .apply_uV = 0,                                          \
-       },                                                              \
-       .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_cpu_supply),  \
-       .consumer_supplies = tps51632_dcdc_cpu_supply,          \
-       .supply_regulator = palmas_rails(regen2),                       \
+       .constraints = {
+               .min_uV = 500000,
+               .max_uV = 1520000,
+               .valid_modes_mask = (REGULATOR_MODE_NORMAL |
+                                       REGULATOR_MODE_STANDBY),
+               .valid_ops_mask = (REGULATOR_CHANGE_MODE |
+                                       REGULATOR_CHANGE_STATUS |
+                                        REGULATOR_CHANGE_CONTROL |
+                                       REGULATOR_CHANGE_VOLTAGE),
+               .always_on = 1,
+               .boot_on =  1,
+               .apply_uV = 0,
+       },
+       .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_cpu_supply),
+       .consumer_supplies = tps51632_dcdc_cpu_supply,
+       .supply_regulator = palmas_rails(regen2),
 };
 
 static struct tps51632_regulator_platform_data tps51632_pdata_cpu = {
-       .reg_init_data = &tps51632_cpu_init_data,               \
-       .enable_pwm = false,                            \
-       .max_voltage_uV = 1520000,                      \
-       .base_voltage_uV = 500000,                      \
-       .slew_rate_uv_per_us = 6000,                    \
+       .reg_init_data = &tps51632_cpu_init_data,
+       .enable_pwm = false,
+       .max_voltage_uV = 1520000,
+       .base_voltage_uV = 500000,
+       .slew_rate_uv_per_us = 6000,
 };
 
 static struct i2c_board_info tps51632_cpu_boardinfo[] = {
@@ -257,30 +740,30 @@ static struct regulator_consumer_supply tps51632_dcdc_gpu_supply[] = {
 };
 
 static struct regulator_init_data tps51632_init_gpu_data = {
-       .constraints = {                                                \
-               .min_uV = 500000,                                       \
-               .max_uV = 1520000,                                      \
-               .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
-                                       REGULATOR_MODE_STANDBY),        \
-               .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
-                                       REGULATOR_CHANGE_STATUS |       \
-                                        REGULATOR_CHANGE_CONTROL |     \
-                                       REGULATOR_CHANGE_VOLTAGE),      \
-               .always_on = 1,                                         \
-               .boot_on =  1,                                          \
-               .apply_uV = 0,                                          \
-       },                                                              \
-       .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_gpu_supply),  \
-       .consumer_supplies = tps51632_dcdc_gpu_supply,          \
-       .supply_regulator = palmas_rails(regen2),                       \
+       .constraints = {
+               .min_uV = 500000,
+               .max_uV = 1520000,
+               .valid_modes_mask = (REGULATOR_MODE_NORMAL |
+                                       REGULATOR_MODE_STANDBY),
+               .valid_ops_mask = (REGULATOR_CHANGE_MODE |
+                                       REGULATOR_CHANGE_STATUS |
+                                        REGULATOR_CHANGE_CONTROL |
+                                       REGULATOR_CHANGE_VOLTAGE),
+               .always_on = 1,
+               .boot_on =  1,
+               .apply_uV = 0,
+       },
+       .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_gpu_supply),
+       .consumer_supplies = tps51632_dcdc_gpu_supply,
+       .supply_regulator = palmas_rails(regen2),
 };
 
 static struct tps51632_regulator_platform_data tps51632_pdata_gpu = {
-       .reg_init_data = &tps51632_init_gpu_data,               \
-       .enable_pwm = false,                            \
-       .max_voltage_uV = 1520000,                      \
-       .base_voltage_uV = 500000,                      \
-       .slew_rate_uv_per_us = 6000,                    \
+       .reg_init_data = &tps51632_init_gpu_data,
+       .enable_pwm = false,
+       .max_voltage_uV = 1520000,
+       .base_voltage_uV = 500000,
+       .slew_rate_uv_per_us = 6000,
 };
 
 static struct i2c_board_info tps51632_gpu_boardinfo[] = {
@@ -377,16 +860,6 @@ static struct regulator_init_data *ardbeg_reg_data[PALMAS_NUM_REGS] = {
        NULL,
 };
 
-#define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,  \
-               _tstep, _vsel)                                          \
-       static struct palmas_reg_init reg_init_data_##_name = {         \
-               .warm_reset = _warm_reset,                              \
-               .roof_floor =   _roof_floor,                            \
-               .mode_sleep = _mode_sleep,              \
-               .tstep = _tstep,                        \
-               .vsel = _vsel,          \
-       }
-
 PALMAS_REG_INIT(smps12, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
@@ -414,7 +887,6 @@ PALMAS_REG_INIT(ldo14, 0, 0, 0, 0, 0);
 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
 
-#define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
 static struct palmas_reg_init *ardbeg_reg_init[PALMAS_NUM_REGS] = {
        PALMAS_REG_INIT_DATA(smps12),
        PALMAS_REG_INIT_DATA(smps123),
@@ -444,135 +916,6 @@ static struct palmas_reg_init *ardbeg_reg_init[PALMAS_NUM_REGS] = {
        PALMAS_REG_INIT_DATA(ldousb),
 };
 
-/* Macro for defining fixed regulator sub device data */
-#define FIXED_SUPPLY(_name) "fixed_reg_en"#_name
-#define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
-       _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts,  \
-       _sdelay)                                                        \
-       static struct regulator_init_data ri_data_##_var =              \
-       {                                                               \
-               .supply_regulator = _in_supply,                         \
-               .num_consumer_supplies =                                \
-                       ARRAY_SIZE(fixed_reg_en_##_name##_supply),      \
-               .consumer_supplies = fixed_reg_en_##_name##_supply,     \
-               .constraints = {                                        \
-                       .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
-                                       REGULATOR_MODE_STANDBY),        \
-                       .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
-                                       REGULATOR_CHANGE_STATUS |       \
-                                       REGULATOR_CHANGE_VOLTAGE),      \
-                       .always_on = _always_on,                        \
-                       .boot_on = _boot_on,                            \
-               },                                                      \
-       };                                                              \
-       static struct fixed_voltage_config fixed_reg_en_##_var##_pdata = \
-       {                                                               \
-               .supply_name = FIXED_SUPPLY(_name),                     \
-               .microvolts = _millivolts * 1000,                       \
-               .gpio = _gpio_nr,                                       \
-               .gpio_is_open_drain = _open_drain,                      \
-               .enable_high = _active_high,                            \
-               .enabled_at_boot = _boot_state,                         \
-               .init_data = &ri_data_##_var,                           \
-               .startup_delay = _sdelay                                \
-       };                                                              \
-       static struct platform_device fixed_reg_en_##_var##_dev = {     \
-               .name = "reg-fixed-voltage",                            \
-               .id = _id,                                              \
-               .dev = {                                                \
-                       .platform_data = &fixed_reg_en_##_var##_pdata,  \
-               },                                                      \
-       }
-
-
-/* Always ON /Battery regulator */
-static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
-               REGULATOR_SUPPLY("vdd_sys_bl", NULL),
-               REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
-               REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
-};
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_cdc_1v2_aud_supply[] = {
-       REGULATOR_SUPPLY("vdd_cdc_1v2_aud", NULL),
-};
-
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_1v2_dis_supply[] = {
-       REGULATOR_SUPPLY("vdd_cdc_1v2_dis", NULL),
-};
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_cdc_3v3a_aud_supply[] = {
-       REGULATOR_SUPPLY("vdd_cdc_3v3a_aud", NULL),
-};
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_usb0_5v0_supply[] = {
-       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
-       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
-       REGULATOR_SUPPLY("usb_vbus", "tegra-xhci.1"),
-};
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_dis_3v3a_sw_supply[] = {
-       REGULATOR_SUPPLY("vdd_dis_3v3_lcd", NULL),
-       REGULATOR_SUPPLY("vdd_dis_3v3_lvds", NULL),
-       REGULATOR_SUPPLY("avdd_lcd", NULL),
-};
-
-static struct regulator_consumer_supply fixed_reg_en_vdd_hdmi_5v0_supply[] = {
-       REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
-};
-
-FIXED_REG(0,   battery,        battery,
-       NULL,   0,      0,
-       -1,     false, true,    0,      3300,   0);
-
-FIXED_REG(1,   vdd_cdc_1v2_aud,        vdd_cdc_1v2_aud,
-       palmas_rails(smps3),    0,      0,
-       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO14, false, true,    0,      1200,
-       0);
-
-FIXED_REG(2,   vdd_lcd_1v2_dis,        vdd_lcd_1v2_dis,
-       palmas_rails(smps3),    1,      1,
-       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO4,  false, true,    0,      1200,
-       0);
-
-FIXED_REG(3,   vdd_cdc_3v3a_aud,       vdd_cdc_3v3a_aud,
-       NULL,   0,      0,
-       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO10, false, true,    0,      3300,
-       0);
-
-FIXED_REG(4,   vdd_usb0_5v0,   vdd_usb0_5v0,
-       NULL,   0,      0,
-       TEGRA_GPIO_PN4, true, true,     0,      5000,
-       0);
-
-FIXED_REG(5,   vdd_dis_3v3a_sw,        vdd_dis_3v3a_sw,
-       NULL,   1,      1,
-       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO3,  true, true,     0,      3300,
-       0);
-
-FIXED_REG(6,   vdd_hdmi_5v0,   vdd_hdmi_5v0,
-       NULL,   0,      0,
-       TEGRA_GPIO_PH7, false,  true,   0,      5000,   5000);
-
-/*
- * Creating fixed regulator device tables
- */
-#define ADD_FIXED_REG(_name)    (&fixed_reg_en_##_name##_dev)
-
-#define E1780_COMMON_FIXED_REG                 \
-       ADD_FIXED_REG(battery),                 \
-       ADD_FIXED_REG(vdd_cdc_1v2_aud),         \
-       ADD_FIXED_REG(vdd_lcd_1v2_dis),         \
-       ADD_FIXED_REG(vdd_cdc_3v3a_aud),        \
-       ADD_FIXED_REG(vdd_usb0_5v0),            \
-       ADD_FIXED_REG(vdd_dis_3v3a_sw),         \
-       ADD_FIXED_REG(vdd_hdmi_5v0),
-
-/* Gpio switch regulator platform data for ardbeg E1580 */
-static struct platform_device *pfixed_reg_devs[] = {
-       E1780_COMMON_FIXED_REG
-};
-
 static struct palmas_pmic_platform_data pmic_platform = {
        .enable_ldo8_tracking = false,
        .disabe_ldo8_tracking_suspend = false,
@@ -655,42 +998,276 @@ int __init ardbeg_suspend_init(void)
 
 int __init ardbeg_regulator_init(void)
 {
+       struct board_info pmu_board_info;
        int i;
        void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
        u32 pmc_ctrl;
 
-       /* configure the power management controller to trigger PMU
-        * interrupts when high */
-       pmc_ctrl = readl(pmc + PMC_CTRL);
-       writel(pmc_ctrl & ~PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
-
-
-       for (i = 0; i < PALMAS_NUM_REGS ; i++) {
-               pmic_platform.reg_data[i] = ardbeg_reg_data[i];
-               pmic_platform.reg_init[i] = ardbeg_reg_init[i];
+       tegra_get_pmu_board_info(&pmu_board_info);
+
+       if ((pmu_board_info.board_id == BOARD_E1733) ||
+               (pmu_board_info.board_id == BOARD_E1734)) {
+               ardbeg_ams_regulator_init();
+       } else if (pmu_board_info.board_id == BOARD_E1731) {
+               /* configure the power management controller to trigger PMU
+                * interrupts when high */
+               pmc_ctrl = readl(pmc + PMC_CTRL);
+               writel(pmc_ctrl & ~PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+
+               for (i = 0; i < PALMAS_NUM_REGS ; i++) {
+                       pmic_platform.reg_data[i] = ardbeg_reg_data[i];
+                       pmic_platform.reg_init[i] = ardbeg_reg_init[i];
+               }
+
+               i2c_register_board_info(4, palma_device,
+                               ARRAY_SIZE(palma_device));
+               i2c_register_board_info(4, tps51632_cpu_boardinfo, 1);
+               i2c_register_board_info(4, tps51632_gpu_boardinfo, 1);
+               reg_init_data_ldo5.enable_tracking = true;
+               reg_init_data_ldo5.tracking_regulator = PALMAS_REG_SMPS12;
+       } else if (pmu_board_info.board_id == BOARD_E1735) {
+               ardbeg_tps65913_regulator_init();
        }
 
-       i2c_register_board_info(4, palma_device,
-                       ARRAY_SIZE(palma_device));
-       i2c_register_board_info(4, tps51632_cpu_boardinfo, 1);
-       i2c_register_board_info(4, tps51632_gpu_boardinfo, 1);
-       reg_init_data_ldo5.enable_tracking = true;
-       reg_init_data_ldo5.tracking_regulator = PALMAS_REG_SMPS12;
-
        return 0;
 }
 
+/* Macro for defining fixed regulator sub device data */
+#define FIXED_SUPPLY(_name) "fixed_reg_en_"#_name
+#define FIXED_REG(_id, _var, _name, _in_supply,                        \
+       _always_on, _boot_on, _gpio_nr, _open_drain,            \
+       _active_high, _boot_state, _millivolts, _sdelay)        \
+static struct regulator_init_data ri_data_##_var =             \
+{                                                              \
+       .supply_regulator = _in_supply,                         \
+       .num_consumer_supplies =                                \
+       ARRAY_SIZE(fixed_reg_en_##_name##_supply),              \
+       .consumer_supplies = fixed_reg_en_##_name##_supply,     \
+       .constraints = {                                        \
+               .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
+                               REGULATOR_MODE_STANDBY),        \
+               .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
+                               REGULATOR_CHANGE_STATUS |       \
+                               REGULATOR_CHANGE_VOLTAGE),      \
+               .always_on = _always_on,                        \
+               .boot_on = _boot_on,                            \
+       },                                                      \
+};                                                             \
+static struct fixed_voltage_config fixed_reg_en_##_var##_pdata =       \
+{                                                              \
+       .supply_name = FIXED_SUPPLY(_name),                     \
+       .microvolts = _millivolts * 1000,                       \
+       .gpio = _gpio_nr,                                       \
+       .gpio_is_open_drain = _open_drain,                      \
+       .enable_high = _active_high,                            \
+       .enabled_at_boot = _boot_state,                         \
+       .init_data = &ri_data_##_var,                           \
+       .startup_delay = _sdelay                                \
+};                                                             \
+static struct platform_device fixed_reg_en_##_var##_dev = {    \
+       .name = "reg-fixed-voltage",                            \
+       .id = _id,                                              \
+       .dev = {                                                \
+               .platform_data = &fixed_reg_en_##_var##_pdata,  \
+       },                                                      \
+}
+
+/* Always ON /Battery regulator */
+static struct regulator_consumer_supply fixed_reg_en_battery_e1733_supply[] = {
+               REGULATOR_SUPPLY("vdd_sys_bl", NULL),
+};
+
+/* EN_USB1_VBUS From TEGRA GPIO PN4 */
+static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_supply[] = {
+       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("usb_vbus", "tegra-xhci"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_as3722_gpio2_supply[] = {
+       REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
+       REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
+};
+
+/* Gated by PMU_REGEN3 From AMS7230 GPIO3*/
+/*
+static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
+       REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
+};
+*/
+/* LCD_BL_EN GMI_AD10 */
+static struct regulator_consumer_supply fixed_reg_en_lcd_bl_en_supply[] = {
+       REGULATOR_SUPPLY("vdd_lcd_bl_en", NULL),
+};
+
+/* GPIO ?*/
+static struct regulator_consumer_supply fixed_reg_en_3v3_supply[] = {
+       REGULATOR_SUPPLY("avdd_hdmi", "NULL"),
+       REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
+       REGULATOR_SUPPLY("avdd_3v3_pex", NULL),
+       REGULATOR_SUPPLY("avdd_3v3_pex_pll", NULL),
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
+       REGULATOR_SUPPLY("vddio_hv", "NULL"),
+       REGULATOR_SUPPLY("hvdd_sata", NULL),
+       REGULATOR_SUPPLY("avdd_lcd", NULL),
+
+};
+
+static struct regulator_consumer_supply fixed_reg_en_dcdc_1v8_supply[] = {
+       REGULATOR_SUPPLY("avdd_lvds0_pll", NULL),
+       REGULATOR_SUPPLY("vdd_utmip_pll", NULL),
+       REGULATOR_SUPPLY("dvdd_lcd", NULL),
+       REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
+};
+
+
+FIXED_REG(0,   battery_e1733,  battery_e1733,
+       NULL,   0,      0,      -1,
+       false,  true,   0,      3300, 0);
+
+FIXED_REG(1,   usb1_vbus,      usb1_vbus,
+       NULL,   0,      0,      TEGRA_GPIO_PN4,
+       true,   true,   0,      5000,   0);
+
+/* EN for LDO1/6/9/10 So keep always_ON */
+FIXED_REG(2,   as3722_gpio2,   as3722_gpio2,
+       NULL,   1,      1, AS3722_GPIO_BASE + AS3722_GPIO2,
+       false,  true,   0,      3300, 0);
+
+FIXED_REG(3,   lcd_bl_en,      lcd_bl_en,
+       NULL,   0,      0, TEGRA_GPIO_PH2,
+       false,  true,   0,      5000,   0);
+
+FIXED_REG(4,   3v3,    3v3,
+       NULL,   0,      0, AS3722_GPIO_BASE + AS3722_GPIO4,
+       false,  true,   0,      3300,   0);
+
+FIXED_REG(5,   dcdc_1v8,       dcdc_1v8,
+       NULL,   0,      0,      -1,
+       false,  true,   0,      1800, 0);
+
+
+/* Always ON /Battery regulator */
+static struct regulator_consumer_supply fixed_reg_en_battery_e1731_supply[] = {
+               REGULATOR_SUPPLY("vdd_sys_bl", NULL),
+               REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
+               REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_cdc_1v2_supply[] = {
+       REGULATOR_SUPPLY("vdd_cdc_1v2_aud", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_lcd_1v2_supply[] = {
+       REGULATOR_SUPPLY("vdd_cdc_1v2_dis", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_cdc_3v3a_supply[] = {
+       REGULATOR_SUPPLY("vdd_cdc_3v3a_aud", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_usb0_5v0_supply[] = {
+       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("usb_vbus", "tegra-xhci"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_dis_3v3a_supply[] = {
+       REGULATOR_SUPPLY("vdd_dis_3v3_lcd", NULL),
+       REGULATOR_SUPPLY("vdd_dis_3v3_lvds", NULL),
+       REGULATOR_SUPPLY("avdd_lcd", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_hdmi_5v0_supply[] = {
+       REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
+};
+
+FIXED_REG(0,   battery_e1731,  battery_e1731,
+       NULL,   0,      0,
+       -1,     false, true,    0,      3300,   0);
+
+FIXED_REG(1,   vdd_cdc_1v2,    vdd_cdc_1v2,
+       palmas_rails(smps3),    0,      0,
+       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO14, false, true,    0,      1200,
+       0);
+
+FIXED_REG(2,   vdd_lcd_1v2,    vdd_lcd_1v2,
+       palmas_rails(smps3),    1,      1,
+       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO4,  false, true,    0,      1200,
+       0);
+
+FIXED_REG(3,   vdd_cdc_3v3a,   vdd_cdc_3v3a,
+       NULL,   0,      0,
+       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO10, false, true,    0,      3300,
+       0);
+
+FIXED_REG(4,   vdd_usb0_5v0,   vdd_usb0_5v0,
+       NULL,   0,      0,
+       TEGRA_GPIO_PN4, true, true,     0,      5000,
+       0);
+
+FIXED_REG(5,   vdd_dis_3v3a,   vdd_dis_3v3a,
+       NULL,   1,      1,
+       PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO3,  true, true,     0,      3300,
+       0);
+
+FIXED_REG(6,   vdd_hdmi_5v0,   vdd_hdmi_5v0,
+       NULL,   0,      0,
+       TEGRA_GPIO_PH7, true,   true,   0,      5000,   5000);
+
+/*
+ * Creating fixed regulator device tables
+ */
+#define ADD_FIXED_REG(_name)    (&fixed_reg_en_##_name##_dev)
+#define ARDBEG_E1781_E1733_COMMON_FIXED_REG    \
+       ADD_FIXED_REG(battery_e1733),           \
+       ADD_FIXED_REG(usb1_vbus),               \
+       ADD_FIXED_REG(as3722_gpio2),            \
+       ADD_FIXED_REG(lcd_bl_en),               \
+       ADD_FIXED_REG(3v3),                     \
+       ADD_FIXED_REG(dcdc_1v8),                \
+
+
+static struct platform_device *fixed_reg_devs_e1733[] = {
+       ARDBEG_E1781_E1733_COMMON_FIXED_REG
+};
+
+#define ARBDEG_E1780_1731_COMMON_FIXED_REG     \
+       ADD_FIXED_REG(battery_e1731),                   \
+       ADD_FIXED_REG(vdd_cdc_1v2),             \
+       ADD_FIXED_REG(vdd_lcd_1v2),             \
+       ADD_FIXED_REG(vdd_cdc_3v3a),    \
+       ADD_FIXED_REG(vdd_usb0_5v0),            \
+       ADD_FIXED_REG(vdd_dis_3v3a),            \
+       ADD_FIXED_REG(vdd_hdmi_5v0),
+
+static struct platform_device *pfixed_reg_devs[] = {
+       ARBDEG_E1780_1731_COMMON_FIXED_REG
+};
+
 static int __init ardbeg_fixed_regulator_init(void)
 {
-       struct board_info board_info;
+       struct board_info pmu_board_info;
 
        if (!of_machine_is_compatible("nvidia,ardbeg"))
                return 0;
 
-       tegra_get_board_info(&board_info);
-       if (board_info.board_id == BOARD_E1780)
+       tegra_get_pmu_board_info(&pmu_board_info);
+
+       if (pmu_board_info.board_id == BOARD_E1731)
                return platform_add_devices(pfixed_reg_devs,
-                               ARRAY_SIZE(pfixed_reg_devs));
+                       ARRAY_SIZE(pfixed_reg_devs));
+       else if (pmu_board_info.board_id == BOARD_E1733)
+               return platform_add_devices(fixed_reg_devs_e1733,
+                       ARRAY_SIZE(fixed_reg_devs_e1733));
+
+       return 0;
 }
 
 subsys_initcall_sync(ardbeg_fixed_regulator_init);
index e534a25..0fc9ea0 100644 (file)
@@ -41,21 +41,15 @@ int ardbeg_pmon_init(void);
 #define PCA954x_I2C_BUS2        (PCA954x_I2C_BUS_BASE + 2)
 #define PCA954x_I2C_BUS3        (PCA954x_I2C_BUS_BASE + 3)
 
-/* Touchscreen definitions */
-#ifdef CONFIG_ARCH_TEGRA_11x_SOC
-#define TOUCH_GPIO_IRQ_RAYDIUM_SPI     TEGRA_GPIO_PK2
-#define TOUCH_GPIO_RST_RAYDIUM_SPI     TEGRA_GPIO_PK4
-#define TOUCH_SPI_ID                   0       /*SPI 1 on ardbeg_interposer*/
-#define TOUCH_SPI_CS                   0       /*CS  0 on ardbeg_interposer*/
-#else
-#define TOUCH_GPIO_IRQ_RAYDIUM_SPI     TEGRA_GPIO_PK2
-#define TOUCH_GPIO_RST_RAYDIUM_SPI     TEGRA_GPIO_PK4
-#define TOUCH_SPI_ID                   0       /*SPI 1 on ardbeg_interposer*/
-#define TOUCH_SPI_CS                   0       /*CS  0 on ardbeg_interposer*/
-#endif
 
 #define PALMAS_TEGRA_GPIO_BASE TEGRA_NR_GPIOS
 #define PALMAS_TEGRA_IRQ_BASE  TEGRA_NR_IRQS
+#define AS3722_GPIO_BASE       TEGRA_NR_GPIOS
+#define AS3722_GPIO_END        (AS3722_GPIO_BASE + AS3722_NUM_GPIO)
+#define AS3722_IRQ_BASE        TEGRA_NR_IRQS
+
+/* PMU_TCA6416 GPIOs */
+#define PMU_TCA6416_GPIO_BASE  (AS3722_GPIO_END)
 
 /* Baseband IDs */
 enum tegra_bb_type {
@@ -67,6 +61,19 @@ enum tegra_bb_type {
 #define UTMI2_PORT_OWNER_XUSB   0x2
 #define HSIC1_PORT_OWNER_XUSB   0x4
 
+/* Touchscreen definitions */
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+#define TOUCH_GPIO_IRQ_RAYDIUM_SPI     TEGRA_GPIO_PK2
+#define TOUCH_GPIO_RST_RAYDIUM_SPI     TEGRA_GPIO_PK4
+#define TOUCH_SPI_ID                   0       /*SPI 1 on ardbeg_interposer*/
+#define TOUCH_SPI_CS                   0       /*CS  0 on ardbeg_interposer*/
+#else
+#define TOUCH_GPIO_IRQ_RAYDIUM_SPI     TEGRA_GPIO_PK2
+#define TOUCH_GPIO_RST_RAYDIUM_SPI     TEGRA_GPIO_PK4
+#define TOUCH_SPI_ID                   0       /*SPI 1 on ardbeg_interposer*/
+#define TOUCH_SPI_CS                   0       /*CS  0 on ardbeg_interposer*/
+#endif
+
 /* Audio-related GPIOs */
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
 #define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PW3
@@ -91,23 +98,13 @@ enum tegra_bb_type {
 #define TEGRA_GPIO_EXT_MIC_EN -1
 #endif
 
-
 /* Laguna specific */
-/* External peripheral act as gpio */
-/* AS3720 GPIO */
-#define AS3722_GPIO_BASE        TEGRA_NR_GPIOS
-#define AS3722_GPIO_END         (AS3722_GPIO_BASE + AS3722_NUM_GPIO)
-/* PMU_TCA6416 GPIOs */
-#define PMU_TCA6416_GPIO_BASE   (AS3722_GPIO_END)
-/* External peripheral act as interrupt controller */
-/* AS3720 IRQs */
-#define AS3722_IRQ_BASE         TEGRA_NR_IRQS
 
 int laguna_pinmux_init(void);
 int laguna_regulator_init(void);
 
 
-/* Display related GPIO */
+/* AUO Display related GPIO */
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
 #define DSI_PANEL_RST_GPIO      TEGRA_GPIO_PH3 /* GMI_AD11 */
 #define LCD_RST_L               TEGRA_GPIO_PH5 /* GMI_AD13 */
index 42583a8..94ce971 100644 (file)
@@ -174,6 +174,10 @@ static struct regulator_init_data as3722_ldo0 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo0_supply),
 };
 
+static struct as3722_regulator_platform_data ldo0_reg_data = {
+       .reg_init = &as3722_ldo0,
+};
+
 static struct regulator_init_data as3722_ldo1 = {
        .constraints = {
                .min_uV = 1800000,
@@ -190,6 +194,10 @@ static struct regulator_init_data as3722_ldo1 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo1_supply),
 };
 
+static struct as3722_regulator_platform_data ldo1_reg_data = {
+       .reg_init = &as3722_ldo1,
+};
+
 static struct regulator_init_data as3722_ldo2 = {
        .constraints = {
                .min_uV = 1200000,
@@ -206,6 +214,10 @@ static struct regulator_init_data as3722_ldo2 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo2_supply),
 };
 
+static struct as3722_regulator_platform_data ldo2_reg_data = {
+       .reg_init = &as3722_ldo2,
+};
+
 static struct regulator_init_data as3722_ldo3 = {
        .constraints = {
                .min_uV = 1000000,
@@ -221,6 +233,10 @@ static struct regulator_init_data as3722_ldo3 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo3_supply),
 };
 
+static struct as3722_regulator_platform_data ldo3_reg_data = {
+       .reg_init = &as3722_ldo3,
+};
+
 static struct regulator_init_data as3722_ldo4 = {
        .constraints = {
                .min_uV = 2700000,
@@ -237,6 +253,10 @@ static struct regulator_init_data as3722_ldo4 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo4_supply),
 };
 
+static struct as3722_regulator_platform_data ldo4_reg_data = {
+       .reg_init = &as3722_ldo4,
+};
+
 static struct regulator_init_data as3722_ldo5 = {
        .constraints = {
                .min_uV = 1200000,
@@ -253,6 +273,10 @@ static struct regulator_init_data as3722_ldo5 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo5_supply),
 };
 
+static struct as3722_regulator_platform_data ldo5_reg_data = {
+       .reg_init = &as3722_ldo5,
+};
+
 static struct regulator_init_data as3722_ldo6 = {
        .constraints = {
                .min_uV = 3300000,
@@ -269,6 +293,10 @@ static struct regulator_init_data as3722_ldo6 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo6_supply),
 };
 
+static struct as3722_regulator_platform_data ldo6_reg_data = {
+       .reg_init = &as3722_ldo6,
+};
+
 static struct regulator_init_data as3722_ldo7 = {
        .constraints = {
                .min_uV = 1050000,
@@ -285,6 +313,10 @@ static struct regulator_init_data as3722_ldo7 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo7_supply),
 };
 
+static struct as3722_regulator_platform_data ldo7_reg_data = {
+       .reg_init = &as3722_ldo7,
+};
+
 static struct regulator_init_data as3722_ldo9 = {
        .constraints = {
                .min_uV = 3300000,
@@ -301,6 +333,10 @@ static struct regulator_init_data as3722_ldo9 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo9_supply),
 };
 
+static struct as3722_regulator_platform_data ldo9_reg_data = {
+       .reg_init = &as3722_ldo9,
+};
+
 static struct regulator_init_data as3722_ldo10 = {
        .constraints = {
                .min_uV = 2700000,
@@ -317,6 +353,10 @@ static struct regulator_init_data as3722_ldo10 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo10_supply),
 };
 
+static struct as3722_regulator_platform_data ldo10_reg_data = {
+       .reg_init = &as3722_ldo10,
+};
+
 static struct regulator_init_data as3722_ldo11 = {
        .constraints = {
                .min_uV = 1800000,
@@ -333,6 +373,9 @@ static struct regulator_init_data as3722_ldo11 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_ldo11_supply),
 };
 
+static struct as3722_regulator_platform_data ldo11_reg_data = {
+       .reg_init = &as3722_ldo11,
+};
 
 static struct regulator_init_data as3722_sd0 = {
        .constraints = {
@@ -351,6 +394,10 @@ static struct regulator_init_data as3722_sd0 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd0_supply),
 };
 
+static struct as3722_regulator_platform_data sd0_reg_data = {
+       .reg_init = &as3722_sd0,
+};
+
 static struct regulator_init_data as3722_sd1 = {
        .constraints = {
                .min_uV = 1000000,
@@ -368,6 +415,10 @@ static struct regulator_init_data as3722_sd1 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd1_supply),
 };
 
+static struct as3722_regulator_platform_data sd1_reg_data = {
+       .reg_init = &as3722_sd1,
+};
+
 static struct regulator_init_data as3722_sd2 = {
        .constraints = {
                .min_uV = 1350000,
@@ -385,6 +436,10 @@ static struct regulator_init_data as3722_sd2 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd2_supply),
 };
 
+static struct as3722_regulator_platform_data sd2_reg_data = {
+       .reg_init = &as3722_sd2,
+};
+
 static struct regulator_init_data as3722_sd4 = {
        .constraints = {
                .min_uV = 1050000,
@@ -402,6 +457,10 @@ static struct regulator_init_data as3722_sd4 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd4_supply),
 };
 
+static struct as3722_regulator_platform_data sd4_reg_data = {
+       .reg_init = &as3722_sd4,
+};
+
 static struct regulator_init_data as3722_sd5 = {
        .constraints = {
                .min_uV = 1800000,
@@ -419,6 +478,10 @@ static struct regulator_init_data as3722_sd5 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd5_supply),
 };
 
+static struct as3722_regulator_platform_data sd5_reg_data = {
+       .reg_init = &as3722_sd5,
+};
+
 static struct regulator_init_data as3722_sd6 = {
        .constraints = {
                .min_uV = 1000000,
@@ -436,6 +499,10 @@ static struct regulator_init_data as3722_sd6 = {
        .num_consumer_supplies = ARRAY_SIZE(as3722_sd6_supply),
 };
 
+static struct as3722_regulator_platform_data sd6_reg_data = {
+       .reg_init = &as3722_sd6,
+};
+
 static struct as3722_reg_init as3722_core_init_data[] = {
        /* disable all regulators */
 #if 0
@@ -541,24 +608,24 @@ static struct as3722_gpio_config as3722_gpio_cfgs[] = {
 };
 
 static struct as3722_platform_data as3722_pdata = {
-       .reg_init[AS3722_LDO0] = &as3722_ldo0,
-       .reg_init[AS3722_LDO1] = &as3722_ldo1,
-       .reg_init[AS3722_LDO2] = &as3722_ldo2,
-       .reg_init[AS3722_LDO3] = &as3722_ldo3,
-       .reg_init[AS3722_LDO4] = &as3722_ldo4,
-       .reg_init[AS3722_LDO5] = &as3722_ldo5,
-       .reg_init[AS3722_LDO6] = &as3722_ldo6,
-       .reg_init[AS3722_LDO7] = &as3722_ldo7,
-       .reg_init[AS3722_LDO9] = &as3722_ldo9,
-       .reg_init[AS3722_LDO10] = &as3722_ldo10,
-       .reg_init[AS3722_LDO11] = &as3722_ldo11,
-
-       .reg_init[AS3722_SD0] = &as3722_sd0,
-       .reg_init[AS3722_SD1] = &as3722_sd1,
-       .reg_init[AS3722_SD2] = &as3722_sd2,
-       .reg_init[AS3722_SD4] = &as3722_sd4,
-       .reg_init[AS3722_SD5] = &as3722_sd5,
-       .reg_init[AS3722_SD6] = &as3722_sd6,
+       .reg_pdata[AS3722_LDO0] = &ldo0_reg_data,
+       .reg_pdata[AS3722_LDO1] = &ldo1_reg_data,
+       .reg_pdata[AS3722_LDO2] = &ldo2_reg_data,
+       .reg_pdata[AS3722_LDO3] = &ldo3_reg_data,
+       .reg_pdata[AS3722_LDO4] = &ldo4_reg_data,
+       .reg_pdata[AS3722_LDO5] = &ldo5_reg_data,
+       .reg_pdata[AS3722_LDO6] = &ldo6_reg_data,
+       .reg_pdata[AS3722_LDO7] = &ldo7_reg_data,
+       .reg_pdata[AS3722_LDO9] = &ldo9_reg_data,
+       .reg_pdata[AS3722_LDO10] = &ldo10_reg_data,
+       .reg_pdata[AS3722_LDO11] = &ldo11_reg_data,
+
+       .reg_pdata[AS3722_SD0] = &sd0_reg_data,
+       .reg_pdata[AS3722_SD1] = &sd1_reg_data,
+       .reg_pdata[AS3722_SD2] = &sd2_reg_data,
+       .reg_pdata[AS3722_SD4] = &sd4_reg_data,
+       .reg_pdata[AS3722_SD5] = &sd5_reg_data,
+       .reg_pdata[AS3722_SD6] = &sd6_reg_data,
 
        .core_init_data = &as3722_core_init_data[0],
        .gpio_base = AS3722_GPIO_BASE,
index eac89ae..ee9da70 100644 (file)
                .vsel = _vsel,                                          \
        }
 
+#define AS3722_SUPPLY(_name) "as3722_"#_name
+#define AMS_PDATA_INIT(_name, _supply_reg, _min_uV, _max_uV, _always_on,\
+                        _boot_on, _apply_uV)                           \
+static struct regulator_init_data as3722_##_name##_reg_idata =         \
+{                                                                      \
+       .supply_regulator = _supply_reg,                                \
+       .constraints = {                                                \
+               .name = AS3722_SUPPLY(_name),                           \
+               .min_uV = _min_uV,                                      \
+               .max_uV = _max_uV,                                      \
+               .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
+                                    REGULATOR_MODE_STANDBY),           \
+               .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
+                                  REGULATOR_CHANGE_STATUS |            \
+                                  REGULATOR_CHANGE_VOLTAGE),           \
+               .always_on = _always_on,                                \
+               .boot_on = _boot_on,                                    \
+               .apply_uV = _apply_uV,                                  \
+       },                                                              \
+       .num_consumer_supplies =                                        \
+               ARRAY_SIZE(as3722_##_name##_supply),                    \
+       .consumer_supplies = as3722_##_name##_supply,                   \
+};                                                                     \
+static struct as3722_regulator_platform_data as3722_##_name##_reg_pdata =      \
+{                                                                      \
+       .reg_init = &as3722_##_name##_reg_idata,                        \
+}                                                                      \
+
 #endif
index 5a12e4d..d8d3176 100644 (file)
@@ -42,6 +42,7 @@
 #define BOARD_E1740   0x06CC
 #define BOARD_P2560   0x0A00
 #define BOARD_E1780   0x06F4
+#define BOARD_E1781   0x06F5
 #define BOARD_PM358   0x0166
 #define BOARD_PM359   0x0167
 #define BOARD_PM363   0x016B
 
 #define    BOARD_E1563    0x061b
 
+
+/* PMIC board ID */
+#define BOARD_E1731    0x6c3
+#define BOARD_E1733    0x6c5
+#define BOARD_E1734    0x6c6
+#define BOARD_E1735    0x6c7
+
 /* Board Fab version */
 #define BOARD_FAB_A00                  0x0
 #define BOARD_FAB_A01                  0x1