ARM: tegra: bonaire: Lower UART clock for only QT
Adeel Raza [Tue, 13 Nov 2012 00:44:20 +0000 (16:44 -0800)]
Previously UART clock was being lowered for ASIM + QT and pure QT. UART
clock only needs to be lowered for pure QT.

Bug 1166332

Change-Id: Ifcc8b7291fa45313b01ac67d96326e7de928c843
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/163153
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

arch/arm/mach-tegra/board-bonaire.c

index 14c5344..43f6907 100644 (file)
@@ -532,9 +532,11 @@ static void __init tegra_bonaire_init(void)
        bonaire_pinmux_init();
        tegra_soc_device_init("bonaire");
 
+#ifdef CONFIG_TEGRA_FPGA_PLATFORM
        if (tegra_revision == TEGRA_REVISION_QT)
                debug_uart_platform_data[0].uartclk =
                                                tegra_clk_measure_input_freq();
+#endif
 
        platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));