arm: tegra: Use new platform types
Yudong Tan [Fri, 1 Jul 2011 18:26:17 +0000 (11:26 -0700)]
This change is needed to support three different platforms, silicon,
 fpga and simulation.

Change-Id: I407853e1d86accbe3686deb4f34571fe6b10bcce
Reviewed-on: http://git-master/r/36351
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc4b424f1a55ffb71245f3a8330559258124e2a19

arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/dvfs.h
arch/arm/mach-tegra/fuse.c
arch/arm/mach-tegra/timer-t3.c
include/linux/clk/tegra.h

index 4824b9b..a86a23f 100644 (file)
@@ -37,11 +37,11 @@ obj-$(CONFIG_USB_SUPPORT)               += usb_phy.o
 obj-$(CONFIG_FIQ)                       += fiq.o
 obj-$(CONFIG_TEGRA_ARB_SEMAPHORE)      += arb_sema.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)                += tegra20_speedo.o
-ifneq ($(CONFIG_TEGRA_FPGA_PLATFORM),y)
+ifeq ($(CONFIG_TEGRA_SILICON_PLATFORM),y)
 obj-y                                   += dvfs.o
 endif
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_fuse.o
-ifneq ($(CONFIG_TEGRA_FPGA_PLATFORM),y)
+ifeq ($(CONFIG_TEGRA_SILICON_PLATFORM),y)
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra3_actmon.o
 endif
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_emc.o
index 93c6fdf..aad6c08 100644 (file)
@@ -139,10 +139,7 @@ void tegra_init_cache(u32 tag_latency, u32 data_latency)
        tag_latency = 0x331;
        data_latency = 0x441;
 #elif defined(CONFIG_ARCH_TEGRA_3x_SOC)
-#ifdef CONFIG_TEGRA_FPGA_PLATFORM
-       tag_latency = 0x770;
-       data_latency = 0x770;
-#else
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
        if (is_lp_cluster()) {
                tag_latency = 0x221;
                data_latency = 0x221;
@@ -150,6 +147,9 @@ void tegra_init_cache(u32 tag_latency, u32 data_latency)
                tag_latency = 0x331;
                data_latency = 0x441;
        }
+#else
+       tag_latency = 0x770;
+       data_latency = 0x770;
 #endif
 #endif
        writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
index d7e5088..2efa2af 100644 (file)
@@ -87,7 +87,7 @@ struct dvfs {
        struct list_head reg_node;
 };
 
-#ifndef CONFIG_TEGRA_FPGA_PLATFORM
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
 int tegra_enable_dvfs_on_clk(struct clk *c, struct dvfs *d);
 int dvfs_debugfs_init(struct dentry *clk_debugfs_root);
 int tegra_dvfs_late_init(void);
index fdb6e48..861bbbc 100644 (file)
@@ -209,7 +209,7 @@ void tegra_init_fuse(void)
 
        tegra_revision = tegra_get_revision();
        tegra_chip_rev = (int)tegra_revision;
-#ifndef CONFIG_TEGRA_FPGA_PLATFORM
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
        tegra_init_speedo_data();
 #endif
 
index d0e2dc5..1442193 100644 (file)
@@ -245,16 +245,16 @@ void __init tegra3_init_timer(u32 *offset, int *irq, unsigned long rate)
 #ifdef CONFIG_PM_SLEEP
        /* For T30.A01 use INT_TMR_SHARED instead of INT_TMR6. */
        if (((id & 0xFF00) >> 8) == 0x30) {
-#ifdef CONFIG_TEGRA_FPGA_PLATFORM
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
+               if (((id >> 16) & 0xf) == 1)
+                       tegra_lp2wake_irq[3].irq = INT_TMR_SHARED;
+#else
                void __iomem *emu_rev = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x860;
                unsigned long reg = readl(emu_rev);
                unsigned long netlist = reg & 0xFFFF;
                unsigned long patch = (reg >> 16) & 0xFF;
                if ((netlist == 12) && (patch < 14))
                        tegra_lp2wake_irq[3].irq = INT_TMR_SHARED;
-#else
-               if (((id >> 16) & 0xf) == 1)
-                       tegra_lp2wake_irq[3].irq = INT_TMR_SHARED;
 #endif
        }
 
index 06b2a9d..25a6d6b 100644 (file)
@@ -149,7 +149,7 @@ static inline void tegra_clocks_apply_init_table(void)
 struct dvfs;
 struct notifier_block;
 
-#ifndef CONFIG_TEGRA_FPGA_PLATFORM
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
 int tegra_dvfs_set_rate(struct clk *c, unsigned long rate);
 #else
 static inline int tegra_dvfs_set_rate(struct clk *c, unsigned long rate)