platform:tegra: Add separate cbus for vi_bypass
Wenjia Zhou [Tue, 12 Apr 2016 22:56:02 +0000 (15:56 -0700)]
vi.cbus
--vi_v4l2.cbus
--vi_bypass.cbus (Added)

Since we have to support Vi mode and SCF mode simultaneously, Nvhost should
use vi_bypass.cbus not vi.cbus.

Bug 1683411

Change-Id: I3855b63c3c648570a5a9204705a25e06f0c6f3c5
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
(cherry picked from commit e6919b95f042b0187b677507b12e47de900263ca)
Reviewed-on: http://git-master/r/1125779
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/1141901
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/platform/tegra/tegra21_clocks.c
drivers/video/tegra/host/t210/t210.c
include/dt-bindings/clk/tegra210-clk.h

index f41de23..f539d42 100644 (file)
@@ -9714,6 +9714,7 @@ static struct clk tegra_visp_clks[] = {
        SHARED_CLK("ispa.isp.cbus",     "ispa.isp",     NULL,   &tegra_visp_clks[1], "ispa", 0, 0, TEGRA210_CLK_ID_CXBUS_ISP_ISPA_USER),
        SHARED_CLK("ispb.isp.cbus",     "ispb.isp",     NULL,   &tegra_visp_clks[1], "ispb", 0, 0, TEGRA210_CLK_ID_CXBUS_ISP_ISPB_USER),
        SHARED_CLK("vi_v4l2.cbus",      "vi",           "vi_v4l2",      &tegra_visp_clks[0],    "vi",    0, 0, TEGRA210_CLK_ID_CXBUS_VI_V4L2_USER),
+       SHARED_CLK("vi_bypass.cbus",    "tegra_vi",     "vi_bypass",    &tegra_visp_clks[0],    "vi",    0, 0, TEGRA210_CLK_ID_CXBUS_VI_BYPASS_USER),
 };
 
 /* XUSB clocks */
@@ -9961,7 +9962,6 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
        CLK_DUPLICATE("mclk3", NULL, "cam_mclk1"),
        CLK_DUPLICATE("mclk", NULL, "cam_mclk2"),
        CLK_DUPLICATE("mclk2", NULL, "cam_mclk3"),
-       CLK_DUPLICATE("vi.cbus", "tegra_vi", "vi"),
        CLK_DUPLICATE("csi", "tegra_vi", "csi"),
        CLK_DUPLICATE("csus", "tegra_vi", "csus"),
        CLK_DUPLICATE("vim2_clk", "tegra_vi", "vim2_clk"),
index 005446a..3384cef 100644 (file)
@@ -153,7 +153,7 @@ struct nvhost_device_data t21_vi_info = {
        .can_powergate          = true,
        .moduleid               = NVHOST_MODULE_VI,
        .clocks = {
-               {"vi", UINT_MAX},
+               {"vi_bypass", UINT_MAX},
                {"csi", 0},
                {"cilab", 102000000},
                {"cilcd", 102000000},
index 7534f71..fc8347f 100644 (file)
 #define TEGRA210_CLK_ID_CXBUS_ISP_ISPA_USER            374
 #define TEGRA210_CLK_ID_CXBUS_ISP_ISPB_USER            375
 #define TEGRA210_CLK_ID_CXBUS_VI_V4L2_USER             376
+#define TEGRA210_CLK_ID_CXBUS_VI_BYPASS_USER           377
 /* IDs 376 ... 389 are reserved */
 #define TEGRA210_CLK_ID_GBUS                           390
 #define TEGRA210_CLK_ID_GBUS_GM20B_USER                        391