video: tegra: dsi: add delay after register write
Naveen Kumar S [Wed, 6 May 2015 07:21:43 +0000 (12:21 +0530)]
Providing a small delay after writing to dc registers while
stopping dc stream helps in stabilizing the registers. This
helps in resolving the intermittent register read failure issue.

bug 200087039

Change-Id: I159d1d75aa2472b9e33bc42d890382f33def218a
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/746062
(cherry picked from commit d29669af88735a2aeeb87b26f8794c9bcbb9f058)
Reviewed-on: http://git-master/r/756015
Reviewed-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

drivers/video/tegra/dc/dsi.c

index 9fd6400..284e053 100644 (file)
@@ -1682,6 +1682,9 @@ static void tegra_dsi_stop_dc_stream(struct tegra_dc *dc,
        tegra_dc_writel(dc, 0, DC_DISP_DISP_WIN_OPTIONS);
        tegra_dc_writel(dc, GENERAL_ACT_REQ , DC_CMD_STATE_CONTROL);
 
+       /* stabilization delay */
+       udelay(500);
+
        tegra_dc_put(dc);
 
        dsi->status.dc_stream = DSI_DC_STREAM_DISABLE;