ARM: tegra: move pinmux table to DT for vcm30-t124
Laxman Dewangan [Wed, 8 Jan 2014 09:52:19 +0000 (14:52 +0530)]
Move pinmux table to DT for vcm30-t124.
Also move the pca registration to board-vcm30_t124-power.c
to get rid of file board-vcm30_t124-pinmux.c.

Change-Id: I4f526ad96c4e87127a8d7145fff1077ae6b92a59
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/353245
GVS: Gerrit_Virtual_Submit

arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-gpio-default.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-pinmux.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tegra124-vcm30_t124.dts
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-vcm30_t124-pinmux-t12x.h [deleted file]
arch/arm/mach-tegra/board-vcm30_t124-pinmux.c [deleted file]
arch/arm/mach-tegra/board-vcm30_t124-power.c
arch/arm/mach-tegra/board-vcm30_t124.c
arch/arm/mach-tegra/board-vcm30_t124.h

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-gpio-default.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-gpio-default.dtsi
new file mode 100644 (file)
index 0000000..e576241
--- /dev/null
@@ -0,0 +1,44 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
+/ {
+       gpio: gpio@6000d000 {
+               gpio-init-names = "default";
+               gpio-init-0 = <&gpio_default>;
+
+               gpio_default: default {
+                       gpio-input = <  TEGRA_GPIO(W, 2)
+                                       TEGRA_GPIO(V, 0)
+                                       TEGRA_GPIO(V, 1)
+                                       TEGRA_GPIO(K, 0)
+                                       TEGRA_GPIO(K, 1)
+                                       TEGRA_GPIO(J, 2)
+                                       TEGRA_GPIO(K, 4)
+                                       TEGRA_GPIO(K, 2)
+                                       TEGRA_GPIO(I, 3)
+                                       TEGRA_GPIO(I, 6)
+                                       TEGRA_GPIO(I, 2)
+                                       TEGRA_GPIO(I, 5)
+                                       TEGRA_GPIO(DD, 3)
+                                       TEGRA_GPIO(FF, 2)
+                                       TEGRA_GPIO(Q, 0)
+                                       TEGRA_GPIO(Q, 1)
+                                       TEGRA_GPIO(Q, 2)
+                                       TEGRA_GPIO(Q, 3)
+                                       TEGRA_GPIO(Q, 6)
+                                       TEGRA_GPIO(Q, 7)
+                                       TEGRA_GPIO(S, 3)
+                                       TEGRA_GPIO(S, 4)
+                                       TEGRA_GPIO(S, 5)
+                                       TEGRA_GPIO(R, 2)
+                                       TEGRA_GPIO(R, 4)
+                                       TEGRA_GPIO(EE, 1)
+                                       TEGRA_GPIO(N, 7)>;
+                       gpio-output-low = <TEGRA_GPIO(K, 3)
+                                       TEGRA_GPIO(W, 5)
+                                       TEGRA_GPIO(R, 3)
+                                       TEGRA_GPIO(R, 5)
+                                       TEGRA_GPIO(R, 6)>;
+                       gpio-output-high = <TEGRA_GPIO(R, 0)>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-pinmux.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-vcm30-t124-pinmux.dtsi
new file mode 100644 (file)
index 0000000..9c96672
--- /dev/null
@@ -0,0 +1,1589 @@
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
+
+/ {
+       pinmux: pinmux {
+               pinctrl-names = "default", "drive", "unused";
+               pinctrl-0 = <&pinmux_default>;
+               pinctrl-1 = <&drive_default>;
+               pinctrl-2 = <&pinmux_unused_lowpower>;
+
+               pinmux_default: common {
+                       dap_mclk1_pw4 {
+                               nvidia,pins = "dap_mclk1_pw4";
+                               nvidia,function = "extperiph1";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_din_pn1 {
+                               nvidia,pins = "dap1_din_pn1";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_dout_pn2 {
+                               nvidia,pins = "dap1_dout_pn2";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_fs_pn0 {
+                               nvidia,pins = "dap1_fs_pn0";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_sclk_pn3 {
+                               nvidia,pins = "dap1_sclk_pn3";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_din_pa4 {
+                               nvidia,pins = "dap2_din_pa4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_dout_pa5 {
+                               nvidia,pins = "dap2_dout_pa5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_fs_pa2 {
+                               nvidia,pins = "dap2_fs_pa2";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_sclk_pa3 {
+                               nvidia,pins = "dap2_sclk_pa3";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dvfs_pwm_px0 {
+                               nvidia,pins = "dvfs_pwm_px0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x1_aud_px1 {
+                               nvidia,pins = "gpio_x1_aud_px1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dvfs_clk_px2 {
+                               nvidia,pins = "dvfs_clk_px2";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x3_aud_px3 {
+                               nvidia,pins = "gpio_x3_aud_px3";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg0 {
+                               nvidia,pins = "pg0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg1 {
+                               nvidia,pins = "pg1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph2 {
+                               nvidia,pins = "ph2";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph3 {
+                               nvidia,pins = "ph3";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph4 {
+                               nvidia,pins = "ph4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph5 {
+                               nvidia,pins = "ph5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph6 {
+                               nvidia,pins = "ph6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph7 {
+                               nvidia,pins = "ph7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg2 {
+                               nvidia,pins = "pg2";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg3 {
+                               nvidia,pins = "pg3";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg4 {
+                               nvidia,pins = "pg4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg5 {
+                               nvidia,pins = "pg5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg6 {
+                               nvidia,pins = "pg6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pg7 {
+                               nvidia,pins = "pg7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph0 {
+                               nvidia,pins = "ph0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ph1 {
+                               nvidia,pins = "ph1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pj0 {
+                               nvidia,pins = "pj0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi1 {
+                               nvidia,pins = "pi1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi4 {
+                               nvidia,pins = "pi4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi7 {
+                               nvidia,pins = "pi7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pc7 {
+                               nvidia,pins = "pc7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi0 {
+                               nvidia,pins = "pi0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_din_pp5 {
+                               nvidia,pins = "dap4_din_pp5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_dout_pp6 {
+                               nvidia,pins = "dap4_dout_pp6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_fs_pp4 {
+                               nvidia,pins = "dap4_fs_pp4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_sclk_pp7 {
+                               nvidia,pins = "dap4_sclk_pp7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu0 {
+                               nvidia,pins = "pu0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu1 {
+                               nvidia,pins = "pu1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu2 {
+                               nvidia,pins = "pu2";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu3 {
+                               nvidia,pins = "pu3";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu4 {
+                               nvidia,pins = "pu4";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu5 {
+                               nvidia,pins = "pu5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu6 {
+                               nvidia,pins = "pu6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart2_cts_n_pj5 {
+                               nvidia,pins = "uart2_cts_n_pj5";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart2_rts_n_pj6 {
+                               nvidia,pins = "uart2_rts_n_pj6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_cts_n_pa1 {
+                               nvidia,pins = "uart3_cts_n_pa1";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_rts_n_pc0 {
+                               nvidia,pins = "uart3_rts_n_pc0";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_rxd_pw7 {
+                               nvidia,pins = "uart3_rxd_pw7";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_txd_pw6 {
+                               nvidia,pins = "uart3_txd_pw6";
+                               nvidia,function = "gmi";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x4_aud_px4 {
+                               nvidia,pins = "gpio_x4_aud_px4";
+                               nvidia,function = "spi1";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x5_aud_px5 {
+                               nvidia,pins = "gpio_x5_aud_px5";
+                               nvidia,function = "spi1";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x6_aud_px6 {
+                               nvidia,pins = "gpio_x6_aud_px6";
+                               nvidia,function = "spi1";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_x7_aud_px7 {
+                               nvidia,pins = "gpio_x7_aud_px7";
+                               nvidia,function = "spi1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_din_pp1 {
+                               nvidia,pins = "dap3_din_pp1";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_dout_pp2 {
+                               nvidia,pins = "dap3_dout_pp2";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_fs_pp0 {
+                               nvidia,pins = "dap3_fs_pp0";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_sclk_pp3 {
+                               nvidia,pins = "dap3_sclk_pp3";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_clk_py0 {
+                               nvidia,pins = "ulpi_clk_py0";
+                               nvidia,function = "spi5";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_dir_py1 {
+                               nvidia,pins = "ulpi_dir_py1";
+                               nvidia,function = "spi5";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_nxt_py2 {
+                               nvidia,pins = "ulpi_nxt_py2";
+                               nvidia,function = "spi5";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_stp_py3 {
+                               nvidia,pins = "ulpi_stp_py3";
+                               nvidia,function = "spi5";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data0_po1 {
+                               nvidia,pins = "ulpi_data0_po1";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data1_po2 {
+                               nvidia,pins = "ulpi_data1_po2";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data2_po3 {
+                               nvidia,pins = "ulpi_data2_po3";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data3_po4 {
+                               nvidia,pins = "ulpi_data3_po4";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data4_po5 {
+                               nvidia,pins = "ulpi_data4_po5";
+                               nvidia,function = "spi2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data5_po6 {
+                               nvidia,pins = "ulpi_data5_po6";
+                               nvidia,function = "spi2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data6_po7 {
+                               nvidia,pins = "ulpi_data6_po7";
+                               nvidia,function = "spi2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data7_po0 {
+                               nvidia,pins = "ulpi_data7_po0";
+                               nvidia,function = "spi2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_i2c_scl_pbb1 {
+                               nvidia,pins = "cam_i2c_scl_pbb1";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_i2c_sda_pbb2 {
+                               nvidia,pins = "cam_i2c_sda_pbb2";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_mclk_pcc0 {
+                               nvidia,pins = "cam_mclk_pcc0";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb0 {
+                               nvidia,pins = "pbb0";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb3 {
+                               nvidia,pins = "pbb3";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb4 {
+                               nvidia,pins = "pbb4";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb5 {
+                               nvidia,pins = "pbb5";
+                               nvidia,function = "sdmmc2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb6 {
+                               nvidia,pins = "pbb6";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb7 {
+                               nvidia,pins = "pbb7";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pcc1 {
+                               nvidia,pins = "pcc1";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pcc2 {
+                               nvidia,pins = "pcc2";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen2_i2c_scl_pt5 {
+                               nvidia,pins = "gen2_i2c_scl_pt5";
+                               nvidia,function = "i2c2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,lock = <TEGRA_PIN_LOCK_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       gen2_i2c_sda_pt6 {
+                               nvidia,pins = "gen2_i2c_sda_pt6";
+                               nvidia,function = "i2c2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,lock = <TEGRA_PIN_LOCK_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       pj7 {
+                               nvidia,pins = "pj7";
+                               nvidia,function = "uartd";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pb0 {
+                               nvidia,pins = "pb0";
+                               nvidia,function = "uartd";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pb1 {
+                               nvidia,pins = "pb1";
+                               nvidia,function = "uartd";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk7 {
+                               nvidia,pins = "pk7";
+                               nvidia,function = "uartd";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pex_l0_clkreq_n_pdd2 {
+                               nvidia,pins = "pex_l0_clkreq_n_pdd2";
+                               nvidia,function = "pe0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pex_l0_rst_n_pdd1 {
+                               nvidia,pins = "pex_l0_rst_n_pdd1";
+                               nvidia,function = "pe0";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pex_l1_clkreq_n_pdd6 {
+                               nvidia,pins = "pex_l1_clkreq_n_pdd6";
+                               nvidia,function = "pe1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pex_l1_rst_n_pdd5 {
+                               nvidia,pins = "pex_l1_rst_n_pdd5";
+                               nvidia,function = "pe1";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       usb_vbus_en2_pff1 {
+                               nvidia,pins = "usb_vbus_en2_pff1";
+                               nvidia,function = "usb";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_DISABLE>;
+                       };
+
+                       usb_vbus_en0_pn4 {
+                               nvidia,pins = "usb_vbus_en0_pn4";
+                               nvidia,function = "usb";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_DISABLE>;
+                       };
+
+                       sdmmc1_wp_n_pv3 {
+                               nvidia,pins = "sdmmc1_wp_n_pv3";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_clk_pz0 {
+                               nvidia,pins = "sdmmc1_clk_pz0";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_cmd_pz1 {
+                               nvidia,pins = "sdmmc1_cmd_pz1";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat0_py7 {
+                               nvidia,pins = "sdmmc1_dat0_py7";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat1_py6 {
+                               nvidia,pins = "sdmmc1_dat1_py6";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat2_py5 {
+                               nvidia,pins = "sdmmc1_dat2_py5";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat3_py4 {
+                               nvidia,pins = "sdmmc1_dat3_py4";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins = "sdmmc3_cmd_pa7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat0_pb7 {
+                               nvidia,pins = "sdmmc3_dat0_pb7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat1_pb6 {
+                               nvidia,pins = "sdmmc3_dat1_pb6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat2_pb5 {
+                               nvidia,pins = "sdmmc3_dat2_pb5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat3_pb4 {
+                               nvidia,pins = "sdmmc3_dat3_pb4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_clk_lb_out_pee4 {
+                               nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_clk_lb_in_pee5 {
+                               nvidia,pins = "sdmmc3_clk_lb_in_pee5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col4_pq4 {
+                               nvidia,pins = "kb_col4_pq4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col5_pq5 {
+                               nvidia,pins = "kb_col5_pq5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins = "sdmmc4_clk_pcc4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_cmd_pt7 {
+                               nvidia,pins = "sdmmc4_cmd_pt7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat0_paa0 {
+                               nvidia,pins = "sdmmc4_dat0_paa0";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat1_paa1 {
+                               nvidia,pins = "sdmmc4_dat1_paa1";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat2_paa2 {
+                               nvidia,pins = "sdmmc4_dat2_paa2";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat3_paa3 {
+                               nvidia,pins = "sdmmc4_dat3_paa3";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat4_paa4 {
+                               nvidia,pins = "sdmmc4_dat4_paa4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat5_paa5 {
+                               nvidia,pins = "sdmmc4_dat5_paa5";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat6_paa6 {
+                               nvidia,pins = "sdmmc4_dat6_paa6";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat7_paa7 {
+                               nvidia,pins = "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row10_ps2 {
+                               nvidia,pins = "kb_row10_ps2";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row7_pr7 {
+                               nvidia,pins = "kb_row7_pr7";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row8_ps0 {
+                               nvidia,pins = "kb_row8_ps0";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row9_ps1 {
+                               nvidia,pins = "kb_row9_ps1";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row16_pt0 {
+                               nvidia,pins = "kb_row16_pt0";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row17_pt1 {
+                               nvidia,pins = "kb_row17_pt1";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk_32k_out_pa0 {
+                               nvidia,pins = "clk_32k_out_pa0";
+                               nvidia,function = "blink";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pwr_i2c_scl_pz6 {
+                               nvidia,pins = "pwr_i2c_scl_pz6";
+                               nvidia,function = "i2cpwr";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       pwr_i2c_sda_pz7 {
+                               nvidia,pins = "pwr_i2c_sda_pz7";
+                               nvidia,function = "i2cpwr";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       jtag_rtck {
+                               nvidia,pins = "jtag_rtck";
+                               nvidia,function = "rtck";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk_32k_in {
+                               nvidia,pins = "clk_32k_in";
+                               nvidia,function = "clk";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       core_pwr_req {
+                               nvidia,pins = "core_pwr_req";
+                               nvidia,function = "pwron";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cpu_pwr_req {
+                               nvidia,pins = "cpu_pwr_req";
+                               nvidia,function = "cpu";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pwr_int_n {
+                               nvidia,pins = "pwr_int_n";
+                               nvidia,function = "pmi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       reset_out_n {
+                               nvidia,pins = "reset_out_n";
+                               nvidia,function = "reset_out_n";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk3_out_pee0 {
+                               nvidia,pins = "clk3_out_pee0";
+                               nvidia,function = "extperiph3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen1_i2c_sda_pc5 {
+                               nvidia,pins = "gen1_i2c_sda_pc5";
+                               nvidia,function = "i2c1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,lock = <TEGRA_PIN_LOCK_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       gen1_i2c_scl_pc4 {
+                               nvidia,pins = "gen1_i2c_scl_pc4";
+                               nvidia,function = "i2c1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,lock = <TEGRA_PIN_LOCK_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       uart2_rxd_pc3 {
+                               nvidia,pins = "uart2_rxd_pc3";
+                               nvidia,function = "irda";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart2_txd_pc2 {
+                               nvidia,pins = "uart2_txd_pc2";
+                               nvidia,function = "irda";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       hdmi_cec_pee3 {
+                               nvidia,pins = "hdmi_cec_pee3";
+                               nvidia,function = "cec";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,open-drain = <TEGRA_PIN_OPEN_DRAIN_ENABLE>;
+                       };
+
+                       ddc_scl_pv4 {
+                               nvidia,pins = "ddc_scl_pv4";
+                               nvidia,function = "i2c4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       ddc_sda_pv5 {
+                               nvidia,pins = "ddc_sda_pv5";
+                               nvidia,function = "i2c4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       spdif_out_pk5 {
+                               nvidia,pins = "spdif_out_pk5";
+                               nvidia,function = "i2c3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       spdif_in_pk6 {
+                               nvidia,pins = "spdif_in_pk6";
+                               nvidia,function = "i2c3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gpio_w2_aud_pw2 {
+                               nvidia,pins = "gpio_w2_aud_pw2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pv0 {
+                               nvidia,pins = "pv0";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pv1 {
+                               nvidia,pins = "pv1";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk0 {
+                               nvidia,pins = "pk0";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk1 {
+                               nvidia,pins = "pk1";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pj2 {
+                               nvidia,pins = "pj2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk3 {
+                               nvidia,pins = "pk3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk4 {
+                               nvidia,pins = "pk4";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pk2 {
+                               nvidia,pins = "pk2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi3 {
+                               nvidia,pins = "pi3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi6 {
+                               nvidia,pins = "pi6";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi2 {
+                               nvidia,pins = "pi2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pi5 {
+                               nvidia,pins = "pi5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pex_wake_n_pdd3 {
+                               nvidia,pins = "pex_wake_n_pdd3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pff2 {
+                               nvidia,pins = "pff2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk2_out_pw5 {
+                               nvidia,pins = "clk2_out_pw5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col0_pq0 {
+                               nvidia,pins = "kb_col0_pq0";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col1_pq1 {
+                               nvidia,pins = "kb_col1_pq1";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col2_pq2 {
+                               nvidia,pins = "kb_col2_pq2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col3_pq3 {
+                               nvidia,pins = "kb_col3_pq3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col6_pq6 {
+                               nvidia,pins = "kb_col6_pq6";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col7_pq7 {
+                               nvidia,pins = "kb_col7_pq7";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row0_pr0 {
+                               nvidia,pins = "kb_row0_pr0";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row11_ps3 {
+                               nvidia,pins = "kb_row11_ps3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row12_ps4 {
+                               nvidia,pins = "kb_row12_ps4";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row13_ps5 {
+                               nvidia,pins = "kb_row13_ps5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row2_pr2 {
+                               nvidia,pins = "kb_row2_pr2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row3_pr3 {
+                               nvidia,pins = "kb_row3_pr3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row4_pr4 {
+                               nvidia,pins = "kb_row4_pr4";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row5_pr5 {
+                               nvidia,pins = "kb_row5_pr5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row6_pr6 {
+                               nvidia,pins = "kb_row6_pr6";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk3_req_pee1 {
+                               nvidia,pins = "clk3_req_pee1";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       hdmi_int_pn7 {
+                               nvidia,pins = "hdmi_int_pn7";
+                               nvidia,function = "rsvd1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+               };
+
+               drive_default: drive_pins {
+                       drive_dap2 {
+                               nvidia,pins = "drive_dap2";
+                               nvidia,high-speed-mode = <TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_DISABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DRIVE_SCHMITT_ENABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <31>;
+                               nvidia,pull-up-strength = <31>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+
+                       drive_sdio1 {
+                               nvidia,pins = "drive_sdio1";
+                               nvidia,high-speed-mode = <TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DRIVE_SCHMITT_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <54>;
+                               nvidia,pull-up-strength = <70>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+
+                       drive_sdio3 {
+                               nvidia,pins = "drive_sdio3";
+                               nvidia,high-speed-mode = <TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DRIVE_SCHMITT_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <20>;
+                               nvidia,pull-up-strength = <42>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+
+                       drive_gma {
+                               nvidia,pins = "drive_gma";
+                               nvidia,high-speed-mode = <TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DRIVE_SCHMITT_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <1>;
+                               nvidia,pull-up-strength = <2>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,drive-type = <1>;
+                       };
+               };
+
+               pinmux_unused_lowpower: unused_pins {
+                       dap_mclk1_req_pee2 {
+                               nvidia,pins = "dap_mclk1_req_pee2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       gpio_w3_aud_pw3 {
+                               nvidia,pins = "gpio_w3_aud_pw3";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       clk2_req_pcc5 {
+                               nvidia,pins = "clk2_req_pcc5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       kb_row1_pr1 {
+                               nvidia,pins = "kb_row1_pr1";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       kb_row14_ps6 {
+                               nvidia,pins = "kb_row14_ps6";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       kb_row15_ps7 {
+                               nvidia,pins = "kb_row15_ps7";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       sdmmc3_cd_n_pv2 {
+                               nvidia,pins = "sdmmc3_cd_n_pv2";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       owr {
+                               nvidia,pins = "owr";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       usb_vbus_en1_pn5 {
+                               nvidia,pins = "usb_vbus_en1_pn5";
+                               nvidia,function = "safe";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+               };
+       };
+};
index 592d32a..ea2b9ce 100644 (file)
@@ -2,6 +2,9 @@
  /dts-v1/;
 
 #include "tegra124.dtsi"
+#include <tegra124-platforms/tegra124-vcm30-t124-gpio-default.dtsi>
+#include <tegra124-platforms/tegra124-vcm30-t124-pinmux.dtsi>
+
 
 / {
        model = "NVIDIA Tegra124 vcm30t124";
        chosen {
        };
 
+       pinmux {
+               status = "okay";
+       };
+
        i2c@7000c000 {
                status = "okay";
                clock-frequency = <100000>;
index dbdda01..fc20984 100644 (file)
@@ -303,7 +303,6 @@ obj-${CONFIG_MACH_LAGUNA}               += panel-a-edp-1080p-14-0.o
 
 obj-${CONFIG_MACH_VCM30_T124}           += board-vcm30_t124.o
 obj-${CONFIG_MACH_VCM30_T124}           += board-vcm30_t124-sdhci.o
-obj-${CONFIG_MACH_VCM30_T124}           += board-vcm30_t124-pinmux.o
 obj-${CONFIG_MACH_VCM30_T124}           += board-vcm30_t124-power.o
 obj-${CONFIG_MACH_VCM30_T124}           += board-vcm30_t124-panel.o
 
diff --git a/arch/arm/mach-tegra/board-vcm30_t124-pinmux-t12x.h b/arch/arm/mach-tegra/board-vcm30_t124-pinmux-t12x.h
deleted file mode 100644 (file)
index d43defc..0000000
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * arch/arm/mach-tegra/board-vcm30_t124-pinmux-t12x.h
- *
- * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-/* DO NOT EDIT THIS FILE. THIS FILE IS AUTO GENERATED FROM T124_CUSTOMER_PINMUX.XLSM */
-
-
-static __initdata struct tegra_pingroup_config vcm30_t124_pinmux_common[] = {
-
-       /* EXTPERIPH1 pinmux */
-       DEFAULT_PINMUX(DAP_MCLK1,     EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
-
-       /* I2S0 pinmux */
-       DEFAULT_PINMUX(DAP1_DIN,      I2S0,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP1_DOUT,     I2S0,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP1_FS,       I2S0,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP1_SCLK,     I2S0,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* GMI pinmux */
-       DEFAULT_PINMUX(DAP2_DIN,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP2_DOUT,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP2_FS,       GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP2_SCLK,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DVFS_PWM,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_X1_AUD,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DVFS_CLK,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_X3_AUD,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PG0,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG1,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH2,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH3,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH4,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH5,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH6,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH7,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG2,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG3,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG4,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG5,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG6,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG7,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH0,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PH1,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PJ0,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PI1,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PI4,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PI7,      GMI,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PC7,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PI0,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP4_DIN,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP4_DOUT,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP4_FS,       GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP4_SCLK,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU0,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU1,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU2,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU3,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU4,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU5,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU6,      GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART2_CTS_N,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART2_RTS_N,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART3_CTS_N,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART3_RTS_N,   GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART3_RXD,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART3_TXD,     GMI,         NORMAL,    NORMAL,   OUTPUT),
-
-       /* SPI1 pinmux */
-       DEFAULT_PINMUX(GPIO_X4_AUD,   SPI1,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_X5_AUD,   SPI1,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_X6_AUD,   SPI1,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_X7_AUD,   SPI1,        NORMAL,    NORMAL,   INPUT),
-
-       /* I2S2 pinmux */
-       DEFAULT_PINMUX(DAP3_DIN,      I2S2,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP3_DOUT,     I2S2,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP3_FS,       I2S2,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DAP3_SCLK,     I2S2,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* SPI5 pinmux */
-       DEFAULT_PINMUX(ULPI_CLK,      SPI5,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_DIR,      SPI5,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_NXT,      SPI5,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_STP,      SPI5,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* SPI3 pinmux */
-       DEFAULT_PINMUX(ULPI_DATA0,    SPI3,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_DATA1,    SPI3,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA2,    SPI3,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_DATA3,    SPI3,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* SPI2 pinmux */
-       DEFAULT_PINMUX(ULPI_DATA4,    SPI2,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_DATA5,    SPI2,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA6,    SPI2,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(ULPI_DATA7,    SPI2,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* SDMMC2B pinmux */
-       DEFAULT_PINMUX(CAM_I2C_SCL,   SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(CAM_I2C_SDA,   SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(CAM_MCLK,      SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PBB0,     SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PBB3,     SDMMC2B,     NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PBB4,     SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PBB5,     SDMMC2B,     PULL_UP,   NORMAL,   INPUT),
-
-       /* I2S4 pinmux */
-       DEFAULT_PINMUX(GPIO_PBB6,     I2S4,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PBB7,     I2S4,        NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PCC1,     I2S4,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PCC2,     I2S4,        NORMAL,    NORMAL,   INPUT),
-
-       /* I2C2 pinmux */
-       I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-       I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
-       /* UARTD pinmux */
-       DEFAULT_PINMUX(GPIO_PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PB0,      UARTD,       NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PB1,      UARTD,       NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
-
-       /* PE0 pinmux */
-       DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PE0,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(PEX_L0_RST_N,  PE0,         NORMAL,    NORMAL,   OUTPUT),
-
-       /* PE1 pinmux */
-       DEFAULT_PINMUX(PEX_L1_CLKREQ_N, PE1,         NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(PEX_L1_RST_N,  PE1,         NORMAL,    NORMAL,   OUTPUT),
-
-       /* USB pinmux */
-       USB_PINMUX(USB_VBUS_EN2, USB, PULL_UP, NORMAL, INPUT, DEFAULT, DISABLE),
-       USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
-
-       /* SDMMC1 pinmux */
-       DEFAULT_PINMUX(SDMMC1_WP_N,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_CLK,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_CMD,    SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT0,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT1,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT2,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT3,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
-
-       /* SDMMC3 pinmux */
-       DEFAULT_PINMUX(SDMMC3_CLK,    SDMMC3,      NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(SDMMC3_CMD,    SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT0,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT1,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT2,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT3,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_COL4,       SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_COL5,       SDMMC3,      PULL_UP,   NORMAL,   INPUT),
-
-       /* SDMMC4 pinmux */
-       DEFAULT_PINMUX(SDMMC4_CLK,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_CMD,    SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT0,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT1,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT2,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT3,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT4,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT5,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT6,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT7,   SDMMC4,      PULL_UP,   NORMAL,   INPUT),
-
-       /* UARTA pinmux */
-       DEFAULT_PINMUX(KB_ROW10,      UARTA,       NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_ROW7,       UARTA,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(KB_ROW8,       UARTA,       NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_ROW9,       UARTA,       NORMAL,    NORMAL,   OUTPUT),
-
-       /* UARTC pinmux */
-       DEFAULT_PINMUX(KB_ROW16,      UARTC,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(KB_ROW17,      UARTC,       NORMAL,    NORMAL,   INPUT),
-
-       /* BLINK pinmux */
-       DEFAULT_PINMUX(CLK_32K_OUT,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
-
-       /* I2CPWR pinmux */
-       I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-
-       /* RTCK pinmux */
-       DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* CLK pinmux */
-       DEFAULT_PINMUX(CLK_32K_IN,    CLK,         NORMAL,    NORMAL,   INPUT),
-
-       /* PWRON pinmux */
-       DEFAULT_PINMUX(CORE_PWR_REQ,  PWRON,       NORMAL,    NORMAL,   OUTPUT),
-
-       /* CPU pinmux */
-       DEFAULT_PINMUX(CPU_PWR_REQ,   CPU,         NORMAL,    NORMAL,   OUTPUT),
-
-       /* PMI pinmux */
-       DEFAULT_PINMUX(PWR_INT_N,     PMI,         NORMAL,    NORMAL,   INPUT),
-
-       /* RESET_OUT_N pinmux */
-       DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
-
-       /* EXTPERIPH3 pinmux */
-       DEFAULT_PINMUX(CLK3_OUT,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
-
-       /* I2C1 pinmux */
-       I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-       I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
-       /* IRDA pinmux */
-       DEFAULT_PINMUX(UART2_RXD,     IRDA,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(UART2_TXD,     IRDA,        NORMAL,    NORMAL,   OUTPUT),
-
-       /* CEC pinmux */
-       CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-
-       /* I2C4 pinmux */
-       DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
-       DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
-
-       /* I2C3 pinmux */
-       I2C_PINMUX(SPDIF_OUT, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(SPDIF_IN, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-
-       /* GPIO pinmux */
-       GPIO_PINMUX_NON_OD(GPIO_W2_AUD, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PV0, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PV1, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PK0, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PK1, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PJ2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PK3, PULL_UP, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PK4, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PK2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PI3, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PI6, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PI2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PI5, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(PEX_WAKE_N, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(GPIO_PFF2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(CLK2_OUT, NORMAL, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(KB_COL0, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_COL1, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_COL2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_COL3, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_COL6, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_COL7, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW0, NORMAL, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW11, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW12, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW13, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW2, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW3, NORMAL, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW4, NORMAL, NORMAL, INPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW5, NORMAL, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(KB_ROW6, NORMAL, NORMAL, OUTPUT),
-       GPIO_PINMUX_NON_OD(CLK3_REQ, NORMAL, NORMAL, INPUT),
-       DDC_PINMUX(HDMI_INT, RSVD1, PULL_DOWN, NORMAL, INPUT, DEFAULT, NORMAL),
-};
-
-static __initdata struct tegra_pingroup_config unused_pins_lowpower[] = {
-       UNUSED_PINMUX(DAP_MCLK1_REQ),
-       UNUSED_PINMUX(GPIO_W3_AUD),
-       UNUSED_PINMUX(CLK2_REQ),
-       UNUSED_PINMUX(KB_ROW1),
-       UNUSED_PINMUX(KB_ROW14),
-       UNUSED_PINMUX(KB_ROW15),
-       UNUSED_PINMUX(SDMMC3_CD_N),
-       UNUSED_PINMUX(OWR),
-       UNUSED_PINMUX(USB_VBUS_EN1),
-};
-
-static struct gpio_init_pin_info init_gpio_mode_vcm30_t124_common[] = {
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PW2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PV0, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PV1, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK0, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK1, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PJ2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK3, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK4, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI3, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI6, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI5, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PDD3, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PFF2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PW5, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ0, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ1, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ3, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ6, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ7, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR0, false, 1),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS3, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS4, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS5, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR2, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR3, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR4, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR5, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR6, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PEE1, true, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PN7, true, 0),
-};
diff --git a/arch/arm/mach-tegra/board-vcm30_t124-pinmux.c b/arch/arm/mach-tegra/board-vcm30_t124-pinmux.c
deleted file mode 100644 (file)
index 1686c26..0000000
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * arch/arm/mach-tegra/board-vcm30_t124-pinmux.c
- *
- * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <mach/pinmux.h>
-#include <mach/gpio-tegra.h>
-#include <mach/pinmux-t12.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pca953x.h>
-
-#include "board.h"
-#include "board-vcm30_t124.h"
-#include "devices.h"
-#include "gpio-names.h"
-
-#include "board-vcm30_t124-pinmux-t12x.h"
-
-/* FIXME: Check these drive strengths for VCM30_T124. */
-static __initdata
-struct tegra_drive_pingroup_config vcm30_t124_drive_pinmux[] = {
-
-       /*Set DAP2 drive (required for Codec Master Mode)*/
-       SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 51, 51, FASTEST, FASTEST),
-
-       /* SDMMC1 */
-       SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 54, 70, FASTEST, FASTEST),
-
-       /* SDMMC3 */
-       SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 20, 42, FASTEST, FASTEST),
-
-       /* SDMMC4 */
-       SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 1, 2, FASTEST,
-                       FASTEST, 1),
-};
-
-
-static void __init vcm30_t124_gpio_init_configure(void)
-{
-       int len;
-       int i;
-       struct gpio_init_pin_info *pins_info;
-
-       len = ARRAY_SIZE(init_gpio_mode_vcm30_t124_common);
-       pins_info = init_gpio_mode_vcm30_t124_common;
-
-       for (i = 0; i < len; ++i) {
-               tegra_gpio_init_configure(pins_info->gpio_nr,
-                       pins_info->is_input, pins_info->value);
-               pins_info++;
-       }
-}
-
-int __init vcm30_t124_pinmux_init(void)
-{
-       vcm30_t124_gpio_init_configure();
-
-       tegra_pinmux_config_table(vcm30_t124_pinmux_common,
-                                       ARRAY_SIZE(vcm30_t124_pinmux_common));
-
-       tegra_drive_pinmux_config_table(vcm30_t124_drive_pinmux,
-                                       ARRAY_SIZE(vcm30_t124_drive_pinmux));
-       tegra_pinmux_config_table(unused_pins_lowpower,
-               ARRAY_SIZE(unused_pins_lowpower));
-
-       return 0;
-}
-
-/*
- * GPIO init table for PCA9539 MISC IO GPIOs
- * that have to be brought up to a known good state
- * except for WiFi as it is handled via the
- * WiFi stack.
- */
-static struct gpio vcm30_t124_system_gpios[] = {
-       {MISCIO_BT_WAKEUP_GPIO, GPIOF_OUT_INIT_HIGH,    "bt_wk"},
-       {MISCIO_ABB_RST_GPIO,   GPIOF_OUT_INIT_HIGH,    "ebb_rst"},
-       {MISCIO_USER_LED2_GPIO, GPIOF_OUT_INIT_LOW,     "usr_led2"},
-       {MISCIO_USER_LED1_GPIO, GPIOF_OUT_INIT_LOW,     "usr_led1"},
-};
-
-static int __init vcm30_t124_system_gpio_init(void)
-{
-       int ret, pin_count = 0;
-       struct gpio *gpios_info = NULL;
-       gpios_info = vcm30_t124_system_gpios;
-       pin_count = ARRAY_SIZE(vcm30_t124_system_gpios);
-
-       /* Set required system GPIOs to initial bootup values */
-       ret = gpio_request_array(gpios_info, pin_count);
-
-       if (ret)
-               pr_err("%s gpio_request_array failed(%d)\r\n",
-                                __func__, ret);
-
-       /* Export the LED GPIOs to userland for any check */
-       gpio_export(MISCIO_USER_LED2_GPIO, false);
-       gpio_export(MISCIO_USER_LED1_GPIO, false);
-
-       return ret;
-}
-
-/*
- * TODO: Check for the correct pca953x before invoking client
- *  init functions
- */
-static int pca953x_client_setup(struct i2c_client *client,
-                               unsigned gpio, unsigned ngpio,
-                               void *context)
-{
-       int ret = 0;
-
-       ret = vcm30_t124_system_gpio_init();
-       if (ret < 0)
-               goto fail;
-
-       return 0;
-fail:
-       pr_err("%s failed(%d)\r\n", __func__, ret);
-       return ret;
-}
-
-static struct pca953x_platform_data vcm30_t124_miscio_pca9539_data = {
-       .gpio_base  = PCA953X_MISCIO_GPIO_BASE,
-       .setup = pca953x_client_setup,
-};
-
-static struct i2c_board_info vcm30_t124_i2c2_board_info_pca9539[] = {
-       {
-               I2C_BOARD_INFO("pca9539", PCA953X_MISCIO_ADDR),
-               .platform_data = &vcm30_t124_miscio_pca9539_data,
-       },
-};
-
-int __init vcm30_t124_pca953x_init(void)
-{
-       i2c_register_board_info(1, vcm30_t124_i2c2_board_info_pca9539,
-               ARRAY_SIZE(vcm30_t124_i2c2_board_info_pca9539));
-       return 0;
-}
index 174d90e..c3c93e8 100644 (file)
@@ -20,6 +20,8 @@
 #include <linux/mfd/max77663-core.h>
 #include <linux/regulator/max77663-regulator.h>
 #include <linux/regulator/max15569-regulator.h>
+#include <linux/gpio.h>
+#include <linux/i2c/pca953x.h>
 
 #include <mach/edp.h>
 
@@ -378,3 +380,77 @@ int __init vcm30_t124_soctherm_init(void)
 */
        return tegra11_soctherm_init(&vcm30_t124_soctherm_data);
 }
+
+
+/*
+ * GPIO init table for PCA9539 MISC IO GPIOs
+ * that have to be brought up to a known good state
+ * except for WiFi as it is handled via the
+ * WiFi stack.
+ */
+static struct gpio vcm30_t124_system_gpios[] = {
+       {MISCIO_BT_WAKEUP_GPIO, GPIOF_OUT_INIT_HIGH,    "bt_wk"},
+       {MISCIO_ABB_RST_GPIO,   GPIOF_OUT_INIT_HIGH,    "ebb_rst"},
+       {MISCIO_USER_LED2_GPIO, GPIOF_OUT_INIT_LOW,     "usr_led2"},
+       {MISCIO_USER_LED1_GPIO, GPIOF_OUT_INIT_LOW,     "usr_led1"},
+};
+
+static int __init vcm30_t124_system_gpio_init(void)
+{
+       int ret, pin_count = 0;
+       struct gpio *gpios_info = NULL;
+       gpios_info = vcm30_t124_system_gpios;
+       pin_count = ARRAY_SIZE(vcm30_t124_system_gpios);
+
+       /* Set required system GPIOs to initial bootup values */
+       ret = gpio_request_array(gpios_info, pin_count);
+
+       if (ret)
+               pr_err("%s gpio_request_array failed(%d)\r\n",
+                                __func__, ret);
+
+       /* Export the LED GPIOs to userland for any check */
+       gpio_export(MISCIO_USER_LED2_GPIO, false);
+       gpio_export(MISCIO_USER_LED1_GPIO, false);
+
+       return ret;
+}
+
+/*
+ * TODO: Check for the correct pca953x before invoking client
+ *  init functions
+ */
+static int pca953x_client_setup(struct i2c_client *client,
+                               unsigned gpio, unsigned ngpio,
+                               void *context)
+{
+       int ret = 0;
+
+       ret = vcm30_t124_system_gpio_init();
+       if (ret < 0)
+               goto fail;
+
+       return 0;
+fail:
+       pr_err("%s failed(%d)\r\n", __func__, ret);
+       return ret;
+}
+
+static struct pca953x_platform_data vcm30_t124_miscio_pca9539_data = {
+       .gpio_base  = PCA953X_MISCIO_GPIO_BASE,
+       .setup = pca953x_client_setup,
+};
+
+static struct i2c_board_info vcm30_t124_i2c2_board_info_pca9539[] = {
+       {
+               I2C_BOARD_INFO("pca9539", PCA953X_MISCIO_ADDR),
+               .platform_data = &vcm30_t124_miscio_pca9539_data,
+       },
+};
+
+int __init vcm30_t124_pca953x_init(void)
+{
+       i2c_register_board_info(1, vcm30_t124_i2c2_board_info_pca9539,
+               ARRAY_SIZE(vcm30_t124_i2c2_board_info_pca9539));
+       return 0;
+}
index 813bbdf..75efcdc 100644 (file)
@@ -453,8 +453,6 @@ static void __init tegra_vcm30_t124_late_init(void)
                board_info.board_id, board_info.sku,
                board_info.fab, board_info.major_revision,
                board_info.minor_revision);
-       platform_device_register(&tegra124_pinctrl_device);
-       vcm30_t124_pinmux_init();
        vcm30_t124_usb_init();
 /*     vcm30_t124_xusb_init(); */
        vcm30_t124_nor_init();
index 2b78721..a0d6429 100644 (file)
@@ -25,7 +25,6 @@
 #include <linux/mfd/max77663-core.h>
 #include "gpio-names.h"
 
-int vcm30_t124_pinmux_init(void);
 int vcm30_t124_panel_init(void);
 int vcm30_t124_sdhci_init(void);
 int vcm30_t124_sensors_init(void);