ARM: tegra: Pad client list of TEGRA_POWERGATE_HEG
Terje Bergstrom [Thu, 3 Nov 2011 11:58:22 +0000 (13:58 +0200)]
Client list for TEGRA_POWERGATE_HEG was not padded with MC_CLIENT_LAST,
which causes an infinite loop if HEG is power gated.

Bug 855755

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/62129
(cherry picked from commit b36a3ef9584ceb23bd0ed97ba662a12ec08ce957)
Change-Id: Id6ad765db682ee153c7a271e01e3c40e462db6c4
Reviewed-on: http://git-master/r/67126
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rcc760672dbf2cc139a5637bb12e4d02393533e4e

arch/arm/mach-tegra/powergate.c

index f1967a8..17b51ca 100644 (file)
@@ -164,7 +164,9 @@ static struct powergate_partition powergate_partition_info[] = {
                                                {MC_CLIENT_NV2, MC_CLIENT_LAST},
                                                {{"3d2", CLK_AND_RST} }, },
        [TEGRA_POWERGATE_HEG]   = { "heg",
-                                               {MC_CLIENT_G2, MC_CLIENT_EPP, MC_CLIENT_HC},
+                                               {MC_CLIENT_G2, MC_CLIENT_EPP,
+                                                       MC_CLIENT_HC,
+                                                       MC_CLIENT_LAST},
                                                {{"2d", CLK_AND_RST},
                                                {"epp", CLK_AND_RST},
                                                {"host1x", CLK_AND_RST},
@@ -214,7 +216,6 @@ static void mc_flush(int id)
                        break;
 
                spin_lock_irqsave(&tegra_powergate_lock, flags);
-
                rst_ctrl = mc_read(MC_CLIENT_HOTRESET_CTRL);
                rst_ctrl |= (1 << mcClientBit);
                mc_write(rst_ctrl, MC_CLIENT_HOTRESET_CTRL);