ARM: tegra: sdhci: Pass boot vcore in plat data
Pavan Kunapuli [Fri, 16 Aug 2013 09:25:46 +0000 (14:25 +0530)]
Pass boot core voltage limit through platform data.
Enable nominal voltage tuning support for pluto.

Bug 1330567

Change-Id: Ia1c349bcf22cb80423d0dd782209fd94dc35b507
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/270146
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arch/arm/mach-tegra/board-dalmore-sdhci.c
arch/arm/mach-tegra/board-macallan-sdhci.c
arch/arm/mach-tegra/board-pluto-sdhci.c
arch/arm/mach-tegra/board-roth-sdhci.c

index 06d3a09..837b759 100644 (file)
@@ -392,6 +392,7 @@ int __init dalmore_sdhci_init(void)
 {
        int nominal_core_mv;
        int min_vcore_override_mv;
+       int boot_vcore_mv;
        struct board_info board_info;
 
        nominal_core_mv =
@@ -412,6 +413,13 @@ int __init dalmore_sdhci_init(void)
                tegra_sdhci_platform_data3.min_vcore_override_mv =
                        min_vcore_override_mv;
        }
+       boot_vcore_mv = tegra_dvfs_rail_get_boot_level(tegra_core_rail);
+       if (boot_vcore_mv) {
+               dalmore_tegra_sdhci_platform_data0.boot_vcore_mv =
+                       boot_vcore_mv;
+               tegra_sdhci_platform_data2.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv;
+       }
        if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200)
                && (!(tegra_sdhci_platform_data3.uhs_mask &
                MMC_UHS_MASK_DDR50)))
index 7125c51..477cee8 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-tegra/board-macallan-sdhci.c
  *
- * Copyright (C) 2013 NVIDIA Corporation.
+ * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -286,6 +286,7 @@ int __init macallan_sdhci_init(void)
 
        int nominal_core_mv;
        int min_vcore_override_mv;
+       int boot_vcore_mv;
 
        nominal_core_mv =
                tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail);
@@ -305,6 +306,14 @@ int __init macallan_sdhci_init(void)
                tegra_sdhci_platform_data3.min_vcore_override_mv =
                        min_vcore_override_mv;
        }
+       boot_vcore_mv = tegra_dvfs_rail_get_boot_level(tegra_core_rail);
+       if (boot_vcore_mv) {
+               macallan_tegra_sdhci_platform_data0.boot_vcore_mv =
+                       boot_vcore_mv;
+               tegra_sdhci_platform_data2.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv;
+       }
+
        if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200)
                && (!(tegra_sdhci_platform_data3.uhs_mask &
                MMC_UHS_MASK_DDR50)))
index 85ec395..2c6c2da 100644 (file)
@@ -310,6 +310,7 @@ int __init pluto_sdhci_init(void)
 {
        int nominal_core_mv;
        int min_vcore_override_mv;
+       int boot_vcore_mv;
 
        nominal_core_mv =
                tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail);
@@ -329,6 +330,13 @@ int __init pluto_sdhci_init(void)
                tegra_sdhci_platform_data3.min_vcore_override_mv =
                        min_vcore_override_mv;
        }
+       boot_vcore_mv = tegra_dvfs_rail_get_boot_level(tegra_core_rail);
+       if (boot_vcore_mv) {
+               pluto_tegra_sdhci_platform_data0.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data2.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv;
+       }
+
        if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200)
                && (!(tegra_sdhci_platform_data3.uhs_mask &
                MMC_UHS_MASK_DDR50)))
index 14f064f..5b1bc67 100644 (file)
@@ -420,6 +420,7 @@ int __init roth_sdhci_init(void)
 {
        int nominal_core_mv;
        int min_vcore_override_mv;
+       int boot_vcore_mv;
 
        nominal_core_mv =
                tegra_dvfs_rail_get_nominal_millivolts(tegra_core_rail);
@@ -438,6 +439,12 @@ int __init roth_sdhci_init(void)
                tegra_sdhci_platform_data3.min_vcore_override_mv =
                        min_vcore_override_mv;
        }
+       boot_vcore_mv = tegra_dvfs_rail_get_boot_level(tegra_core_rail);
+       if (boot_vcore_mv) {
+               tegra_sdhci_platform_data0.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data2.boot_vcore_mv = boot_vcore_mv;
+               tegra_sdhci_platform_data3.boot_vcore_mv = boot_vcore_mv;
+       }
 
        if ((tegra_sdhci_platform_data3.uhs_mask & MMC_MASK_HS200)
                && (!(tegra_sdhci_platform_data3.uhs_mask &