ARM: tegra: clock: Re-factor shared bus locking
Alex Frid [Sat, 1 Oct 2011 23:00:51 +0000 (16:00 -0700)]
Current code:
- on tegra2 unnecessary covers with bus lock shared user state update
- on tegra3 does not cover shared bus rate update at all
Modified to cover with bus lock shared bus rate update only on both
tegra2 and tegra3.

Change-Id: Iaa2597136a521adf4285c61eb579c917c2c7965c
Reviewed-on: http://git-master/r/55640
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R1b28f32ae37d47c56855023b18c943bf8fd93c74

arch/arm/mach-tegra/clock.c

index 5feecf4..c5a6034 100644 (file)
@@ -665,10 +665,14 @@ EXPORT_SYMBOL(tegra_is_clk_enabled);
 int tegra_clk_shared_bus_update(struct clk *c)
 {
        int ret = 0;
+       unsigned long flags;
+
+       clk_lock_save(c, &flags);
 
        if (c->ops && c->ops->shared_bus_update)
                ret = c->ops->shared_bus_update(c);
 
+       clk_unlock_restore(c, &flags);
        return ret;
 }