ARM: tegra: ardbeg: Update SDMMC3/4 drive strengths
Naveen Kumar Arepalli [Wed, 26 Jun 2013 10:21:20 +0000 (15:21 +0530)]
-Update SDMMC3/4 drive strengths
-Values are as per T124 SDMMC IAS V5

Bug 1297408

Change-Id: I1772834e32ce300368e94003853401d562ea77b0
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/242364
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

arch/arm/mach-tegra/board-ardbeg-pinmux.c

index 7c429a2..203f091 100644 (file)
@@ -220,10 +220,10 @@ static __initdata struct tegra_drive_pingroup_config ardbeg_drive_pinmux[] = {
        SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 36, 20, SLOW, SLOW),
 
        /* SDMMC3 */
-       SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 22, 36, FASTEST, FASTEST),
+       SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 54, 70, FASTEST, FASTEST),
 
        /* SDMMC4 */
-       SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 1, FASTEST,
+       SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 1, 2, FASTEST,
                                                                FASTEST, 1),
 #endif
 };