ARM: tegra12: dvfs: fix gpu dvfs settings
Prashant Malani [Tue, 20 Aug 2013 23:34:19 +0000 (16:34 -0700)]
Update vdd_gpu rail settings so that we can reach the lowest voltage
setting of 810 mV.

Also change the 700 MHz entry to 702 MHz, since GPU clock can not reach
700, Without this, setting 700 would result in voltage being set to the
next higher range.

Bug 1352610

Change-Id: I19b1f759a0b88acc4d52e2bf87966ef8407ded82
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/264115
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

arch/arm/mach-tegra/tegra12_dvfs.c

index 3ca7c31..29350eb 100644 (file)
@@ -76,7 +76,7 @@ static struct dvfs_rail tegra12_dvfs_rail_vdd_core = {
 static struct dvfs_rail tegra12_dvfs_rail_vdd_gpu = {
        .reg_id = "vdd_gpu",
        .max_millivolts = 1350,
-       .min_millivolts = 850,
+       .min_millivolts = 810,
        .step = VDD_SAFE_STEP,
        .alignment = {
                .step_uv = 10000, /* 10mV */
@@ -289,7 +289,7 @@ static struct core_cvb_dvfs gpu_cvb_dvfs_table[] = {
                        /*f        dfll  pll:   c0,     c1,   c2 */
                        {  408000, {  }, {  810000,      0,   0}, },
                        {  528000, {  }, {  860000,      0,   0}, },
-                       {  700000, {  }, {  900000,      0,   0}, },
+                       {  702000, {  }, {  900000,      0,   0}, },
                        {  984000, {  }, {  990000,      0,   0}, },
                        { 1248000, {  }, { 1080000,      0,   0}, },
                        {       0, {  }, {       0,      0,   0}, },