gpu: nvgpu: post events on all channels of TSG.
Ashutosh Jain [Wed, 17 Feb 2016 13:00:48 +0000 (18:00 +0530)]
Raise the SM exception event on dbg fds of all
channels as userspace might have registered on
only one of the channels.
WAR till we fix Bug 200089620

Bug 1724367

Change-Id: I69c20ee9837927c116f350f4bdc70af5e90cd0a8
Signed-off-by: Ashutosh Jain <ashutoshj@nvidia.com>
Reviewed-on: http://git-master/r/1012851
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/gk20a/gr_gk20a.c

index 0a07ddf..cc66946 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * GK20A Graphics
  *
- * Copyright (c) 2011-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -5613,8 +5613,21 @@ int gk20a_gr_isr(struct gk20a *g)
                                /* signal clients waiting on an event */
                                fault_ch = channel_from_hw_chid(g,
                                                                isr_data.chid);
-                               if (post_event && fault_ch)
-                                       gk20a_dbg_gpu_post_events(fault_ch);
+                               if (post_event && fault_ch) {
+                                       if (gk20a_is_channel_marked_as_tsg(fault_ch)) {
+                                               struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid];
+                                               struct channel_gk20a *__ch;
+
+                                               mutex_lock(&tsg->ch_list_lock);
+                                               list_for_each_entry(__ch, &tsg->ch_list, ch_entry) {
+                                                       gk20a_dbg_gpu_post_events(__ch);
+                                               }
+                                               mutex_unlock(&tsg->ch_list_lock);
+                                       }
+                                       else {
+                                               gk20a_dbg_gpu_post_events(fault_ch);
+                                       }
+                               }
                        }
 
                        if (need_reset)