ARM: tegra: ardbeg: Enable SDR104 mode for SD
R Raj Kumar [Fri, 20 Sep 2013 10:11:13 +0000 (15:11 +0530)]
Enable SDR104 mode for SD.
Enable POR frequency for SD on E1780.

Bug 1340258

Change-Id: I23b625bcce4be5fd9833e5eec4c3ffaf5916a8ca
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/277152
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
(cherry picked from commit 0794b21578d47eea1f80a5bb8754d907c0574d03)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>

arch/arm/mach-tegra/board-ardbeg-sdhci.c

index e7a1f23..313a07b 100644 (file)
@@ -164,7 +164,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
        .trim_delay = 0x3,
 /*FIXME: Enable UHS modes for SD */
        .uhs_mask = MMC_UHS_MASK_SDR12 | MMC_UHS_MASK_SDR25 |
-                MMC_UHS_MASK_SDR104 |
                MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
@@ -338,10 +337,12 @@ int __init ardbeg_sdhci_init(void)
        }
 
        tegra_get_board_info(&board_info);
-       if (board_info.board_id == BOARD_E1780)
+       if (board_info.board_id == BOARD_E1780) {
                tegra_sdhci_platform_data3.max_clk_limit = 200000000;
-       else
+               tegra_sdhci_platform_data2.max_clk_limit = 204000000;
+       } else {
                tegra_sdhci_platform_data3.uhs_mask = MMC_MASK_HS200;
+       }
 
        platform_device_register(&tegra_sdhci_device3);
        platform_device_register(&tegra_sdhci_device2);