arm: mach_tegra: fix warnings soctherm
Philip Rakity [Wed, 4 Sep 2013 12:32:16 +0000 (13:32 +0100)]
use correct types
fix format warnings

Change-Id: I1a0a646ca56e810e4ce7d022f6bc148d99fd3841
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/270685
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

arch/arm/mach-tegra/tegra11_soctherm.c

index 3d91d63..b2d645b 100644 (file)
@@ -443,20 +443,6 @@ static void __iomem *reg_soctherm_base = IO_ADDRESS(TEGRA_SOCTHERM_BASE);
 static void __iomem *pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
 static void __iomem *clk_reset_base = IO_ADDRESS(TEGRA_CLK_RESET_BASE);
 
-#define clk_reset_writel(value, reg) \
-       __raw_writel(value, clk_reset_base + (reg))
-#define clk_reset_readl(reg) __raw_readl(clk_reset_base + (reg))
-
-#define pmc_writel(value, reg) __raw_writel(value, pmc_base + (reg))
-#define pmc_readl(reg) __raw_readl(pmc_base + (reg))
-
-#define soctherm_writel(value, reg)    \
-       (soctherm_suspended ?:          \
-               __raw_writel(value, reg_soctherm_base + (reg)))
-#define soctherm_readl(reg)            \
-       (soctherm_suspended ? 0 :       \
-               __raw_readl(reg_soctherm_base + (reg)))
-
 static DEFINE_MUTEX(soctherm_suspend_resume_lock);
 
 static int soctherm_suspend(void);
@@ -477,6 +463,42 @@ static bool soctherm_high_voltage_range = true;
 static struct clk *soctherm_clk;
 static struct clk *tsensor_clk;
 
+static inline void soctherm_writel(u32 value, u32 reg)
+{
+       if (!soctherm_suspended)
+               __raw_writel(value, (void *)
+                       (reg_soctherm_base + reg));
+}
+
+static inline u32 soctherm_readl(u32 reg)
+{
+       if (soctherm_suspended)
+               return 0;
+       return __raw_readl(reg_soctherm_base + reg);
+}
+
+static inline void pmc_writel(u32 value, u32 reg)
+{
+       __raw_writel(value, (void *)
+               (pmc_base + reg));
+}
+
+static inline u32 pmc_readl(u32 reg)
+{
+       return __raw_readl(pmc_base + reg);
+}
+
+static inline void clk_reset_writel(u32 value, u32 reg)
+{
+       __raw_writel(value, (void *)
+               (clk_reset_base + reg));
+}
+
+static inline u32 clk_reset_readl(u32 reg)
+{
+       return __raw_readl(clk_reset_base + reg);
+}
+
 static inline long temp_convert(int cap, int a, int b)
 {
        cap *= a;
@@ -1711,7 +1733,6 @@ static int soctherm_clk_enable(bool enable)
 
 static int soctherm_fuse_read_calib_base(void)
 {
-       u32 value;
        s32 calib_cp, calib_ft;
        s32 nominal_calib_cp, nominal_calib_ft;
 
@@ -2519,7 +2540,7 @@ static int regs_show(struct seq_file *s, void *data)
                                tegra_chip_id == TEGRA_CHIPID_TEGRA12) {
                                state = REG_GET(r,
                                        THROT_PSKIP_CTRL_THROT_DEPTH);
-                               seq_printf(s, "throt depth: %s  ", state);
+                               seq_printf(s, "throt depth: %d  ", state);
                        } else {
                                state = REG_GET(r, THROT_PSKIP_CTRL_DIVIDEND);
                                seq_printf(s, "%8d  ", state);