arm64: barrier: Add CSDB macros to control data-value prediction
Will Deacon [Mon, 5 Feb 2018 15:34:16 +0000 (15:34 +0000)]
For CPUs capable of data value prediction, CSDB waits for any outstanding
predictions to architecturally resolve before allowing speculative execution
to continue. Provide macros to expose it to the arch code.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Change-Id: Iecb67a5e9953b0dd510fd946e95365d4b2ec9276
Reviewed-on: https://git-master.nvidia.com/r/1662096
(cherry picked from commit 5ad3a2c3e638cf849cc857f5414861bcc2eba65a)
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1687452
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arch/arm64/include/asm/assembler.h
arch/arm64/include/asm/barrier.h

index ff16f97..d6eafa0 100644 (file)
        .quad   9999b,l;                        \
        .previous
 
+ /*
+  * Value prediction barrier
+  */
+       .macro  csdb
+       hint    #20
+       .endm
+
 /*
  * Register aliases.
  */
index 4657cf4..3cefc36 100644 (file)
@@ -27,6 +27,8 @@
 #define isb()          asm volatile("isb" : : : "memory")
 #define dsb(opt)       asm volatile("dsb sy" : : : "memory")
 
+#define csdb()         asm volatile("hint #20" : : : "memory")
+
 #define mb()           dsb()
 #define rmb()          asm volatile("dsb ld" : : : "memory")
 #define wmb()          asm volatile("dsb st" : : : "memory")