ARM: tegra: uart: Restore FCR in uart resume
Pradeep Goudagunta [Fri, 4 Nov 2011 10:25:01 +0000 (15:25 +0530)]
Restore FCR while resuming debug uart, to enable RX and TX FIFOs with
trigger levels configured during initialisation of debug uart port.

Bug 867063

Change-Id: I9665ff29a53c3e2e6c78a3037e20e7362a642f77
Reviewed-on: http://git-master/r/62411
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Ra3b9858456b952ab539a36019a55863077094054

arch/arm/mach-tegra/pm.c

index 50740b0..9b4ee17 100644 (file)
@@ -1129,6 +1129,9 @@ static void tegra_debug_uart_resume(void)
        /* DLAB = 0 */
        writeb(lcr & ~UART_LCR_DLAB, uart + UART_LCR * 4);
 
+       writeb(UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_01 | UART_FCR_R_TRIG_01,
+                       uart + UART_FCR * 4);
+
        writeb(tegra_sctx.uart[2], uart + UART_IER * 4);
 
        /* DLAB = 1 */