Revert "clocksource: tegra210: use old timers"
Antti P Miettinen [Wed, 21 May 2014 08:46:31 +0000 (11:46 +0300)]
This reverts commit b393ed321ddec72fe41796801493377d4e5faf40.

Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Change-Id: I73d7f8b84c17583c947d2e72e9c6e03d3bda0a91
Reviewed-on: http://git-master/r/414720
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Timo Alho <talho@nvidia.com>

arch/arm64/boot/dts/tegra210.dtsi
drivers/clocksource/tegra210_timer.c

index 97d7242..dd004de 100644 (file)
        timer@60005000 {
                compatible = "nvidia,tegra210-timer";
                reg = <0x0 0x60005000 0x0 0x400>;
-               interrupts = <0 41 4>,
-                            <0 42 4>,
-                            <0 121 4>,
-                            <0 152 4>;
+               interrupts = <0 176 4>,
+                            <0 177 4>,
+                            <0 178 4>,
+                            <0 179 4>;
                clock-frequency = <38400000>;
        };
 
index 3c389c1..a25d454 100644 (file)
@@ -35,15 +35,15 @@ static u32 usec_config;
 #define TIMERUS_CNTR_1US 0x10
 #define TIMERUS_USEC_CFG 0x14
 
-#define TIMER3_OFFSET 0x50
-#define TIMER4_OFFSET 0x58
-#define TIMER5_OFFSET 0x60
-#define TIMER6_OFFSET 0x68
+#define TIMER10_OFFSET 0x90
+#define TIMER11_OFFSET 0x98
+#define TIMER12_OFFSET 0xa0
+#define TIMER13_OFFSET 0xa8
 
 #define TIMER_PTV 0x0 /* present trigger value register */
 #define TIMER_PCR 0x4 /* present counter value register */
 
-#define TIMER_FOR_CPU(cpu) (TIMER3_OFFSET + (cpu) * 8)
+#define TIMER_FOR_CPU(cpu) (TIMER10_OFFSET + (cpu) * 8)
 
 #define TNAMELEN 20
 
@@ -78,7 +78,7 @@ static void tegra210_timer_set_mode(enum clock_event_mode mode,
        case CLOCK_EVT_MODE_PERIODIC:
                __raw_writel((1 << 31) /* EN=1, enable timer */
                             | (1 << 30) /* PER=1, periodic mode */
-                            | ((1000000 / HZ) - 1),
+                            | ((tegra210_timer_freq / HZ) - 1),
                             tevt->reg_base + TIMER_PTV);
                break;
        case CLOCK_EVT_MODE_ONESHOT:
@@ -122,7 +122,7 @@ static void tegra210_timer_setup(struct tegra210_clockevent *tevt)
                       __func__, tevt->evt.irq, cpu);
                BUG();
        }
-       clockevents_config_and_register(&tevt->evt, 1000000,
+       clockevents_config_and_register(&tevt->evt, tegra210_timer_freq,
                                        1, /* min */
                                        0x1fffffff); /* 29 bits */
 }