ARM: tegra: ardbeg: Enable BT over UART support
Nagarjuna Kristam [Fri, 7 Jun 2013 08:45:45 +0000 (13:45 +0530)]
Add bluedroid_pm platform resource
Enable UART clocks

Bug 1256420

Change-Id: I8fdcaa19eb1de5ab89f32eea7ff2cf4ad18650cd
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/236615
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arch/arm/mach-tegra/board-ardbeg.c

index 87018c8..27693bb 100644 (file)
 
 static struct board_info board_info, display_board_info;
 
+static struct resource ardbeg_bluedroid_pm_resources[] = {
+       [0] = {
+               .name   = "shutdown_gpio",
+               .start  = TEGRA_GPIO_PR1,
+               .end    = TEGRA_GPIO_PR1,
+               .flags  = IORESOURCE_IO,
+       },
+       [1] = {
+               .name = "host_wake",
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+       },
+       [2] = {
+               .name = "gpio_ext_wake",
+               .start  = TEGRA_GPIO_PEE1,
+               .end    = TEGRA_GPIO_PEE1,
+               .flags  = IORESOURCE_IO,
+       },
+       [3] = {
+               .name = "gpio_host_wake",
+               .start  = TEGRA_GPIO_PU6,
+               .end    = TEGRA_GPIO_PU6,
+               .flags  = IORESOURCE_IO,
+       },
+       [4] = {
+               .name = "reset_gpio",
+               .start  = TEGRA_GPIO_PX1,
+               .end    = TEGRA_GPIO_PX1,
+               .flags  = IORESOURCE_IO,
+       },
+};
+
+static struct platform_device ardbeg_bluedroid_pm_device = {
+       .name = "bluedroid_pm",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(ardbeg_bluedroid_pm_resources),
+       .resource       = ardbeg_bluedroid_pm_resources,
+};
+
+static noinline void __init ardbeg_setup_bluedroid_pm(void)
+{
+       ardbeg_bluedroid_pm_resources[1].start =
+               ardbeg_bluedroid_pm_resources[1].end =
+                               gpio_to_irq(TEGRA_GPIO_PU6);
+       platform_device_register(&ardbeg_bluedroid_pm_device);
+}
+
 /*use board file for T12x*/
 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
 static struct i2c_board_info __initdata rt5645_board_info = {
@@ -126,6 +172,10 @@ static __initdata struct tegra_clk_init_table ardbeg_clk_init_table[] = {
        { "sbc4",       "pll_p",        25000000,       false},
        { "sbc5",       "pll_p",        25000000,       false},
        { "sbc6",       "pll_p",        25000000,       false},
+       { "uarta",      "pll_p",        408000000,      false},
+       { "uartb",      "pll_p",        408000000,      false},
+       { "uartc",      "pll_p",        408000000,      false},
+       { "uartd",      "pll_p",        408000000,      false},
        { NULL,         NULL,           0,              0},
 };
 
@@ -684,6 +734,7 @@ static void __init tegra_ardbeg_late_init(void)
        ardbeg_sensors_init();
        ardbeg_soctherm_init();
 #endif
+       ardbeg_setup_bluedroid_pm();
        tegra_register_fuse();
        tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
 }