Merge branch 'restart' into for-linus
Russell King [Thu, 5 Jan 2012 13:25:15 +0000 (13:25 +0000)]
Conflicts:
arch/arm/mach-exynos/cpu.c

The changes to arch/arm/mach-exynos/cpu.c were moved to
mach-exynos/common.c.

97 files changed:
1  2 
MAINTAINERS
arch/arm/Kconfig
arch/arm/include/asm/system.h
arch/arm/kernel/process.c
arch/arm/mach-cns3xxx/cns3420vb.c
arch/arm/mach-ep93xx/adssphere.c
arch/arm/mach-ep93xx/edb93xx.c
arch/arm/mach-ep93xx/gesbc9312.c
arch/arm/mach-ep93xx/micro9.c
arch/arm/mach-ep93xx/simone.c
arch/arm/mach-ep93xx/snappercl15.c
arch/arm/mach-ep93xx/ts72xx.c
arch/arm/mach-exynos/common.c
arch/arm/mach-exynos/mach-armlex4210.c
arch/arm/mach-exynos/mach-nuri.c
arch/arm/mach-exynos/mach-origen.c
arch/arm/mach-exynos/mach-smdk4x12.c
arch/arm/mach-exynos/mach-smdkv310.c
arch/arm/mach-exynos/mach-universal_c210.c
arch/arm/mach-highbank/highbank.c
arch/arm/mach-imx/mach-cpuimx35.c
arch/arm/mach-integrator/core.c
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-kirkwood/sheevaplug-setup.c
arch/arm/mach-netx/nxdb500.c
arch/arm/mach-netx/nxdkn.c
arch/arm/mach-netx/nxeb500hmi.c
arch/arm/mach-nomadik/board-nhk8815.c
arch/arm/mach-omap2/board-2430sdp.c
arch/arm/mach-omap2/board-3430sdp.c
arch/arm/mach-omap2/board-3630sdp.c
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-am3517crane.c
arch/arm/mach-omap2/board-am3517evm.c
arch/arm/mach-omap2/board-apollon.c
arch/arm/mach-omap2/board-cm-t35.c
arch/arm/mach-omap2/board-cm-t3517.c
arch/arm/mach-omap2/board-devkit8000.c
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/board-h4.c
arch/arm/mach-omap2/board-igep0020.c
arch/arm/mach-omap2/board-ldp.c
arch/arm/mach-omap2/board-n8x0.c
arch/arm/mach-omap2/board-omap3beagle.c
arch/arm/mach-omap2/board-omap3evm.c
arch/arm/mach-omap2/board-omap3logic.c
arch/arm/mach-omap2/board-omap3pandora.c
arch/arm/mach-omap2/board-omap3stalker.c
arch/arm/mach-omap2/board-omap3touchbook.c
arch/arm/mach-omap2/board-omap4panda.c
arch/arm/mach-omap2/board-overo.c
arch/arm/mach-omap2/board-rm680.c
arch/arm/mach-omap2/board-rx51.c
arch/arm/mach-omap2/board-zoom.c
arch/arm/mach-omap2/common.h
arch/arm/mach-orion5x/ts209-setup.c
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-s3c64xx/mach-anw6410.c
arch/arm/mach-s3c64xx/mach-crag6410.c
arch/arm/mach-s3c64xx/mach-hmt.c
arch/arm/mach-s3c64xx/mach-mini6410.c
arch/arm/mach-s3c64xx/mach-ncp.c
arch/arm/mach-s3c64xx/mach-real6410.c
arch/arm/mach-s3c64xx/mach-smartq5.c
arch/arm/mach-s3c64xx/mach-smartq7.c
arch/arm/mach-s3c64xx/mach-smdk6400.c
arch/arm/mach-s3c64xx/mach-smdk6410.c
arch/arm/mach-s5p64x0/mach-smdk6440.c
arch/arm/mach-s5p64x0/mach-smdk6450.c
arch/arm/mach-s5pc100/mach-smdkc100.c
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c
arch/arm/mach-s5pv210/mach-smdkc110.c
arch/arm/mach-s5pv210/mach-smdkv210.c
arch/arm/mach-s5pv210/mach-torbreck.c
arch/arm/mach-sa1100/nanoengine.c
arch/arm/mach-spear3xx/spear300_evb.c
arch/arm/mach-spear3xx/spear310_evb.c
arch/arm/mach-spear3xx/spear320_evb.c
arch/arm/mach-spear6xx/spear600_evb.c
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c
arch/arm/mach-u300/u300.c
arch/arm/mach-versatile/core.c
arch/arm/mach-versatile/versatile_ab.c
arch/arm/mach-versatile/versatile_dt.c
arch/arm/mach-versatile/versatile_pb.c
arch/arm/mach-vexpress/v2m.c
arch/arm/plat-iop/Makefile
arch/arm/plat-mxc/include/mach/common.h

diff --cc MAINTAINERS
Simple merge
Simple merge
Simple merge
@@@ -120,41 -114,11 +120,35 @@@ static void __soft_restart(void *addr
        /* Push out any further dirty data, and ensure cache is empty */
        flush_cache_all();
  
 -      cpu_reset(addr);
 +      /* Switch to the identity mapping. */
 +      phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
 +      phys_reset((unsigned long)addr);
 +
 +      /* Should never get here. */
 +      BUG();
 +}
 +
 +void soft_restart(unsigned long addr)
 +{
 +      u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
 +
 +      /* Disable interrupts first */
 +      local_irq_disable();
 +      local_fiq_disable();
 +
 +      /* Disable the L2 if we're the last man standing. */
 +      if (num_online_cpus() == 1)
 +              outer_disable();
 +
 +      /* Change to the new stack and continue with the reset. */
 +      call_with_stack(__soft_restart, (void *)addr, (void *)stack);
 +
 +      /* Should never get here. */
 +      BUG();
  }
  
- void arm_machine_restart(char mode, const char *cmd)
+ static void null_restart(char mode, const char *cmd)
  {
-       /* Disable interrupts first */
-       local_irq_disable();
-       local_fiq_disable();
-       /* Call the architecture specific reboot code. */
-       arch_reset(mode, cmd);
  }
  
  /*
@@@ -202,6 -201,6 +202,7 @@@ MACHINE_START(CNS3420VB, "Cavium Networ
        .map_io         = cns3420_map_io,
        .init_irq       = cns3xxx_init_irq,
        .timer          = &cns3xxx_timer,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = cns3420_init,
+       .restart        = cns3xxx_restart,
  MACHINE_END
@@@ -37,7 -36,7 +37,8 @@@ MACHINE_START(ADSSPHERE, "ADS Sphere bo
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = adssphere_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
@@@ -251,9 -250,9 +251,10 @@@ MACHINE_START(EDB9301, "Cirrus Logic ED
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -263,9 -262,9 +264,10 @@@ MACHINE_START(EDB9302, "Cirrus Logic ED
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -275,9 -274,9 +277,10 @@@ MACHINE_START(EDB9302A, "Cirrus Logic E
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -287,9 -286,9 +290,10 @@@ MACHINE_START(EDB9307, "Cirrus Logic ED
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -299,9 -298,9 +303,10 @@@ MACHINE_START(EDB9307A, "Cirrus Logic E
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -311,9 -310,9 +316,10 @@@ MACHINE_START(EDB9312, "Cirrus Logic ED
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -323,9 -322,9 +329,10 @@@ MACHINE_START(EDB9315, "Cirrus Logic ED
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -335,8 -334,8 +342,9 @@@ MACHINE_START(EDB9315A, "Cirrus Logic E
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
@@@ -37,7 -36,7 +37,8 @@@ MACHINE_START(GESBC9312, "Glomation GES
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = gesbc9312_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
@@@ -81,9 -80,9 +81,10 @@@ MACHINE_START(MICRO9, "Contec Micro9-Hi
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -93,9 -92,9 +94,10 @@@ MACHINE_START(MICRO9M, "Contec Micro9-M
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -105,9 -104,9 +107,10 @@@ MACHINE_START(MICRO9L, "Contec Micro9-L
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
  
@@@ -117,8 -116,8 +120,9 @@@ MACHINE_START(MICRO9S, "Contec Micro9-S
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
  #endif
@@@ -81,7 -80,7 +81,8 @@@ MACHINE_START(SIM_ONE, "Simplemachines 
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = simone_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
@@@ -178,7 -177,7 +178,8 @@@ MACHINE_START(SNAPPER_CL15, "Bluewater 
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = snappercl15_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
@@@ -248,7 -247,7 +248,8 @@@ MACHINE_START(TS72XX, "Technologic Syst
        .atag_offset    = 0x100,
        .map_io         = ts72xx_map_io,
        .init_irq       = ep93xx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = ts72xx_init_machine,
+       .restart        = ep93xx_restart,
  MACHINE_END
index 0000000,6f567a4..d2acb0f
mode 000000,100644..100644
--- /dev/null
@@@ -1,0 -1,718 +1,713 @@@
+ /*
+  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+  *            http://www.samsung.com
+  *
+  * Common Codes for EXYNOS
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
+  */
+ #include <linux/kernel.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+ #include <linux/io.h>
+ #include <linux/sysdev.h>
+ #include <linux/gpio.h>
+ #include <linux/sched.h>
+ #include <linux/serial_core.h>
+ #include <asm/proc-fns.h>
+ #include <asm/hardware/cache-l2x0.h>
+ #include <asm/hardware/gic.h>
+ #include <asm/mach/map.h>
+ #include <asm/mach/irq.h>
+ #include <mach/regs-irq.h>
+ #include <mach/regs-pmu.h>
+ #include <mach/regs-gpio.h>
+ #include <plat/cpu.h>
+ #include <plat/clock.h>
+ #include <plat/devs.h>
+ #include <plat/pm.h>
+ #include <plat/sdhci.h>
+ #include <plat/gpio-cfg.h>
+ #include <plat/adc-core.h>
+ #include <plat/fb-core.h>
+ #include <plat/fimc-core.h>
+ #include <plat/iic-core.h>
+ #include <plat/tv-core.h>
+ #include <plat/regs-serial.h>
+ #include "common.h"
+ unsigned int gic_bank_offset __read_mostly;
+ static const char name_exynos4210[] = "EXYNOS4210";
+ static const char name_exynos4212[] = "EXYNOS4212";
+ static const char name_exynos4412[] = "EXYNOS4412";
+ static struct cpu_table cpu_ids[] __initdata = {
+       {
+               .idcode         = EXYNOS4210_CPU_ID,
+               .idmask         = EXYNOS4_CPU_MASK,
+               .map_io         = exynos4_map_io,
+               .init_clocks    = exynos4_init_clocks,
+               .init_uarts     = exynos4_init_uarts,
+               .init           = exynos_init,
+               .name           = name_exynos4210,
+       }, {
+               .idcode         = EXYNOS4212_CPU_ID,
+               .idmask         = EXYNOS4_CPU_MASK,
+               .map_io         = exynos4_map_io,
+               .init_clocks    = exynos4_init_clocks,
+               .init_uarts     = exynos4_init_uarts,
+               .init           = exynos_init,
+               .name           = name_exynos4212,
+       }, {
+               .idcode         = EXYNOS4412_CPU_ID,
+               .idmask         = EXYNOS4_CPU_MASK,
+               .map_io         = exynos4_map_io,
+               .init_clocks    = exynos4_init_clocks,
+               .init_uarts     = exynos4_init_uarts,
+               .init           = exynos_init,
+               .name           = name_exynos4412,
+       },
+ };
+ /* Initial IO mappings */
+ static struct map_desc exynos_iodesc[] __initdata = {
+       {
+               .virtual        = (unsigned long)S5P_VA_CHIPID,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_CHIPID),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S3C_VA_SYS,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSCON),
+               .length         = SZ_64K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S3C_VA_TIMER,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_TIMER),
+               .length         = SZ_16K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_SROMC,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_PMU,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_PMU),
+               .length         = SZ_64K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_COMBINER),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_GIC_CPU,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
+               .length         = SZ_64K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_GIC_DIST,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
+               .length         = SZ_64K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S3C_VA_UART,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_UART),
+               .length         = SZ_512K,
+               .type           = MT_DEVICE,
+       },
+ };
+ static struct map_desc exynos4_iodesc[] __initdata = {
+       {
+               .virtual        = (unsigned long)S5P_VA_CMU,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
+               .length         = SZ_128K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_COREPERI),
+               .length         = SZ_8K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_L2CC,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_L2CC),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_GPIO1,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_GPIO2,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_GPIO3,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
+               .length         = SZ_256,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_DMC0,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       }, {
 -              .virtual        = (unsigned long)S5P_VA_SROMC,
 -              .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
 -              .length         = SZ_4K,
 -              .type           = MT_DEVICE,
 -      }, {
+               .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       },
+ };
+ static struct map_desc exynos4_iodesc0[] __initdata = {
+       {
+               .virtual        = (unsigned long)S5P_VA_SYSRAM,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       },
+ };
+ static struct map_desc exynos4_iodesc1[] __initdata = {
+       {
+               .virtual        = (unsigned long)S5P_VA_SYSRAM,
+               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       },
+ };
+ static void exynos_idle(void)
+ {
+       if (!need_resched())
+               cpu_do_idle();
+       local_irq_enable();
+ }
+ void exynos4_restart(char mode, const char *cmd)
+ {
+       __raw_writel(0x1, S5P_SWRESET);
+ }
+ /*
+  * exynos_map_io
+  *
+  * register the standard cpu IO areas
+  */
+ void __init exynos_init_io(struct map_desc *mach_desc, int size)
+ {
+       /* initialize the io descriptors we need for initialization */
+       iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+       if (mach_desc)
+               iotable_init(mach_desc, size);
+       /* detect cpu id and rev. */
+       s5p_init_cpu(S5P_VA_CHIPID);
+       s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+ }
+ void __init exynos4_map_io(void)
+ {
+       iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
+       if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
+               iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
+       else
+               iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
+       /* initialize device information early */
+       exynos4_default_sdhci0();
+       exynos4_default_sdhci1();
+       exynos4_default_sdhci2();
+       exynos4_default_sdhci3();
+       s3c_adc_setname("samsung-adc-v3");
+       s3c_fimc_setname(0, "exynos4-fimc");
+       s3c_fimc_setname(1, "exynos4-fimc");
+       s3c_fimc_setname(2, "exynos4-fimc");
+       s3c_fimc_setname(3, "exynos4-fimc");
+       /* The I2C bus controllers are directly compatible with s3c2440 */
+       s3c_i2c0_setname("s3c2440-i2c");
+       s3c_i2c1_setname("s3c2440-i2c");
+       s3c_i2c2_setname("s3c2440-i2c");
+       s5p_fb_setname(0, "exynos4-fb");
+       s5p_hdmi_setname("exynos4-hdmi");
+ }
+ void __init exynos4_init_clocks(int xtal)
+ {
+       printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+       s3c24xx_register_baseclocks(xtal);
+       s5p_register_clocks(xtal);
+       if (soc_is_exynos4210())
+               exynos4210_register_clocks();
+       else if (soc_is_exynos4212() || soc_is_exynos4412())
+               exynos4212_register_clocks();
+       exynos4_register_clocks();
+       exynos4_setup_clocks();
+ }
+ #define COMBINER_ENABLE_SET   0x0
+ #define COMBINER_ENABLE_CLEAR 0x4
+ #define COMBINER_INT_STATUS   0xC
+ static DEFINE_SPINLOCK(irq_controller_lock);
+ struct combiner_chip_data {
+       unsigned int irq_offset;
+       unsigned int irq_mask;
+       void __iomem *base;
+ };
+ static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
+ static inline void __iomem *combiner_base(struct irq_data *data)
+ {
+       struct combiner_chip_data *combiner_data =
+               irq_data_get_irq_chip_data(data);
+       return combiner_data->base;
+ }
+ static void combiner_mask_irq(struct irq_data *data)
+ {
+       u32 mask = 1 << (data->irq % 32);
+       __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
+ }
+ static void combiner_unmask_irq(struct irq_data *data)
+ {
+       u32 mask = 1 << (data->irq % 32);
+       __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
+ }
+ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
+ {
+       struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
+       struct irq_chip *chip = irq_get_chip(irq);
+       unsigned int cascade_irq, combiner_irq;
+       unsigned long status;
+       chained_irq_enter(chip, desc);
+       spin_lock(&irq_controller_lock);
+       status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
+       spin_unlock(&irq_controller_lock);
+       status &= chip_data->irq_mask;
+       if (status == 0)
+               goto out;
+       combiner_irq = __ffs(status);
+       cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
+       if (unlikely(cascade_irq >= NR_IRQS))
+               do_bad_IRQ(cascade_irq, desc);
+       else
+               generic_handle_irq(cascade_irq);
+  out:
+       chained_irq_exit(chip, desc);
+ }
+ static struct irq_chip combiner_chip = {
+       .name           = "COMBINER",
+       .irq_mask       = combiner_mask_irq,
+       .irq_unmask     = combiner_unmask_irq,
+ };
+ static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
+ {
+       if (combiner_nr >= MAX_COMBINER_NR)
+               BUG();
+       if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
+               BUG();
+       irq_set_chained_handler(irq, combiner_handle_cascade_irq);
+ }
+ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
+                         unsigned int irq_start)
+ {
+       unsigned int i;
+       if (combiner_nr >= MAX_COMBINER_NR)
+               BUG();
+       combiner_data[combiner_nr].base = base;
+       combiner_data[combiner_nr].irq_offset = irq_start;
+       combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
+       /* Disable all interrupts */
+       __raw_writel(combiner_data[combiner_nr].irq_mask,
+                    base + COMBINER_ENABLE_CLEAR);
+       /* Setup the Linux IRQ subsystem */
+       for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
+                               + MAX_IRQ_IN_COMBINER; i++) {
+               irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
+               irq_set_chip_data(i, &combiner_data[combiner_nr]);
+               set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+       }
+ }
+ static void exynos4_gic_irq_fix_base(struct irq_data *d)
+ {
+       struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
+       gic_data->cpu_base = S5P_VA_GIC_CPU +
+                           (gic_bank_offset * smp_processor_id());
+       gic_data->dist_base = S5P_VA_GIC_DIST +
+                           (gic_bank_offset * smp_processor_id());
+ }
+ void __init exynos4_init_irq(void)
+ {
+       int irq;
+       gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
+       gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+       gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
+       gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
+       gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
+       for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+               combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
+                               COMBINER_IRQ(irq, 0));
+               combiner_cascade_irq(irq, IRQ_SPI(irq));
+       }
+       /*
+        * The parameters of s5p_init_irq() are for VIC init.
+        * Theses parameters should be NULL and 0 because EXYNOS4
+        * uses GIC instead of VIC.
+        */
+       s5p_init_irq(NULL, 0);
+ }
+ struct sysdev_class exynos4_sysclass = {
+       .name   = "exynos4-core",
+ };
+ static struct sys_device exynos4_sysdev = {
+       .cls    = &exynos4_sysclass,
+ };
+ static int __init exynos4_core_init(void)
+ {
+       return sysdev_class_register(&exynos4_sysclass);
+ }
+ core_initcall(exynos4_core_init);
+ #ifdef CONFIG_CACHE_L2X0
+ static int __init exynos4_l2x0_cache_init(void)
+ {
+       /* TAG, Data Latency Control: 2cycle */
+       __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
+       if (soc_is_exynos4210())
+               __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+       else if (soc_is_exynos4212() || soc_is_exynos4412())
+               __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+       /* L2X0 Prefetch Control */
+       __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
+       /* L2X0 Power Control */
+       __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
+                    S5P_VA_L2CC + L2X0_POWER_CTRL);
+       l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
+       return 0;
+ }
+ early_initcall(exynos4_l2x0_cache_init);
+ #endif
+ int __init exynos_init(void)
+ {
+       printk(KERN_INFO "EXYNOS: Initializing architecture\n");
+       /* set idle function */
+       pm_idle = exynos_idle;
+       return sysdev_register(&exynos4_sysdev);
+ }
+ static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
+       [0] = {
+               .name           = "uclk1",
+               .divisor        = 1,
+               .min_baud       = 0,
+               .max_baud       = 0,
+       },
+ };
+ /* uart registration process */
+ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+ {
+       struct s3c2410_uartcfg *tcfg = cfg;
+       u32 ucnt;
+       for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+               if (!tcfg->clocks) {
+                       tcfg->has_fracval = 1;
+                       tcfg->clocks = exynos4_serial_clocks;
+                       tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
+               }
+               tcfg->flags |= NO_NEED_CHECK_CLKSRC;
+       }
+       s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+ }
+ static DEFINE_SPINLOCK(eint_lock);
+ static unsigned int eint0_15_data[16];
+ static unsigned int exynos4_get_irq_nr(unsigned int number)
+ {
+       u32 ret = 0;
+       switch (number) {
+       case 0 ... 3:
+               ret = (number + IRQ_EINT0);
+               break;
+       case 4 ... 7:
+               ret = (number + (IRQ_EINT4 - 4));
+               break;
+       case 8 ... 15:
+               ret = (number + (IRQ_EINT8 - 8));
+               break;
+       default:
+               printk(KERN_ERR "number available : %d\n", number);
+       }
+       return ret;
+ }
+ static inline void exynos4_irq_eint_mask(struct irq_data *data)
+ {
+       u32 mask;
+       spin_lock(&eint_lock);
+       mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+       mask |= eint_irq_to_bit(data->irq);
+       __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+       spin_unlock(&eint_lock);
+ }
+ static void exynos4_irq_eint_unmask(struct irq_data *data)
+ {
+       u32 mask;
+       spin_lock(&eint_lock);
+       mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+       mask &= ~(eint_irq_to_bit(data->irq));
+       __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+       spin_unlock(&eint_lock);
+ }
+ static inline void exynos4_irq_eint_ack(struct irq_data *data)
+ {
+       __raw_writel(eint_irq_to_bit(data->irq),
+                    S5P_EINT_PEND(EINT_REG_NR(data->irq)));
+ }
+ static void exynos4_irq_eint_maskack(struct irq_data *data)
+ {
+       exynos4_irq_eint_mask(data);
+       exynos4_irq_eint_ack(data);
+ }
+ static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
+ {
+       int offs = EINT_OFFSET(data->irq);
+       int shift;
+       u32 ctrl, mask;
+       u32 newvalue = 0;
+       switch (type) {
+       case IRQ_TYPE_EDGE_RISING:
+               newvalue = S5P_IRQ_TYPE_EDGE_RISING;
+               break;
+       case IRQ_TYPE_EDGE_FALLING:
+               newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
+               break;
+       case IRQ_TYPE_EDGE_BOTH:
+               newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
+               break;
+       case IRQ_TYPE_LEVEL_LOW:
+               newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
+               break;
+       case IRQ_TYPE_LEVEL_HIGH:
+               newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
+               break;
+       default:
+               printk(KERN_ERR "No such irq type %d", type);
+               return -EINVAL;
+       }
+       shift = (offs & 0x7) * 4;
+       mask = 0x7 << shift;
+       spin_lock(&eint_lock);
+       ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+       ctrl &= ~mask;
+       ctrl |= newvalue << shift;
+       __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+       spin_unlock(&eint_lock);
+       switch (offs) {
+       case 0 ... 7:
+               s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
+               break;
+       case 8 ... 15:
+               s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
+               break;
+       case 16 ... 23:
+               s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
+               break;
+       case 24 ... 31:
+               s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
+               break;
+       default:
+               printk(KERN_ERR "No such irq number %d", offs);
+       }
+       return 0;
+ }
+ static struct irq_chip exynos4_irq_eint = {
+       .name           = "exynos4-eint",
+       .irq_mask       = exynos4_irq_eint_mask,
+       .irq_unmask     = exynos4_irq_eint_unmask,
+       .irq_mask_ack   = exynos4_irq_eint_maskack,
+       .irq_ack        = exynos4_irq_eint_ack,
+       .irq_set_type   = exynos4_irq_eint_set_type,
+ #ifdef CONFIG_PM
+       .irq_set_wake   = s3c_irqext_wake,
+ #endif
+ };
+ /*
+  * exynos4_irq_demux_eint
+  *
+  * This function demuxes the IRQ from from EINTs 16 to 31.
+  * It is designed to be inlined into the specific handler
+  * s5p_irq_demux_eintX_Y.
+  *
+  * Each EINT pend/mask registers handle eight of them.
+  */
+ static inline void exynos4_irq_demux_eint(unsigned int start)
+ {
+       unsigned int irq;
+       u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
+       u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
+       status &= ~mask;
+       status &= 0xff;
+       while (status) {
+               irq = fls(status) - 1;
+               generic_handle_irq(irq + start);
+               status &= ~(1 << irq);
+       }
+ }
+ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
+ {
+       struct irq_chip *chip = irq_get_chip(irq);
+       chained_irq_enter(chip, desc);
+       exynos4_irq_demux_eint(IRQ_EINT(16));
+       exynos4_irq_demux_eint(IRQ_EINT(24));
+       chained_irq_exit(chip, desc);
+ }
+ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
+ {
+       u32 *irq_data = irq_get_handler_data(irq);
+       struct irq_chip *chip = irq_get_chip(irq);
+       chained_irq_enter(chip, desc);
+       chip->irq_mask(&desc->irq_data);
+       if (chip->irq_ack)
+               chip->irq_ack(&desc->irq_data);
+       generic_handle_irq(*irq_data);
+       chip->irq_unmask(&desc->irq_data);
+       chained_irq_exit(chip, desc);
+ }
+ int __init exynos4_init_irq_eint(void)
+ {
+       int irq;
+       for (irq = 0 ; irq <= 31 ; irq++) {
+               irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
+                                        handle_level_irq);
+               set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
+       }
+       irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+       for (irq = 0 ; irq <= 15 ; irq++) {
+               eint0_15_data[irq] = IRQ_EINT(irq);
+               irq_set_handler_data(exynos4_get_irq_nr(irq),
+                                    &eint0_15_data[irq]);
+               irq_set_chained_handler(exynos4_get_irq_nr(irq),
+                                       exynos4_irq_eint0_15);
+       }
+       return 0;
+ }
+ arch_initcall(exynos4_init_irq_eint);
@@@ -211,7 -211,7 +212,8 @@@ MACHINE_START(ARMLEX4210, "ARMLEX4210"
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = armlex4210_map_io,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = armlex4210_machine_init,
        .timer          = &exynos4_timer,
+       .restart        = exynos4_restart,
  MACHINE_END
Simple merge
Simple merge
@@@ -288,9 -288,9 +289,10 @@@ MACHINE_START(SMDK4212, "SMDK4212"
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
+       .restart        = exynos4_restart,
  MACHINE_END
  
  MACHINE_START(SMDK4412, "SMDK4412")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
+       .restart        = exynos4_restart,
  MACHINE_END
@@@ -387,7 -387,7 +389,8 @@@ MACHINE_START(SMDKC210, "SMDKC210"
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdkv310_map_io,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
+       .restart        = exynos4_restart,
  MACHINE_END
@@@ -144,7 -144,7 +144,8 @@@ DT_MACHINE_START(HIGHBANK, "Highbank"
        .map_io         = highbank_map_io,
        .init_irq       = highbank_init_irq,
        .timer          = &highbank_timer,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = highbank_init,
        .dt_compat      = highbank_match,
+       .restart        = highbank_restart,
  MACHINE_END
Simple merge
Simple merge
Simple merge
@@@ -204,7 -203,7 +204,8 @@@ MACHINE_START(NXDB500, "Hilscher nxdb50
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxdb500_init,
+       .restart        = netx_restart,
  MACHINE_END
@@@ -97,7 -96,7 +97,8 @@@ MACHINE_START(NXDKN, "Hilscher nxdkn"
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxdkn_init,
+       .restart        = netx_restart,
  MACHINE_END
@@@ -181,7 -180,7 +181,8 @@@ MACHINE_START(NXEB500HMI, "Hilscher nxe
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxeb500hmi_init,
+       .restart        = netx_restart,
  MACHINE_END
@@@ -281,7 -282,7 +283,8 @@@ MACHINE_START(NOMADIK, "NHK8815"
        .atag_offset    = 0x100,
        .map_io         = cpu8815_map_io,
        .init_irq       = cpu8815_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &nomadik_timer,
        .init_machine   = nhk8815_platform_init,
+       .restart        = cpu8815_restart,
  MACHINE_END
@@@ -301,7 -301,7 +301,8 @@@ MACHINE_START(OMAP_2430SDP, "OMAP2430 s
        .map_io         = omap243x_map_io,
        .init_early     = omap2430_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_2430sdp_init,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -728,7 -728,7 +728,8 @@@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_3430sdp_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -215,7 -215,7 +215,8 @@@ MACHINE_START(OMAP_3630SDP, "OMAP 3630S
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_sdp_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -984,7 -983,7 +984,8 @@@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4
        .map_io         = omap4_map_io,
        .init_early     = omap4430_init_early,
        .init_irq       = gic_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = omap_4430sdp_init,
        .timer          = &omap4_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -98,7 -98,7 +98,8 @@@ MACHINE_START(CRANEBOARD, "AM3517/05 CR
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = am3517_crane_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -491,7 -491,7 +491,8 @@@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = am3517_evm_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -354,7 -354,7 +354,8 @@@ MACHINE_START(OMAP_APOLLON, "OMAP24xx A
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_apollon_init,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -634,9 -634,9 +634,10 @@@ MACHINE_START(CM_T35, "Compulab CM-T35"
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t35_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(CM_T3730, "Compulab CM-T3730")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t3730_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -299,7 -299,7 +299,8 @@@ MACHINE_START(CM_T3517, "Compulab CM-T3
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t3517_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -660,7 -660,7 +660,8 @@@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = devkit8000_init,
        .timer          = &omap3_secure_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
Simple merge
@@@ -396,7 -396,7 +396,8 @@@ MACHINE_START(OMAP_H4, "OMAP2420 H4 boa
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_h4_init,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -672,9 -672,9 +672,10 @@@ MACHINE_START(IGEP0020, "IGEP v2 board"
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = igep_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(IGEP0030, "IGEP OMAP3 module")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = igep_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -434,7 -434,7 +434,8 @@@ MACHINE_START(OMAP_LDP, "OMAP LDP board
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_ldp_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -689,9 -689,9 +689,10 @@@ MACHINE_START(NOKIA_N800, "Nokia N800"
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(NOKIA_N810, "Nokia N810")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
 +      .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -559,7 -559,7 +559,8 @@@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beag
        .map_io         = omap3_map_io,
        .init_early     = omap3_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_beagle_init,
        .timer          = &omap3_secure_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -681,7 -681,7 +681,8 @@@ MACHINE_START(OMAP3EVM, "OMAP3 EVM"
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_evm_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -208,9 -208,9 +208,10 @@@ MACHINE_START(OMAP3_TORPEDO, "Logic OMA
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3logic_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3logic_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -606,7 -606,7 +606,8 @@@ MACHINE_START(OMAP3_PANDORA, "Pandora H
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3pandora_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -454,7 -454,7 +454,8 @@@ MACHINE_START(SBC3530, "OMAP3 STALKER"
        .map_io                 = omap3_map_io,
        .init_early             = omap35xx_init_early,
        .init_irq               = omap3_init_irq,
 +      .handle_irq             = omap3_intc_handle_irq,
        .init_machine           = omap3_stalker_init,
        .timer                  = &omap3_secure_timer,
+       .restart                = omap_prcm_restart,
  MACHINE_END
@@@ -381,7 -381,7 +381,8 @@@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbo
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_touchbook_init,
        .timer          = &omap3_secure_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -577,7 -576,7 +577,8 @@@ MACHINE_START(OMAP4_PANDA, "OMAP4 Pand
        .map_io         = omap4_map_io,
        .init_early     = omap4430_init_early,
        .init_irq       = gic_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = omap4_panda_init,
        .timer          = &omap4_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -562,7 -562,7 +562,8 @@@ MACHINE_START(OVERO, "Gumstix Overo"
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = overo_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -149,7 -149,7 +149,8 @@@ MACHINE_START(NOKIA_RM680, "Nokia RM-68
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = rm680_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -127,7 -127,7 +127,8 @@@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = rx51_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
@@@ -135,9 -135,9 +135,10 @@@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 b
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_zoom_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
  
  MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
 +      .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_zoom_init,
        .timer          = &omap3_timer,
+       .restart        = omap_prcm_restart,
  MACHINE_END
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@@@ -68,7 -67,7 +68,8 @@@ MACHINE_START(SPEAR300, "ST-SPEAR300-EV
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
 +      .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear300_evb_init,
+       .restart        =       spear_restart,
  MACHINE_END
@@@ -74,7 -73,7 +74,8 @@@ MACHINE_START(SPEAR310, "ST-SPEAR310-EV
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
 +      .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear310_evb_init,
+       .restart        =       spear_restart,
  MACHINE_END
@@@ -72,7 -71,7 +72,8 @@@ MACHINE_START(SPEAR320, "ST-SPEAR320-EV
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
 +      .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear320_evb_init,
+       .restart        =       spear_restart,
  MACHINE_END
@@@ -47,7 -46,7 +47,8 @@@ MACHINE_START(SPEAR600, "ST-SPEAR600-EV
        .atag_offset    =       0x100,
        .map_io         =       spear6xx_map_io,
        .init_irq       =       spear6xx_init_irq,
 +      .handle_irq     =       vic_handle_irq,
        .timer          =       &spear6xx_timer,
        .init_machine   =       spear600_evb_init,
+       .restart        =       spear_restart,
  MACHINE_END
@@@ -131,8 -130,8 +131,9 @@@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegr
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
+       .restart        = tegra_assert_system_reset,
        .dt_compat      = tegra_dt_board_compat,
  MACHINE_END
@@@ -188,7 -187,7 +188,8 @@@ MACHINE_START(HARMONY, "harmony"
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_harmony_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
@@@ -191,7 -190,7 +191,8 @@@ MACHINE_START(PAZ00, "Toshiba AC100 / D
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_paz00_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
@@@ -285,9 -284,9 +285,10 @@@ MACHINE_START(SEABOARD, "seaboard"
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_seaboard_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
  
  MACHINE_START(KAEN, "kaen")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_kaen_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
  
  MACHINE_START(WARIO, "wario")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_wario_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
@@@ -177,7 -176,7 +177,8 @@@ MACHINE_START(TRIMSLICE, "trimslice"
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
 +      .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_trimslice_init,
+       .restart        = tegra_assert_system_reset,
  MACHINE_END
@@@ -50,7 -49,7 +50,8 @@@ MACHINE_START(U300, MACH_U300_STRING
        .atag_offset    = BOOT_PARAMS_OFFSET,
        .map_io         = u300_map_io,
        .init_irq       = u300_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &u300_timer,
        .init_machine   = u300_init_machine,
+       .restart        = u300_restart,
  MACHINE_END
Simple merge
@@@ -40,7 -39,7 +40,8 @@@ MACHINE_START(VERSATILE_AB, "ARM-Versat
        .map_io         = versatile_map_io,
        .init_early     = versatile_init_early,
        .init_irq       = versatile_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &versatile_timer,
        .init_machine   = versatile_init,
+       .restart        = versatile_restart,
  MACHINE_END
@@@ -108,7 -107,7 +108,8 @@@ MACHINE_START(VERSATILE_PB, "ARM-Versat
        .map_io         = versatile_map_io,
        .init_early     = versatile_init_early,
        .init_irq       = versatile_init_irq,
 +      .handle_irq     = vic_handle_irq,
        .timer          = &versatile_timer,
        .init_machine   = versatile_pb_init,
+       .restart        = versatile_restart,
  MACHINE_END
@@@ -449,6 -447,6 +448,7 @@@ MACHINE_START(VEXPRESS, "ARM-Versatile 
        .init_early     = v2m_init_early,
        .init_irq       = v2m_init_irq,
        .timer          = &v2m_timer,
 +      .handle_irq     = gic_handle_irq,
        .init_machine   = v2m_init,
+       .restart        = v2m_restart,
  MACHINE_END
Simple merge