ARM: xhci: tegra: dt support for xhci
Krishna Yarlagadda [Mon, 21 Oct 2013 12:33:31 +0000 (17:33 +0530)]
Modify board files to support dt entries for xusb

Bug 1357627

Change-Id: I23c3cbbb3390de198ffcbf4c89c85383a2139cf8
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/302832
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-ardbeg.c
arch/arm/mach-tegra/board-dalmore.c
arch/arm/mach-tegra/board-loki.c
arch/arm/mach-tegra/board-pluto.c
arch/arm/mach-tegra/include/mach/xusb.h
arch/arm/mach-tegra/xusb.c [deleted file]

index bc36dbf..76ac89e 100644 (file)
@@ -83,7 +83,6 @@ AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec)
 
 obj-y                                   += tegra_fuse.o
 obj-y                                   += kfuse.o
-obj-y                                   += xusb.o
 
 obj-y                                   += powergate.o
 obj-y                                   += powergate-ops-txx.o
index 9e544e5..a18a589 100644 (file)
@@ -682,103 +682,63 @@ static void ardbeg_usb_init(void)
        }
 }
 
-static struct tegra_xusb_board_data xusb_bdata = {
+static struct tegra_xusb_platform_data xusb_pdata = {
        .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_SS_P1 |
                        TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_USB2_P2,
-       .supply = {
-               .utmi_vbuses = {
-                       "usb_vbus0", "usb_vbus1", "usb_vbus2"
-               },
-               .s3p3v = "hvdd_usb",
-               .s1p8v = "avdd_pll_utmip",
-               .vddio_hsic = "vddio_hsic",
-               .s1p05v = "avddio_usb",
-       },
-
-       .hsic[0] = {
-               .rx_strobe_trim = 0x1,
-               .rx_data_trim = 0x1,
-               .tx_rtune_n = 0x8,
-               .tx_rtune_p = 0xa,
-               .tx_slew_n = 0,
-               .tx_slew_p = 0,
-               .auto_term_en = true,
-               .strb_trim_val = 0x22,
-               .pretend_connect = false,
-       },
-       .uses_external_pmic = false,
 };
 
 static void ardbeg_xusb_init(void)
 {
        int usb_port_owner_info = tegra_get_usb_port_owner_info();
 
-       xusb_bdata.lane_owner = (u8) tegra_get_lane_owner_info();
+       xusb_pdata.lane_owner = (u8) tegra_get_lane_owner_info();
 
        if (board_info.board_id == BOARD_PM359 ||
                        board_info.board_id == BOARD_PM358 ||
                        board_info.board_id == BOARD_PM363) {
                /* Laguna */
                pr_info("Laguna ERS. 0x%x\n", board_info.board_id);
-               xusb_bdata.gpio_controls_muxed_ss_lanes = true;
-               /* D[0:15] = gpio number and D[16:31] = output value */
-               xusb_bdata.gpio_ss1_sata = PMU_TCA6416_GPIO(9) | (0 << 16);
-               xusb_bdata.ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
-                       (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 4);
 
                if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                       xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
                                TEGRA_XUSB_SS_P0);
 
                if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                       xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
                                TEGRA_XUSB_SS_P1 | TEGRA_XUSB_USB2_P2);
 
                /* FIXME Add for UTMIP2 when have odmdata assigend */
        } else {
                /* Ardbeg */
-               xusb_bdata.gpio_controls_muxed_ss_lanes = false;
-
                if (board_info.board_id == BOARD_E1781) {
                        pr_info("Shield ERS-S. 0x%x\n", board_info.board_id);
                        /* Shield ERS-S */
-                       xusb_bdata.ss_portmap =
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 0) |
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
-
                        if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
 
                        if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(
+                               xusb_pdata.portmap &= ~(
                                        TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0 |
                                        TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
                } else {
                        pr_info("Shield ERS 0x%x\n", board_info.board_id);
                        /* Shield ERS */
-                       xusb_bdata.ss_portmap =
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
-
                        if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
                                        TEGRA_XUSB_SS_P0);
 
                        if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
                                        TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
                }
                /* FIXME Add for UTMIP2 when have odmdata assigend */
        }
 
        if (usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)
-               xusb_bdata.portmap |= TEGRA_XUSB_HSIC_P0;
+               xusb_pdata.portmap |= TEGRA_XUSB_HSIC_P0;
 
        if (usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)
-               xusb_bdata.portmap |= TEGRA_XUSB_HSIC_P1;
-
-       if (xusb_bdata.portmap)
-               tegra_xusb_init(&xusb_bdata);
+               xusb_pdata.portmap |= TEGRA_XUSB_HSIC_P1;
 }
 
 static int baseband_init(void)
@@ -860,7 +820,7 @@ static void ardbeg_modem_init(void)
                                tegra_set_wake_source(42, INT_USB2);
                        platform_device_register(&tegra_ehci2_device);
                } else
-                       xusb_bdata.hsic[0].pretend_connect = true;
+                       xusb_pdata.pretend_connect_0 = true;
                break;
        default:
                return;
@@ -943,6 +903,8 @@ static struct of_dev_auxdata ardbeg_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000d100, "tegra12-i2c.5",
                                NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-xhci", 0x70090000, "tegra-xhci",
+                               &xusb_pdata),
        {}
 };
 #endif
index cc289fe..f0aeeb9 100644 (file)
@@ -507,21 +507,9 @@ static void dalmore_usb_init(void)
        }
 }
 
-static struct tegra_xusb_board_data xusb_bdata = {
+static struct tegra_xusb_platform_data xusb_pdata = {
        .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P1 |
                        TEGRA_XUSB_USB2_P0,
-       /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
-       .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 0),
-       .uses_external_pmic = false,
-       .supply = {
-               .utmi_vbuses = {
-                       "usb_vbus", "usb_vbus1", NULL
-               },
-               .s3p3v = "hvdd_usb",
-               .s1p8v = "avdd_usb_pll",
-               .vddio_hsic = "vddio_hsic",
-               .s1p05v = "avddio_usb",
-       },
 };
 
 static void dalmore_xusb_init(void)
@@ -529,11 +517,9 @@ static void dalmore_xusb_init(void)
        int usb_port_owner_info = tegra_get_usb_port_owner_info();
 
        if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-               xusb_bdata.portmap &= ~TEGRA_XUSB_USB2_P0;
+               xusb_pdata.portmap &= ~TEGRA_XUSB_USB2_P0;
        if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0);
-       if (xusb_bdata.portmap)
-               tegra_xusb_init(&xusb_bdata);
+               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0);
 }
 
 static struct gpio modem_gpios[] = { /* Nemo modem */
@@ -753,6 +739,8 @@ struct of_dev_auxdata dalmore_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
                                NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-xhci", 0x70090000, "tegra-xhci",
+                               &xusb_pdata),
        {}
 };
 #endif
index f9521f1..01a31e9 100644 (file)
@@ -499,83 +499,56 @@ static void loki_usb_init(void)
        }
 }
 
-static struct tegra_xusb_board_data xusb_bdata = {
+static struct tegra_xusb_platform_data xusb_pdata = {
        .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_SS_P1 |
                        TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_USB2_P2,
-       .supply = {
-               .utmi_vbuses = {
-                       NULL, NULL, NULL
-               },
-               .s3p3v = "hvdd_usb",
-               .s1p8v = "avdd_pll_utmip",
-               .vddio_hsic = "vddio_hsic",
-               .s1p05v = "avddio_usb",
-       },
-       .uses_external_pmic = false,
 };
 
 static void loki_xusb_init(void)
 {
        int usb_port_owner_info = tegra_get_usb_port_owner_info();
 
-       xusb_bdata.lane_owner = (u8) tegra_get_lane_owner_info();
+       xusb_pdata.lane_owner = (u8) tegra_get_lane_owner_info();
 
        if (board_info.board_id == BOARD_PM359 ||
                        board_info.board_id == BOARD_PM358 ||
                        board_info.board_id == BOARD_PM363) {
                /* Laguna */
-               xusb_bdata.gpio_controls_muxed_ss_lanes = true;
-               /* D[0:15] = gpio number and D[16:31] = output value*/
-               xusb_bdata.gpio_ss1_sata = PMU_TCA6416_GPIO(11) | (0 << 16);
-               xusb_bdata.ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
-                       (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 4);
-
                if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                       xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
                                TEGRA_XUSB_SS_P0);
 
                if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                       xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
                                TEGRA_XUSB_SS_P1);
 
                /* FIXME Add for UTMIP2 when have odmdata assigend */
        } else {
                /* Loki */
-               xusb_bdata.gpio_controls_muxed_ss_lanes = false;
-
                if (board_info.board_id == BOARD_E1781) {
                        pr_info("Shield ERS-S. 0x%x\n", board_info.board_id);
                        /* Shield ERS-S */
-                       xusb_bdata.ss_portmap =
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 0) |
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
-
                        if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
 
                        if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(
+                               xusb_pdata.portmap &= ~(
                                        TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0 |
                                        TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
                } else {
                        pr_info("Shield ERS 0x%x\n", board_info.board_id);
                        /* Shield ERS */
-                       xusb_bdata.ss_portmap =
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
-                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
 
                        if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
                                        TEGRA_XUSB_SS_P0);
 
                        if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
-                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
                                        TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
                }
                /* FIXME Add for UTMIP2 when have odmdata assigend */
        }
-       if (xusb_bdata.portmap)
-               tegra_xusb_init(&xusb_bdata);
 }
 
 static int baseband_init(void)
@@ -790,6 +763,8 @@ struct of_dev_auxdata loki_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000d100, "tegra12-i2c.5",
                                NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-xhci", 0x70090000, "tegra-xhci",
+                               &xusb_pdata),
        {}
 };
 #endif
index 7e525a5..fe93603 100644 (file)
@@ -1107,28 +1107,17 @@ static void pluto_modem_init(void)
        }
 }
 
-static struct tegra_xusb_board_data xusb_bdata = {
+static struct tegra_xusb_platform_data xusb_pdata = {
        .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0,
-       /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
-       .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0),
-       .uses_external_pmic = true,
-       .supply = {
-               .utmi_vbuses = {
-                       NULL, "usb_vbus", NULL
-               },
-               .s3p3v = "hvdd_usb",
-               .s1p8v = "avdd_usb_pll",
-               .vddio_hsic = "vddio_hsic",
-               .s1p05v = "avddio_usb",
-       },
 };
 
 static void pluto_xusb_init(void)
 {
        int usb_port_owner_info = tegra_get_usb_port_owner_info();
 
-       if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)
-               tegra_xusb_init(&xusb_bdata);
+       if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
+               xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                               TEGRA_XUSB_SS_P0);
 }
 #else
 static void pluto_usb_init(void) { }
@@ -1309,6 +1298,8 @@ struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
                                NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-xhci", 0x70090000, "tegra-xhci",
+                               &xusb_pdata),
        {}
 };
 #endif
index a87a9c5..401e985 100644 (file)
 
 struct tegra_xusb_regulator_name {
        const char *utmi_vbuses[XUSB_UTMI_COUNT];
-       u8 *s3p3v;
-       u8 *s1p8v;
+       const char *s3p3v;
+       const char *s1p8v;
        const char *vddio_hsic;
-       u8 *s1p05v;
+       const char *s1p05v;
 };
 
 struct tegra_xusb_hsic_config {
@@ -88,13 +88,21 @@ struct tegra_xusb_board_data {
 };
 
 struct tegra_xusb_platform_data {
-       struct tegra_xusb_board_data *bdata;
+       u32 portmap;
+       u8 lane_owner;
+       bool pretend_connect_0;
+};
+
+struct tegra_xusb_chip_calib {
        u32 hs_curr_level_pad0;
        u32 hs_curr_level_pad1;
        u32 hs_curr_level_pad2;
        u32 hs_iref_cap;
        u32 hs_term_range_adj;
        u32 hs_squelch_level;
+};
+struct tegra_xusb_soc_config {
+       struct tegra_xusb_board_data *bdata;
        u32 rx_wander;
        u32 rx_eq;
        u32 cdr_cntl;
@@ -117,5 +125,4 @@ struct tegra_xusb_platform_data {
 
 #define TEGRA_XUSB_USE_HS_SRC_CLOCK2 BIT(0)
 
-extern void tegra_xusb_init(struct tegra_xusb_board_data *bdata);
 #endif /* _XUSB_H */
diff --git a/arch/arm/mach-tegra/xusb.c b/arch/arm/mach-tegra/xusb.c
deleted file mode 100644 (file)
index 8a8ed9c..0000000
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * arch/arm/mach-tegra/xusb.c
- *
- * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
- *
- * Author:
- *     Ajay Gupta <ajayg@nvidia.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#include <linux/types.h>
-#include <mach/xusb.h>
-#include "devices.h"
-#include <linux/tegra-fuse.h>
-
-#ifdef CONFIG_TEGRA_XUSB_PLATFORM
-static struct tegra_xusb_platform_data tegra_xusb_plat_data = {};
-
-static void tegra_xusb_read_usb_calib(void)
-{
-       u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
-
-       pr_info("tegra_xusb_read_usb_calib: usb_calib0 = 0x%08x\n", usb_calib0);
-       /*
-        * read from usb_calib0 and pass to driver
-        * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
-        * set TERM_RANGE_ADJ           = usb_calib0[10:7]
-        * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
-        * set HS_IREF_CAP              = usb_calib0[14:13]
-        * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
-        */
-
-       tegra_xusb_plat_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
-       tegra_xusb_plat_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
-       tegra_xusb_plat_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
-       tegra_xusb_plat_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
-       tegra_xusb_plat_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
-       tegra_xusb_plat_data.hs_curr_level_pad2 = (usb_calib0 >> 15) & 0x3f;
-}
-
-void tegra_xusb_init(struct tegra_xusb_board_data *bdata)
-{
-#ifdef CONFIG_ARCH_TEGRA_11x_SOC
-       tegra_xusb_plat_data.pmc_portmap = (TEGRA_XUSB_UTMIP_PMC_PORT0 << 0) |
-                       (TEGRA_XUSB_UTMIP_PMC_PORT2 << 4);
-       tegra_xusb_plat_data.quirks |= TEGRA_XUSB_USE_HS_SRC_CLOCK2;
-       tegra_xusb_plat_data.rx_wander = (0x3 << 4);
-       tegra_xusb_plat_data.rx_eq = (0x3928 << 8);
-       tegra_xusb_plat_data.cdr_cntl = (0x26 << 24);
-       tegra_xusb_plat_data.dfe_cntl = 0x002008EE;
-       tegra_xusb_plat_data.hs_slew = (0xE << 6);
-       tegra_xusb_plat_data.ls_rslew_pad0 = (0x3 << 14);
-       tegra_xusb_plat_data.ls_rslew_pad1 = (0x0 << 14);
-       tegra_xusb_plat_data.hs_disc_lvl = (0x5 << 2);
-       tegra_xusb_plat_data.spare_in = 0x0;
-#elif defined(CONFIG_ARCH_TEGRA_12x_SOC)
-       tegra_xusb_plat_data.pmc_portmap = (TEGRA_XUSB_UTMIP_PMC_PORT0 << 0) |
-                       (TEGRA_XUSB_UTMIP_PMC_PORT1 << 4) |
-                       (TEGRA_XUSB_UTMIP_PMC_PORT2 << 8);
-       tegra_xusb_plat_data.rx_wander = (0xF << 4);
-       tegra_xusb_plat_data.rx_eq = (0xF070 << 8);
-       tegra_xusb_plat_data.cdr_cntl = (0x26 << 24);
-       tegra_xusb_plat_data.dfe_cntl = 0x002008EE;
-       tegra_xusb_plat_data.hs_slew = (0xE << 6);
-       tegra_xusb_plat_data.ls_rslew_pad0 = (0x3 << 14);
-       tegra_xusb_plat_data.ls_rslew_pad1 = (0x0 << 14);
-       tegra_xusb_plat_data.ls_rslew_pad2 = (0x0 << 14);
-       tegra_xusb_plat_data.hs_disc_lvl = (0x5 << 2);
-       tegra_xusb_plat_data.spare_in = 0x1;
-#endif
-       tegra_xusb_read_usb_calib();
-       tegra_xusb_plat_data.bdata = bdata;
-       tegra_xhci_device.dev.platform_data = &tegra_xusb_plat_data;
-       platform_device_register(&tegra_xhci_device);
-}
-#else
-void tegra_xusb_init(struct tegra_xusb_board_data *bdata) {}
-#endif