ARM: Tegra: Add CONFIG_TEGRA_USE_SECURE_KERNEL
James Zhao [Thu, 21 Mar 2013 19:29:51 +0000 (12:29 -0700)]
This new config would only be enabled when we enable a secure os
implementation. This config would be generic and we can reuse it
if/when we change the secure os vendor.

Change-Id: I94a0a365d4dc834fafa1137a0c0d9adf1b394c51
Signed-off-by: James Zhao <jamesz@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/211756
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>

17 files changed:
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/common.h
arch/arm/mach-tegra/cpuidle-t11x.c
arch/arm/mach-tegra/headsmp.S
arch/arm/mach-tegra/pm.c
arch/arm/mach-tegra/pm.h
arch/arm/mach-tegra/reset.c
arch/arm/mach-tegra/sleep-t20.S
arch/arm/mach-tegra/sleep-t30.S
arch/arm/mach-tegra/sleep.S
arch/arm/mach-tegra/sleep.h
arch/arm/mach-tegra/timer.c
arch/arm/mm/cache-l2x0.c
arch/arm/mm/proc-v7.S
security/tf_driver/Kconfig

index 4fb6579..fa221d0 100644 (file)
@@ -694,9 +694,17 @@ config TEGRA_SOCTHERM
         help
          Enables use of soctherm for thermal management.
 
+config TEGRA_USE_SECURE_KERNEL
+       bool "Boot the linux kernel in non-secure mode"
+       help
+        When enabled, the CPU will boot in the non-secure mode and issue
+        SMCs in order to access secure registers. SMC requests would be
+        serviced by a third party software component running in the secure
+        mode.
+
 config TEGRA_VIRTUAL_CPUID
        bool "virtualized CPUID"
-       depends on !TRUSTED_FOUNDATIONS
+       depends on !TEGRA_USE_SECURE_KERNEL
        depends on ARCH_TEGRA_HAS_SYMMETRIC_CPU_PWR_GATE
        default n
        help
@@ -745,4 +753,5 @@ config TEGRA_PLLM_SCALED
          granularity of possible memory rate steps. In this case PLLC
          provides a backup memory clock while PLLM is re-locking to the
          new rate.
+
 endif
index 69bc610..0887d37 100644 (file)
@@ -171,7 +171,7 @@ obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += mcerr-t11.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += mcerr-t14.o
 endif
 
-obj-$(CONFIG_TRUSTED_FOUNDATIONS)       += tegra_tzram.o
+obj-$(CONFIG_TEGRA_USE_SECURE_KERNEL)   += tegra_tzram.o
 
 obj-${CONFIG_MACH_CURACAO}              += board-curacao.o
 obj-${CONFIG_MACH_CURACAO}              += board-curacao-panel.o
index 828fa39..0c8631a 100644 (file)
@@ -121,7 +121,7 @@ unsigned long tegra_lp0_vec_size;
 #ifdef CONFIG_TEGRA_NVDUMPER
 unsigned long nvdumper_reserved;
 #endif
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 unsigned long tegra_tzram_start;
 unsigned long tegra_tzram_size;
 #endif
@@ -370,7 +370,7 @@ static __initdata struct tegra_clk_init_table tegra14x_clk_init_table[] = {
 #endif
 
 #ifdef CONFIG_CACHE_L2X0
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 static void tegra_cache_smc(bool enable, u32 arg)
 {
        void __iomem *p = IO_ADDRESS(TEGRA_ARM_PL310_BASE);
@@ -439,18 +439,18 @@ static void tegra_l2x0_disable(void)
        tegra_cache_smc(false, l2x0_way_mask);
        local_irq_restore(flags);
 }
-#endif /* CONFIG_TRUSTED_FOUNDATIONS  */
+#endif /* CONFIG_TEGRA_USE_SECURE_KERNEL */
 
 void tegra_init_cache(bool init)
 {
        void __iomem *p = IO_ADDRESS(TEGRA_ARM_PL310_BASE);
        u32 aux_ctrl;
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#ifndef CONFIG_TEGRA_USE_SECURE_KERNEL
        u32 cache_type;
        u32 tag_latency, data_latency;
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        /* issue the SMC to enable the L2 */
        aux_ctrl = readl_relaxed(p + L2X0_AUX_CTRL);
        trace_smc_init_cache(NVSEC_SMC_START);
@@ -902,7 +902,7 @@ static int __init tegra_tsec_arg(char *options)
 }
 early_param("tsec", tegra_tsec_arg);
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 static int __init tegra_tzram_arg(char *options)
 {
        char *p = options;
@@ -1544,7 +1544,7 @@ void __init tegra_reserve(unsigned long carveout_size, unsigned long fb_size,
        }
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        pr_info("Tzram:               %08lx - %08lx\n",
                tegra_tzram_start,
                tegra_tzram_size ?
index d85d745..762b55f 100644 (file)
@@ -3,7 +3,7 @@ extern struct smp_operations tegra_smp_ops;
 extern unsigned long tegra_tsec_start;
 extern unsigned long tegra_tsec_size;
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 extern unsigned long tegra_tzram_start;
 extern unsigned long tegra_tzram_size;
 #endif
index 0878854..7b0f449 100644 (file)
@@ -438,7 +438,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev,
        tegra_cpu_wake_by_time[dev->cpu] = ktime_to_us(entry_time) + request;
        smp_wmb();
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        if ((cpu == 0) || (cpu == 4)) {
                tegra_generic_smc(0xFFFFFFFC, 0xFFFFFFE7,
                                (TEGRA_RESET_HANDLER_BASE +
index 35e1f62..06091dd 100644 (file)
@@ -78,7 +78,7 @@ ENDPROC(tegra_secondary_startup)
  *       re-enabling sdram.
  */
 ENTRY(tegra_resume)
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        mov32   r1, TEGRA_TMRUS_BASE
        ldr     r0, [r1]
        adr     r1, tegra_resume_entry_time
@@ -115,7 +115,7 @@ ENTRY(tegra_resume)
        str     r1, [r0]
 #endif /* CONFIG_HAVE_ARM_SCU */
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
        mov32   r1, TEGRA_TMRUS_BASE
        ldr     r0, [r1]
@@ -131,10 +131,11 @@ ENTRY(tegra_resume)
        adr     r1, tegra_resume_smc_exit_time
        str     r0, [r1]
 #endif /* !CONFIG_ARCH_TEGRA_11x_SOC */
-#endif /* CONFIG_TRUSTED_FOUNDATIONS */
+#endif /* CONFIG_TEGRA_USE_SECURE_KERNEL */
 
 #ifdef CONFIG_CACHE_L2X0
-#if !defined(CONFIG_TRUSTED_FOUNDATIONS) && !defined(CONFIG_ARCH_TEGRA_14x_SOC)
+#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL) && \
+               !defined(CONFIG_ARCH_TEGRA_14x_SOC)
        adr     r0, tegra_resume_l2_init
        ldr     r1, [r0]
        tst     r1, #1
@@ -186,13 +187,13 @@ ENTRY(tegra_resume)
        str     r2, [r3, #L2X0_AUX_CTRL]
        mov     r2, #1
        str     r2, [r3, #L2X0_CTRL]
-#endif /* ?CONFIG_TRUSTED_FOUNDATIONS */
+#endif /* ?CONFIG_TEGRA_USE_SECURE_KERNEL */
 #endif /* CONFIG_CACHE_L2X0 */
 no_l2_init:
        b       cpu_resume
 ENDPROC(tegra_resume)
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        .globl tegra_resume_timestamps_start
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
        .globl tegra_resume_smc_entry_time
@@ -210,7 +211,7 @@ tegra_resume_smc_exit_time:
 tegra_resume_entry_time:
        .long   0
 tegra_resume_timestamps_end:
-#endif /* CONFIG_TRUSTED_FOUNDATIONS */
+#endif /* CONFIG_TEGRA_USE_SECURE_KERNEL */
 #ifdef CONFIG_CACHE_L2X0
        .globl tegra_resume_l2_init
 tegra_resume_l2_init:
@@ -371,7 +372,7 @@ ENTRY(__tegra_cpu_reset_handler)
 #if DEBUG_CPU_RESET_HANDLER
        b       .
 #endif
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#ifndef CONFIG_TEGRA_USE_SECURE_KERNEL
        cpsid   aif, 0x13                       @ SVC mode, interrupts disabled
        mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
        and     r5, r0, #0x00f00000             @ variant
index bc28e0b..2e6b64a 100644 (file)
@@ -571,7 +571,7 @@ bool tegra_set_cpu_in_pd(int cpu)
 static void tegra_sleep_core(enum tegra_suspend_mode mode,
                             unsigned long v2p)
 {
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        outer_flush_range(__pa(&tegra_resume_timestamps_start),
                          __pa(&tegra_resume_timestamps_end));
 
@@ -604,7 +604,7 @@ static inline void tegra_sleep_cpu(unsigned long v2p)
 
 static inline void tegra_stop_mc_clk(unsigned long v2p)
 {
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
        outer_flush_range(__pa(&tegra_resume_timestamps_start),
                          __pa(&tegra_resume_timestamps_end));
        trace_smc_sleep_core(NVSEC_SMC_START);
@@ -695,7 +695,7 @@ unsigned int tegra_idle_power_down_last(unsigned int sleep_time,
        suspend_cpu_complex(flags);
        tegra_cluster_switch_time(flags, tegra_cluster_switch_time_id_prolog);
 #if defined(CONFIG_CACHE_L2X0)
-#if defined(CONFIG_TRUSTED_FOUNDATIONS)
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        flush_cache_all();
        outer_disable();
 #elif !defined(CONFIG_ARCH_TEGRA_14x_SOC)
@@ -713,11 +713,11 @@ unsigned int tegra_idle_power_down_last(unsigned int sleep_time,
 
 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
        tegra_init_cache(true);
-#elif defined(CONFIG_TRUSTED_FOUNDATIONS)
+#elif defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        tegra_init_cache(false);
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
        trace_smc_wake(tegra_resume_smc_entry_time, NVSEC_SMC_START);
        trace_smc_wake(tegra_resume_smc_exit_time, NVSEC_SMC_DONE);
@@ -1112,7 +1112,7 @@ int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags)
        }
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
        trace_smc_wake(tegra_resume_smc_entry_time, NVSEC_SMC_START);
        trace_smc_wake(tegra_resume_smc_exit_time, NVSEC_SMC_DONE);
index eeac934..706aab2 100644 (file)
@@ -289,7 +289,7 @@ void tegra_smp_save_power_mask(void);
 void tegra_smp_restore_power_mask(void);
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 void tegra_generic_smc(u32 type, u32 subtype, u32 arg);
 #endif
 
index 44a9366..ccb5ac2 100644 (file)
@@ -36,7 +36,7 @@ static bool is_enabled;
 static void tegra_cpu_reset_handler_enable(void)
 {
        void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_BASE);
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        void __iomem *evp_cpu_reset =
                IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
        void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE);
@@ -48,7 +48,7 @@ static void tegra_cpu_reset_handler_enable(void)
        memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start,
                tegra_cpu_reset_handler_size);
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        tegra_generic_smc(0xFFFFF200,
                TEGRA_RESET_HANDLER_BASE + tegra_cpu_reset_handler_offset, 0);
 #else
index ca540dd..194f536 100644 (file)
@@ -277,7 +277,7 @@ ENTRY(tegra2_lp1_reset)
         * enable PLLP.
         */
        mov32   r0, TEGRA_CLK_RESET_BASE
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        /* secure code handles 32KHz to CLKM/OSC clock switch */
        mov     r1, #(1 << 28)
        str     r1, [r0, #CLK_RESET_SCLK_BURST]
index 385d1de..904cd34 100644 (file)
@@ -398,7 +398,7 @@ ENTRY(tegra3_lp1_reset)
        bne     emc_exit_selfrefresh
 
        mov32   r0, TEGRA_CLK_RESET_BASE
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        /* secure code handles 32KHz to CLKM/OSC clock switch */
        mov     r1, #(1<<28)
        str     r1, [r0, #CLK_RESET_SCLK_BURST]
index da08546..7150c84 100644 (file)
@@ -208,7 +208,7 @@ ENDPROC(tegra_flush_l1_cache)
  */
 ENTRY(tegra_sleep_cpu_finish)
        mov     r4, r0
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        ldr     r0, =0xFFFFFFFC
        ldr     r1, =0xFFFFFFE4
        ldr     r2, =TEGRA_RESET_HANDLER_BASE
@@ -286,7 +286,8 @@ tegra_shut_off_mmu:
        dsb
        mcr     p15, 0, r3, c1, c0, 0
        isb
-#if defined(CONFIG_CACHE_L2X0) && !defined(CONFIG_TRUSTED_FOUNDATIONS)
+#if defined(CONFIG_CACHE_L2X0) && \
+               !defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        tst     r11, #1
        beq     2f
        mov32   r1, TEGRA_ARM_PL310_BASE
@@ -305,7 +306,7 @@ tegra_shut_off_mmu:
        mov     r2, #0
        str     r2, [r1, #L2X0_CACHE_SYNC]
        str     r2, [r1, #L2X0_CTRL]
-#endif /* CONFIG_CACHE_L2X0 && !CONFIG_TRUSTED_FOUNDATIONS */
+#endif /* CONFIG_CACHE_L2X0 && !CONFIG_TEGRA_USE_SECURE_KERNEL */
 2:     mov     pc, r0
 
 /*
@@ -325,7 +326,7 @@ ENTRY(tegra_cpu_pllp)
 ENDPROC(tegra_cpu_pllp)
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
 /*
  * tegra_generic_smc
  *
index cdec743..aae0737 100644 (file)
@@ -19,7 +19,7 @@
 
 #include "iomap.h"
 
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#ifndef CONFIG_TEGRA_USE_SECURE_KERNEL
 /* FIXME: The code associated with this should be removed if our change to
    save the diagnostic regsiter in the CPU context is accepted. */
 #define USE_TEGRA_DIAG_REG_SAVE        1
@@ -331,7 +331,7 @@ int tegra3_sleep_cpu_secondary_finish(unsigned long int);
 int tegra3_stop_mc_clk_finish(unsigned long int);
 #endif
 
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#ifdef CONFIG_TEGRA_USE_SECURE_KERNEL
 extern unsigned long tegra_resume_timestamps_start;
 extern unsigned long tegra_resume_timestamps_end;
 #ifndef CONFIG_ARCH_TEGRA_11x_SOC
index 5abc58f..cf73d65 100644 (file)
@@ -330,7 +330,7 @@ void __init tegra_cpu_timer_init(void)
 
 static void tegra_arch_timer_per_cpu_init(void)
 {
-#ifdef CONFIG_TRUSTED_FOUNDATIONS
+#if defined(CONFIG_TEGRA_USE_SECURE_KERNEL)
        return;
 #else
        if (arch_timer_initialized) {
index 86e3143..1610041 100644 (file)
@@ -97,7 +97,7 @@ static inline void l2x0_inv_line(unsigned long addr)
        writel_relaxed(addr, base + L2X0_INV_LINE_PA);
 }
 
-#if !defined(CONFIG_TRUSTED_FOUNDATIONS) && \
+#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL) && \
        (defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915))
 static inline void debug_writel(unsigned long val)
 {
index 2cb167b..80a3ed6 100644 (file)
@@ -256,7 +256,7 @@ ENTRY(cpu_v7_do_resume)
        ldmia   r0!, {r4 - r6}
        mcr     p15, 0, r4, c13, c0, 0  @ FCSE/PID
        mcr     p15, 0, r5, c13, c0, 3  @ User r/o thread ID
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#ifndef CONFIG_TEGRA_USE_SECURE_KERNEL
        mcr     p15, 0, r6, c15, c0, 1  @ diag
 #endif
 
@@ -590,7 +590,7 @@ __v7_setup:
 2:     ldr     r10, =0x00000c09                @ Cortex-A9 primary part number
        teq     r0, r10
        bne     3f
-#ifndef CONFIG_TRUSTED_FOUNDATIONS
+#ifndef CONFIG_TEGRA_USE_SECURE_KERNEL
        cmp     r6, #0x10                       @ power ctrl reg added r1p0
        mrcge   p15, 0, r10, c15, c0, 0         @ read power control register
        orrge   r10, r10, #1                    @ enable dynamic clock gating
index 82203c3..e212e53 100644 (file)
@@ -2,7 +2,8 @@ config TRUSTED_FOUNDATIONS
        bool "Enable TF Driver"
        default n
        select CRYPTO_SHA1
+       select TEGRA_USE_SECURE_KERNEL
        help
          This option adds kernel support for communication with the Trusted Foundations.
          Default options is n
-         If you are unsure how to answer this question, answer N.
\ No newline at end of file
+         If you are unsure how to answer this question, answer N.