dc: mode : choose VRR native mode h&v ref_to_sync
Jonathan McCaffrey [Thu, 29 Oct 2015 15:51:15 +0000 (15:51 +0000)]
For DSI panels, if VRR is initialized, set the v & h ref_to_sync values from
the VRR native mode.

This was previously not done ifdef CONFIG_TEGRA_HDMI2_0, which led to display
corruption with TEGRA_DC_EXT_FLIP_HEAD_FLAG_VRR_MODE set, the because the
v_ref_to_sync value was greater than v_front_porch_min,

Bug 1689933

Change-Id: I81e215553ef90636aed319574d20d9e7ea96f696
Signed-off-by: Jonathan McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: http://git-master/r/824973
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

drivers/video/tegra/dc/dc.c
drivers/video/tegra/dc/mode.c

index 2b0689b..54aa0b7 100644 (file)
@@ -2953,6 +2953,7 @@ static void tegra_dc_prism_update_backlight(struct tegra_dc *dc)
 void tegra_dc_set_act_vfp(struct tegra_dc *dc, int vfp)
 {
        WARN_ON(!mutex_is_locked(&dc->lock));
+       WARN_ON(vfp < dc->mode.v_ref_to_sync + 1);
 
        tegra_dc_writel(dc, WRITE_MUX_ACTIVE | READ_MUX_ACTIVE,
                        DC_CMD_STATE_ACCESS);
index 2e44f32..3450253 100644 (file)
@@ -353,15 +353,17 @@ static bool check_mode_timings(struct tegra_dc *dc, struct tegra_dc_mode *mode)
                        /* HDMI controller requires h_ref=1, v_ref=1 */
                mode->h_ref_to_sync = 1;
                mode->v_ref_to_sync = 1;
-       } else if (dc->out->vrr) {
+       } else {
+               calc_ref_to_sync(mode);
+       }
+#endif
+
+       if (dc->out->type == TEGRA_DC_OUT_DSI && dc->out->vrr) {
                mode->h_ref_to_sync =
                        dc->out->modes[dc->out->n_modes-1].h_ref_to_sync;
                mode->v_ref_to_sync =
                        dc->out->modes[dc->out->n_modes-1].v_ref_to_sync;
-       } else {
-               calc_ref_to_sync(mode);
        }
-#endif
 
        if (dc->out->type == TEGRA_DC_OUT_DP) {
                mode->h_ref_to_sync = 1;