ARM: tegra: dvfs: Don't set common core edp default voltage

Picked from tegra11 & applied to tegra12
Original Commit: 6ed8068de3e30d50c4d695f9cb4bf093b864a24f

Removed 1.2V default core edp voltage setting from common code.
Let Tegra family specific dvfs layers to set different defaults:
1.2V for Tegra3, and 1.1V for Tegra11 (Tegra2 does not support
core edp limits at all).

Signed-off-by: Bhanu Chetlapalli <bchetlapalli@nvidia.com>
Change-Id: I329369b9ec34648d0dfac65add96ca2af83609f1
Reviewed-on: http://git-master/r/194793
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/200196
Tested-by: Chao Xu <cxu@nvidia.com>

diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c
index fd8d880d406f389513448a462223bdcfdf05690b..6742213bcaae8fb4d9c72382e53f287d57307ef9 100644 (file)
--- a/arch/arm/mach-tegra/tegra12_dvfs.c
+++ b/arch/arm/mach-tegra/tegra12_dvfs.c
@@ -550,15 +550,17 @@ static int __init get_core_nominal_mv_index(int speedo_id)
 {
        int i;
        int mv = tegra_core_speedo_mv();
-       int core_edp_limit = get_core_edp();
+       int core_edp_voltage = get_core_edp();
 
        /*
         * Start with nominal level for the chips with this speedo_id. Then,
         * make sure core nominal voltage is below edp limit for the board
         * (if edp limit is set).
         */
-       if (core_edp_limit)
-               mv = min(mv, core_edp_limit);
+       if (!core_edp_voltage)
+               core_edp_voltage = 1100;        /* default 1.1V EDP limit */
+
+       mv = min(mv, core_edp_voltage);
 
        /* Round nominal level down to the nearest core scaling step */
        for (i = 0; i < MAX_DVFS_FREQS; i++) {