ARM: tegra: la: fix compilations errors for T2
Varun Wadekar [Fri, 22 Jun 2012 12:58:04 +0000 (17:58 +0530)]
Change-Id: Ia61054f13fee9bcefaa290364297bbaeaa725110
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Rebase-Id: R55e6600e11ac7e10d2717f543497d5fa748774de

arch/arm/mach-tegra/include/mach/latency_allowance.h
arch/arm/mach-tegra/latency_allowance.c

index b35657c..1a12477 100644 (file)
@@ -89,7 +89,7 @@ enum tegra_la_id {
 
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC) || !defined(CONFIG_TEGRA_SILICON_PLATFORM)
 static inline int tegra_set_latency_allowance(enum tegra_la_id id,
-                                               int bandwidth_in_mbps)
+                                               unsigned int bandwidth_in_mbps)
 {
        return 0;
 }
index 1de9970..0018c5e 100644 (file)
@@ -374,6 +374,7 @@ static void set_vi_latency_thresholds(enum tegra_la_id id)
        set_thresholds(&vi_info[id - ID(VI_WSB)], id);
 }
 
+#if !defined(CONFIG_ARCH_TEGRA_2x_SOC)
 /* Sets latency allowance based on clients memory bandwitdh requirement.
  * Bandwidth passed is in mega bytes per second.
  */
@@ -497,6 +498,7 @@ void tegra_disable_latency_scaling(enum tegra_la_id id)
        }
        spin_unlock(&safety_lock);
 }
+#endif
 
 static int la_regs_show(struct seq_file *s, void *unused)
 {