ARM: tegra: ardbeg: add power monitor devices for TN8
Timo Alho [Wed, 2 Oct 2013 10:41:54 +0000 (13:41 +0300)]
- power monitor devices are different on tn8 and Shield ERS
- use board_info to get soc sku version and based on that register
devices specific to tn8

Change-Id: I348f665e3a7c61be06df70d1bfeec4432a049d8c
Signed-off-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/299437
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

arch/arm/mach-tegra/board-ardbeg-powermon.c

index 5e88195..55fcc6b 100644 (file)
@@ -807,6 +807,38 @@ static void modify_reworked_rail_data(void)
                                        = VDD_SOC_SD1_REWORKED;
 }
 
+static void modify_tn8_rail_data(void)
+{
+       /* E1780-A02 TN8 w/ E1736-A00 PMU*/
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
+               .calibration_data  = 0x3547;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
+               .power_lsb = 3.128284087 * PRECISION_MULTIPLIER_ARDBEG;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
+               .resistor = 3;
+
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
+               .calibration_data  = 0x2ED7;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
+               .power_lsb = 1.067467267 * PRECISION_MULTIPLIER_ARDBEG;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
+               .resistor = 10;
+
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
+               .calibration_data  = 0x7FFF;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
+               .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
+       ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
+               .resistor = 10;
+
+       ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
+               .calibration_data  = 0x7FFF;
+       ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
+               .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
+       ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
+               .resistor = 10;
+}
+
 int __init ardbeg_pmon_init(void)
 {
        /*
@@ -823,6 +855,9 @@ int __init ardbeg_pmon_init(void)
 
        tegra_get_board_info(&bi);
 
+       if (bi.sku == 1100)
+               modify_tn8_rail_data();
+
        i2c_register_board_info(1, ardbeg_i2c2_board_info,
                ARRAY_SIZE(ardbeg_i2c2_board_info));