Revert "gpu: nvgpu: Fix CDE bind channel usage"
Alex Waterman [Fri, 9 Dec 2016 18:54:35 +0000 (10:54 -0800)]
This reverts commit efc0204b472571bb9ab7e243c318bd12f3e721fc.

Bug 1850554

Change-Id: I02df6e6bba4c05ba0f255f9f828289f58ad4483a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1268640
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Martin Gao <marting@nvidia.com>

drivers/gpu/nvgpu/gk20a/cde_gk20a.c
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
drivers/gpu/nvgpu/gk20a/mm_gk20a.h

index 79bb057..68cabce 100644 (file)
@@ -1109,7 +1109,9 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
        }
 
        /* bind the channel to the vm */
-       err = __gk20a_vm_bind_channel(&g->mm.pmu.vm, ch);
+       gk20a_vm_get(&g->mm.pmu.vm);
+       ch->vm = &g->mm.pmu.vm;
+       err = channel_gk20a_commit_va(ch);
        if (err) {
                gk20a_warn(&cde_ctx->pdev->dev, "cde: could not bind vm");
                goto err_commit_va;
index 3652a8a..9c61570 100644 (file)
@@ -320,7 +320,7 @@ static int gk20a_alloc_comptags(struct gk20a *g,
        if (err)
                return err;
 
-       /*
+       /* 
         * offset needs to be at the start of a page/cacheline boundary;
         * prune the preceding ctaglines that were allocated for alignment.
         */
@@ -3126,9 +3126,11 @@ int gk20a_vm_free_space(struct gk20a_as_share *as_share,
        return err;
 }
 
-int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch)
+int gk20a_vm_bind_channel(struct gk20a_as_share *as_share,
+                         struct channel_gk20a *ch)
 {
        int err = 0;
+       struct vm_gk20a *vm = as_share->vm;
 
        gk20a_dbg_fn("");
 
@@ -3141,12 +3143,6 @@ int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch)
        return err;
 }
 
-int gk20a_vm_bind_channel(struct gk20a_as_share *as_share,
-                         struct channel_gk20a *ch)
-{
-       return __gk20a_vm_bind_channel(as_share->vm, ch);
-}
-
 int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev)
 {
        struct gk20a_dmabuf_priv *priv;
@@ -3723,3 +3719,4 @@ void gk20a_init_mm(struct gpu_ops *gops)
        gops->mm.init_pdb = gk20a_mm_init_pdb;
        gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
 }
+
index d70d5c8..18fa415 100644 (file)
@@ -588,7 +588,6 @@ int gk20a_vm_free_space(struct gk20a_as_share *as_share,
                        struct nvgpu_as_free_space_args *args);
 int gk20a_vm_bind_channel(struct gk20a_as_share *as_share,
                          struct channel_gk20a *ch);
-int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch);
 
 /* batching eliminates redundant cache flushes and invalidates */
 void gk20a_vm_mapping_batch_start(struct vm_gk20a_mapping_batch *batch);