powerpc: introduce and document sdhci,wp-inverted property for eSDHC
Anton Vorontsov [Tue, 22 Sep 2009 23:45:14 +0000 (16:45 -0700)]
eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
sdhci-of driver will look for sdhci,wp-inverted properties to decide
whether apply a specific quirk.

So, document the property and add it to device tree source files.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Documentation/powerpc/dts-bindings/fsl/esdhc.txt
arch/powerpc/boot/dts/mpc8377_mds.dts
arch/powerpc/boot/dts/mpc8377_rdb.dts
arch/powerpc/boot/dts/mpc8377_wlan.dts
arch/powerpc/boot/dts/mpc8378_mds.dts
arch/powerpc/boot/dts/mpc8378_rdb.dts
arch/powerpc/boot/dts/mpc8379_mds.dts
arch/powerpc/boot/dts/mpc8379_rdb.dts

index 3ed3797..8a00407 100644 (file)
@@ -10,6 +10,8 @@ Required properties:
   - interrupts : should contain eSDHC interrupt.
   - interrupt-parent : interrupt source phandle.
   - clock-frequency : specifies eSDHC base clock frequency.
+  - sdhci,wp-inverted : (optional) specifies that eSDHC controller
+    reports inverted write-protect state;
   - sdhci,1-bit-only : (optional) specifies that a controller can
     only handle 1-bit data transfers.
 
index f32c281..855782c 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };
index 28e022a..9e2264b 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };
index 3febc4e..9a60369 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                clock-frequency = <133333333>;
                        };
                };
index f720ab9..f70cf60 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };
index a11ead8..4e6a1a4 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };
index 4fa221f..645ec51 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };
index e35dfba..72336d5 100644 (file)
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };