arm: tegra: ardbeg: E1782: Add ardbeg_sata m/c
Seema Khowala [Fri, 15 Nov 2013 20:16:27 +0000 (12:16 -0800)]
Bug 1361265

Change-Id: I810c2072684d25acb6f0dfd3400eb0cf2286f25d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/305036
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

arch/arm/boot/dts/Makefile
arch/arm/boot/dts/tegra124-ardbeg_sata.dts [new file with mode: 0644]
arch/arm/mach-tegra/board-ardbeg-power.c
arch/arm/mach-tegra/board-ardbeg-sdhci.c
arch/arm/mach-tegra/board-ardbeg.c

index b534a44..888c7f7 100644 (file)
@@ -211,6 +211,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra124-tn8-a03-01.dtb \
        tegra124-e1782_sku1100.dtb \
        tegra124-e1791.dtb \
+       tegra124-ardbeg_sata.dtb \
        tegra124-vcm30_t124.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
        versatile-pb.dtb
diff --git a/arch/arm/boot/dts/tegra124-ardbeg_sata.dts b/arch/arm/boot/dts/tegra124-ardbeg_sata.dts
new file mode 100644 (file)
index 0000000..e569aa2
--- /dev/null
@@ -0,0 +1,111 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+       model = "NVIDIA Tegra124 Ardbeg Sata";
+       compatible = "nvidia,ardbeg_sata", "nvidia,tegra124";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       chosen {
+               bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk";
+               linux,initrd-start = <0x85000000>;
+               linux,initrd-end = <0x851bc400>;
+       };
+
+        serial@70006000 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+        serial@70006040 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+        serial@70006200 {
+                compatible = "nvidia,tegra114-hsuart";
+                status = "okay";
+        };
+
+       memory@0x80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       i2c@7000c000 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c400 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c500 {
+               status = "okay";
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c700 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+               nvidia,bit-banging-xfer-after-shutdown;
+       };
+
+       i2c@7000d100 {
+               status = "okay";
+               clock-frequency = <400000>;
+       };
+
+       spi@7000d400 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+
+       spi@7000da00 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+
+       pmc {
+               status = "okay";
+               nvidia,invert-interrupt;
+               nvidia,suspend-mode = <0>;
+               nvidia,cpu-pwr-good-time = <500>;
+               nvidia,cpu-pwr-off-time = <300>;
+               nvidia,core-pwr-good-time = <3845 3845>;
+               nvidia,core-pwr-off-time = <2000>;
+               nvidia,core-power-req-active-high;
+               nvidia,sys-clock-req-active-high;
+       };
+
+       stm8t143 {
+               compatible = "stm,stm8t143";
+               pout-gpio = <&gpio 190 0>;
+               tout-gpio = <&gpio 112 0>;
+       };
+
+       xusb@70090000 {
+               /* nvidia,uses_external_pmic;
+               nvidia,gpio_controls_muxed_ss_lanes; */
+               nvidia,gpio_ss1_sata = <0>;
+               nvidia,portmap = <0x703>; /* SSP0, SSP1 USB2P0, USB2P1, USBP2 */
+               nvidia,ss_portmap = <0x20>; /* SSP0 on USB2P0, SSP1 on USB2P2 */
+               nvidia,lane_owner = <6>; /* USB3P0 USB3P1 */
+               nvidia,ulpicap = <0>; /* No ulpi support. can we remove */
+               nvidia,supply_utmi_vbuses = "usb_vbus0", "usb_vbus1", "usb_vbus2";
+               nvidia,supply_s3p3v = "hvdd_usb";
+               nvidia,supply_s1p8v = "avdd_pll_utmip";
+               nvidia,supply_vddio_hsic = "vddio_hsic";
+               nvidia,supply_s1p05v = "avddio_usb";
+               status = "okay";
+       };
+};
index b13fef9..f7f6200 100644 (file)
@@ -1210,7 +1210,8 @@ static int __init ardbeg_fixed_regulator_init(void)
        struct board_info pmu_board_info;
        struct board_info display_board_info;
 
-       if (!of_machine_is_compatible("nvidia,ardbeg"))
+       if ((!of_machine_is_compatible("nvidia,ardbeg")) &&
+           (!of_machine_is_compatible("nvidia,ardbeg_sata")))
                return 0;
 
        tegra_get_display_board_info(&display_board_info);
index ce52941..7b867f4 100644 (file)
@@ -326,6 +326,7 @@ static int __init ardbeg_wifi_prepower(void)
 {
        if (!of_machine_is_compatible("nvidia,ardbeg") &&
                !of_machine_is_compatible("nvidia,laguna") &&
+               !of_machine_is_compatible("nvidia,ardbeg_sata") &&
                !of_machine_is_compatible("nvidia,tn8"))
                return 0;
        ardbeg_wifi_power(1);
index 78d2472..3e80387 100644 (file)
@@ -1071,6 +1071,8 @@ static void __init tegra_ardbeg_early_init(void)
                tegra_soc_device_init("laguna");
        else if (of_machine_is_compatible("nvidia,tn8"))
                tegra_soc_device_init("tn8");
+       else if (of_machine_is_compatible("nvidia,ardbeg_sata"))
+               tegra_soc_device_init("ardbeg_sata");
        else
                tegra_soc_device_init("ardbeg");
 }
@@ -1231,6 +1233,11 @@ static const char * const tn8_dt_board_compat[] = {
        NULL
 };
 
+static const char * const ardbeg_sata_dt_board_compat[] = {
+       "nvidia,ardbeg_sata",
+       NULL
+};
+
 DT_MACHINE_START(LAGUNA, "laguna")
        .atag_offset    = 0x100,
        .smp            = smp_ops(tegra_smp_ops),
@@ -1272,3 +1279,18 @@ DT_MACHINE_START(ARDBEG, "ardbeg")
        .dt_compat      = ardbeg_dt_board_compat,
        .init_late      = tegra_init_late
 MACHINE_END
+
+DT_MACHINE_START(ARDBEG_SATA, "ardbeg_sata")
+       .atag_offset    = 0x100,
+       .smp            = smp_ops(tegra_smp_ops),
+       .map_io         = tegra_map_common_io,
+       .reserve        = tegra_ardbeg_reserve,
+       .init_early     = tegra_ardbeg_init_early,
+       .init_irq       = irqchip_init,
+       .init_time      = clocksource_of_init,
+       .init_machine   = tegra_ardbeg_dt_init,
+       .restart        = tegra_assert_system_reset,
+       .dt_compat      = ardbeg_sata_dt_board_compat,
+       .init_late      = tegra_init_late
+
+MACHINE_END