ARM: tegra: move pinmux table to DT for bonaire
Laxman Dewangan [Wed, 8 Jan 2014 08:50:57 +0000 (13:50 +0530)]
Move pinmux table to DT for bonaire.

Change-Id: Ie4d398c0587e91d446d56709e32b363fae1b9f21
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/353243
GVS: Gerrit_Virtual_Submit

arch/arm/boot/dts/tegra124-bonaire.dts
arch/arm/boot/dts/tegra124-platforms/tegra124-bonaire-pinmux.dtsi [new file with mode: 0644]
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-bonaire-pinmux.c [deleted file]
arch/arm/mach-tegra/board-bonaire.c
arch/arm/mach-tegra/board-bonaire.h

index 754380c..88f0fce 100644 (file)
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 #include "tegra124.dtsi"
+#include "tegra124-platforms/tegra124-bonaire-pinmux.dtsi"
 
 / {
        model = "NVIDIA Tegra124 Bonaire";
                reg = <0x80000000 0x20000000>;
        };
 
+       pinmux {
+               status = "okay";
+       };
+
        i2c@7000c000 {
                status = "okay";
                clock-frequency = <100000>;
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-bonaire-pinmux.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-bonaire-pinmux.dtsi
new file mode 100644 (file)
index 0000000..cc94c5e
--- /dev/null
@@ -0,0 +1,922 @@
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
+
+/ {
+       pinmux: pinmux {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinmux_default>;
+
+               pinmux_default: common {
+                       ulpi_data0_po1 {
+                               nvidia,pins = "ulpi_data0_po1";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data1_po2 {
+                               nvidia,pins = "ulpi_data1_po2";
+                               nvidia,function = "spi3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       ulpi_data2_po3 {
+                               nvidia,pins = "ulpi_data2_po3";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data3_po4 {
+                               nvidia,pins = "ulpi_data3_po4";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data4_po5 {
+                               nvidia,pins = "ulpi_data4_po5";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data5_po6 {
+                               nvidia,pins = "ulpi_data5_po6";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data6_po7 {
+                               nvidia,pins = "ulpi_data6_po7";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_data7_po0 {
+                               nvidia,pins = "ulpi_data7_po0";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_clk_py0 {
+                               nvidia,pins = "ulpi_clk_py0";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_dir_py1 {
+                               nvidia,pins = "ulpi_dir_py1";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_nxt_py2 {
+                               nvidia,pins = "ulpi_nxt_py2";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ulpi_stp_py3 {
+                               nvidia,pins = "ulpi_stp_py3";
+                               nvidia,function = "ulpi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_fs_pp0 {
+                               nvidia,pins = "dap3_fs_pp0";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_din_pp1 {
+                               nvidia,pins = "dap3_din_pp1";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_dout_pp2 {
+                               nvidia,pins = "dap3_dout_pp2";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap3_sclk_pp3 {
+                               nvidia,pins = "dap3_sclk_pp3";
+                               nvidia,function = "i2s2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_clk_pz0 {
+                               nvidia,pins = "sdmmc1_clk_pz0";
+                               nvidia,function = "clk12";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_cmd_pz1 {
+                               nvidia,pins = "sdmmc1_cmd_pz1";
+                               nvidia,function = "spdif";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat3_py4 {
+                               nvidia,pins = "sdmmc1_dat3_py4";
+                               nvidia,function = "spdif";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_dat2_py5 {
+                               nvidia,pins = "sdmmc1_dat2_py5";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       sdmmc1_dat1_py6 {
+                               nvidia,pins = "sdmmc1_dat1_py6";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       sdmmc1_dat0_py7 {
+                               nvidia,pins = "sdmmc1_dat0_py7";
+                               nvidia,function = "rsvd2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk2_out_pw5 {
+                               nvidia,pins = "clk2_out_pw5";
+                               nvidia,function = "extperiph2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk2_req_pcc5 {
+                               nvidia,pins = "clk2_req_pcc5";
+                               nvidia,function = "dap";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ddc_scl_pv4 {
+                               nvidia,pins = "ddc_scl_pv4";
+                               nvidia,function = "i2c4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       ddc_sda_pv5 {
+                               nvidia,pins = "ddc_sda_pv5";
+                               nvidia,function = "i2c4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart2_rxd_pc3 {
+                               nvidia,pins = "uart2_rxd_pc3";
+                               nvidia,function = "spi4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       uart2_txd_pc2 {
+                               nvidia,pins = "uart2_txd_pc2";
+                               nvidia,function = "spi4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       uart2_rts_n_pj6 {
+                               nvidia,pins = "uart2_rts_n_pj6";
+                               nvidia,function = "spi4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       uart2_cts_n_pj5 {
+                               nvidia,pins = "uart2_cts_n_pj5";
+                               nvidia,function = "spi4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       uart3_txd_pw6 {
+                               nvidia,pins = "uart3_txd_pw6";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_rxd_pw7 {
+                               nvidia,pins = "uart3_rxd_pw7";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_cts_n_pa1 {
+                               nvidia,pins = "uart3_cts_n_pa1";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       uart3_rts_n_pc0 {
+                               nvidia,pins = "uart3_rts_n_pc0";
+                               nvidia,function = "uartc";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu0 {
+                               nvidia,pins = "pu0";
+                               nvidia,function = "owr";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       pu1 {
+                               nvidia,pins = "pu1";
+                               nvidia,function = "rsvd4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_TRISTATE>;
+                       };
+
+                       pu2 {
+                               nvidia,pins = "pu2";
+                               nvidia,function = "rsvd4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu3 {
+                               nvidia,pins = "pu3";
+                               nvidia,function = "pwm0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu4 {
+                               nvidia,pins = "pu4";
+                               nvidia,function = "pwm1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu5 {
+                               nvidia,pins = "pu5";
+                               nvidia,function = "pwm2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pu6 {
+                               nvidia,pins = "pu6";
+                               nvidia,function = "rsvd3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen1_i2c_scl_pc4 {
+                               nvidia,pins = "gen1_i2c_scl_pc4";
+                               nvidia,function = "i2c1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen1_i2c_sda_pc5 {
+                               nvidia,pins = "gen1_i2c_sda_pc5";
+                               nvidia,function = "i2c1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_fs_pp4 {
+                               nvidia,pins = "dap4_fs_pp4";
+                               nvidia,function = "i2s3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_din_pp5 {
+                               nvidia,pins = "dap4_din_pp5";
+                               nvidia,function = "i2s3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_dout_pp6 {
+                               nvidia,pins = "dap4_dout_pp6";
+                               nvidia,function = "i2s3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap4_sclk_pp7 {
+                               nvidia,pins = "dap4_sclk_pp7";
+                               nvidia,function = "i2s3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk3_out_pee0 {
+                               nvidia,pins = "clk3_out_pee0";
+                               nvidia,function = "extperiph3";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk3_req_pee1 {
+                               nvidia,pins = "clk3_req_pee1";
+                               nvidia,function = "dev3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen2_i2c_scl_pt5 {
+                               nvidia,pins = "gen2_i2c_scl_pt5";
+                               nvidia,function = "i2c2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       gen2_i2c_sda_pt6 {
+                               nvidia,pins = "gen2_i2c_sda_pt6";
+                               nvidia,function = "i2c2";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins = "sdmmc4_clk_pcc4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_cmd_pt7 {
+                               nvidia,pins = "sdmmc4_cmd_pt7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat0_paa0 {
+                               nvidia,pins = "sdmmc4_dat0_paa0";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat1_paa1 {
+                               nvidia,pins = "sdmmc4_dat1_paa1";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat2_paa2 {
+                               nvidia,pins = "sdmmc4_dat2_paa2";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat3_paa3 {
+                               nvidia,pins = "sdmmc4_dat3_paa3";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat4_paa4 {
+                               nvidia,pins = "sdmmc4_dat4_paa4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat5_paa5 {
+                               nvidia,pins = "sdmmc4_dat5_paa5";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat6_paa6 {
+                               nvidia,pins = "sdmmc4_dat6_paa6";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc4_dat7_paa7 {
+                               nvidia,pins = "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_mclk_pcc0 {
+                               nvidia,pins = "cam_mclk_pcc0";
+                               nvidia,function = "vi";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pcc1 {
+                               nvidia,pins = "pcc1";
+                               nvidia,function = "rsvd1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb0 {
+                               nvidia,pins = "pbb0";
+                               nvidia,function = "vgp6";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_i2c_scl_pbb1 {
+                               nvidia,pins = "cam_i2c_scl_pbb1";
+                               nvidia,function = "i2c3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       cam_i2c_sda_pbb2 {
+                               nvidia,pins = "cam_i2c_sda_pbb2";
+                               nvidia,function = "i2c3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb3 {
+                               nvidia,pins = "pbb3";
+                               nvidia,function = "vgp3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb4 {
+                               nvidia,pins = "pbb4";
+                               nvidia,function = "vgp4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb5 {
+                               nvidia,pins = "pbb5";
+                               nvidia,function = "vgp5";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb6 {
+                               nvidia,pins = "pbb6";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pbb7 {
+                               nvidia,pins = "pbb7";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pcc2 {
+                               nvidia,pins = "pcc2";
+                               nvidia,function = "i2s4";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       jtag_rtck {
+                               nvidia,pins = "jtag_rtck";
+                               nvidia,function = "rtck";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pwr_i2c_scl_pz6 {
+                               nvidia,pins = "pwr_i2c_scl_pz6";
+                               nvidia,function = "i2cpwr";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pwr_i2c_sda_pz7 {
+                               nvidia,pins = "pwr_i2c_sda_pz7";
+                               nvidia,function = "i2cpwr";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row0_pr0 {
+                               nvidia,pins = "kb_row0_pr0";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row1_pr1 {
+                               nvidia,pins = "kb_row1_pr1";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row2_pr2 {
+                               nvidia,pins = "kb_row2_pr2";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row3_pr3 {
+                               nvidia,pins = "kb_row3_pr3";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row4_pr4 {
+                               nvidia,pins = "kb_row4_pr4";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row5_pr5 {
+                               nvidia,pins = "kb_row5_pr5";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row6_pr6 {
+                               nvidia,pins = "kb_row6_pr6";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row7_pr7 {
+                               nvidia,pins = "kb_row7_pr7";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row8_ps0 {
+                               nvidia,pins = "kb_row8_ps0";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row9_ps1 {
+                               nvidia,pins = "kb_row9_ps1";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_row10_ps2 {
+                               nvidia,pins = "kb_row10_ps2";
+                               nvidia,function = "uarta";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col0_pq0 {
+                               nvidia,pins = "kb_col0_pq0";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col1_pq1 {
+                               nvidia,pins = "kb_col1_pq1";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col2_pq2 {
+                               nvidia,pins = "kb_col2_pq2";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col3_pq3 {
+                               nvidia,pins = "kb_col3_pq3";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col4_pq4 {
+                               nvidia,pins = "kb_col4_pq4";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col5_pq5 {
+                               nvidia,pins = "kb_col5_pq5";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col6_pq6 {
+                               nvidia,pins = "kb_col6_pq6";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       kb_col7_pq7 {
+                               nvidia,pins = "kb_col7_pq7";
+                               nvidia,function = "kbc";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       clk_32k_out_pa0 {
+                               nvidia,pins = "clk_32k_out_pa0";
+                               nvidia,function = "blink";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_fs_pn0 {
+                               nvidia,pins = "dap1_fs_pn0";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_din_pn1 {
+                               nvidia,pins = "dap1_din_pn1";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_dout_pn2 {
+                               nvidia,pins = "dap1_dout_pn2";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap1_sclk_pn3 {
+                               nvidia,pins = "dap1_sclk_pn3";
+                               nvidia,function = "i2s0";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       spdif_in_pk6 {
+                               nvidia,pins = "spdif_in_pk6";
+                               nvidia,function = "spdif";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       spdif_out_pk5 {
+                               nvidia,pins = "spdif_out_pk5";
+                               nvidia,function = "spdif";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_fs_pa2 {
+                               nvidia,pins = "dap2_fs_pa2";
+                               nvidia,function = "i2s1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_din_pa4 {
+                               nvidia,pins = "dap2_din_pa4";
+                               nvidia,function = "i2s1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_dout_pa5 {
+                               nvidia,pins = "dap2_dout_pa5";
+                               nvidia,function = "i2s1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       dap2_sclk_pa3 {
+                               nvidia,pins = "dap2_sclk_pa3";
+                               nvidia,function = "i2s1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins = "sdmmc3_cmd_pa7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat0_pb7 {
+                               nvidia,pins = "sdmmc3_dat0_pb7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat1_pb6 {
+                               nvidia,pins = "sdmmc3_dat1_pb6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat2_pb5 {
+                               nvidia,pins = "sdmmc3_dat2_pb5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc3_dat3_pb4 {
+                               nvidia,pins = "sdmmc3_dat3_pb4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       hdmi_cec_pee3 {
+                               nvidia,pins = "hdmi_cec_pee3";
+                               nvidia,function = "cec";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       sdmmc1_wp_n_pv3 {
+                               nvidia,pins = "sdmmc1_wp_n_pv3";
+                               nvidia,function = "sdmmc1";
+                               nvidia,enable-input = <TEGRA_PIN_INPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_NORMAL>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+
+                       pv1 {
+                               nvidia,pins = "pv1";
+                               nvidia,function = "rsvd4";
+                               nvidia,enable-input = <TEGRA_PIN_OUTPUT>;
+                               nvidia,pull = <TEGRA_PIN_PUPD_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_NORMAL>;
+                       };
+               };
+       };
+};
index deb0c61..dbdda01 100644 (file)
@@ -193,7 +193,6 @@ obj-$(CONFIG_TEGRA_USE_SECURE_KERNEL)   += tegra_tzram.o
 
 obj-${CONFIG_MACH_BONAIRE}              += board-bonaire.o
 obj-${CONFIG_MACH_BONAIRE}              += board-bonaire-panel.o
-obj-${CONFIG_MACH_BONAIRE}              += board-bonaire-pinmux.o
 obj-${CONFIG_MACH_BONAIRE}              += board-bonaire-power.o
 obj-${CONFIG_MACH_BONAIRE}              += board-bonaire-sdhci.o
 obj-${CONFIG_MACH_BONAIRE}              += board-bonaire-sensors.o
diff --git a/arch/arm/mach-tegra/board-bonaire-pinmux.c b/arch/arm/mach-tegra/board-bonaire-pinmux.c
deleted file mode 100644 (file)
index 0b874a0..0000000
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * arch/arm/mach-tegra/board-bonaire-pinmux.c
- *
- * Copyright (C) 2010-2011 NVIDIA Corporation
- * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/bug.h>
-#include <mach/pinmux.h>
-#include <mach/pinmux-t12.h>
-
-#define DEFAULT_DRIVE(_name)                                   \
-       {                                                       \
-               .pingroup = TEGRA_DRIVE_PINGROUP_##_name,       \
-               .hsm = TEGRA_HSM_DISABLE,                       \
-               .schmitt = TEGRA_SCHMITT_ENABLE,                \
-               .drive = TEGRA_DRIVE_DIV_1,                     \
-               .pull_down = TEGRA_PULL_31,                     \
-               .pull_up = TEGRA_PULL_31,                       \
-               .slew_rising = TEGRA_SLEW_SLOWEST,              \
-               .slew_falling = TEGRA_SLEW_SLOWEST,             \
-       }
-
-
-/* !!!FIXME!!!! POPULATE THIS TABLE */
-static __initdata struct tegra_drive_pingroup_config bonaire_drive_pinmux[] = {
-       /* DEFAULT_DRIVE(<pin_group>), */
-};
-
-#define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io)      \
-       {                                                       \
-               .pingroup       = TEGRA_PINGROUP_##_pingroup,   \
-               .func           = TEGRA_MUX_##_mux,             \
-               .pupd           = TEGRA_PUPD_##_pupd,           \
-               .tristate       = TEGRA_TRI_##_tri,             \
-               .io             = TEGRA_PIN_##_io,              \
-       }
-
-/* !!!FIXME!!!! POPULATE THIS TABLE */
-static __initdata struct tegra_pingroup_config bonaire_pinmux[] = {
-       DEFAULT_PINMUX(ULPI_DATA0,      SPI3,            NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA1,      SPI3,            NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA2,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DATA3,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DATA4,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DATA5,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DATA6,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DATA7,      ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_CLK,        ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_DIR,        ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_NXT,        ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(ULPI_STP,        ULPI,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP3_FS,         I2S2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP3_DIN,        I2S2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP3_DOUT,       I2S2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP3_SCLK,       I2S2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC1_CLK,      CLK12,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC1_CMD,      SPDIF,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT3,     SPDIF,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT2,     SDMMC1,          NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT1,     SDMMC1,          NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT0,     RSVD1,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CLK2_OUT,        EXTPERIPH2,      NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CLK2_REQ,        DAP,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DDC_SCL,         I2C4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DDC_SDA,         I2C4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(UART2_RXD,       SPI4,            NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(UART2_TXD,       SPI4,            NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(UART2_RTS_N,     SPI4,            NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(UART2_CTS_N,     SPI4,            NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(UART3_TXD,       UARTC,           NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(UART3_RXD,       UARTC,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(UART3_CTS_N,     UARTC,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(UART3_RTS_N,     UARTC,           NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU0,        OWR,             NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(GPIO_PU1,        RSVD0,           NORMAL,    TRISTATE,   INPUT),
-       DEFAULT_PINMUX(GPIO_PU2,        RSVD0,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PU3,        PWM0,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PU4,        PWM1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PU5,        PWM2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PU6,        RSVD2,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN1_I2C_SDA,    I2C1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN1_I2C_SCL,    I2C1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP4_FS,         I2S3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP4_DIN,        I2S3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP4_DOUT,       I2S3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP4_SCLK,       I2S3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CLK3_OUT,        EXTPERIPH3,      NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(CLK3_REQ,        DEV3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN2_I2C_SCL,    I2C2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN2_I2C_SDA,    I2C2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_CLK,      SDMMC4,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_CMD,      SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT0,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT1,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT2,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT3,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT4,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT5,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT6,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT7,     SDMMC4,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(CAM_MCLK,        VI,              NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PCC1,       RSVD1,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB0,       VGP6,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CAM_I2C_SCL,     I2C3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CAM_I2C_SDA,     I2C3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB3,       VGP3,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB4,       VGP4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB5,       VGP5,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB6,       I2S4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PBB7,       I2S4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PCC2,       I2S4,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(JTAG_RTCK,       RTCK,            NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(PWR_I2C_SCL,     I2CPWR,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(PWR_I2C_SDA,     I2CPWR,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW0,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW1,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW2,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW3,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW4,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW5,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW6,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW7,         UARTA,           NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(KB_ROW8,         UARTA,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW9,         UARTA,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_ROW10,        UARTA,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL0,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL1,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL2,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL3,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL4,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL5,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL6,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(KB_COL7,         KBC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CLK_32K_OUT,     BLINK,           NORMAL,    NORMAL,     OUTPUT),
-#ifdef CONFIG_SND_HDA_TEGRA
-       DEFAULT_PINMUX(DAP1_FS,         HDA,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_DIN,        HDA,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_DOUT,       HDA,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_SCLK,       HDA,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(CLK1_REQ,        DAP1,            NORMAL,    NORMAL,     INPUT),
-#else
-       DEFAULT_PINMUX(DAP1_FS,         I2S0,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_DIN,        I2S0,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_DOUT,       I2S0,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP1_SCLK,       I2S0,            NORMAL,    NORMAL,     INPUT),
-#endif
-       DEFAULT_PINMUX(SPDIF_IN,        SPDIF,           NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SPDIF_OUT,       SPDIF,           NORMAL,    NORMAL,     OUTPUT),
-       DEFAULT_PINMUX(DAP2_FS,         I2S1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP2_DIN,        I2S1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP2_DOUT,       I2S1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(DAP2_SCLK,       I2S1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_CLK,      SDMMC3,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_CMD,      SDMMC3,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT0,     SDMMC3,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT1,     SDMMC3,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT2,     SDMMC3,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT3,     SDMMC3,          PULL_UP,   NORMAL,     INPUT),
-       DEFAULT_PINMUX(HDMI_CEC,        CEC,             NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(SDMMC1_WP_N,     SDMMC1,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GPIO_PV1,        RSVD0,           PULL_UP,   NORMAL,     OUTPUT),
-};
-
-void __init bonaire_pinmux_init(void)
-{
-       tegra12x_default_pinmux();
-       tegra_pinmux_config_table(bonaire_pinmux, ARRAY_SIZE(bonaire_pinmux));
-       tegra_drive_pinmux_config_table(bonaire_drive_pinmux,
-                                       ARRAY_SIZE(bonaire_drive_pinmux));
-}
index 461eada..205ef6e 100644 (file)
@@ -471,8 +471,6 @@ static void bonaire_pcie_init(void)
 static void __init tegra_bonaire_init(void)
 {
        tegra_clk_init_from_table(bonaire_clk_init_table);
-       tegra_enable_pinmux();
-       bonaire_pinmux_init();
        tegra_soc_device_init("bonaire");
        bonaire_apbdma_init();
 
index 845ca56..a9fc998 100644 (file)
@@ -54,7 +54,6 @@
 
 int bonaire_regulator_init(void);
 int bonaire_sdhci_init(void);
-int bonaire_pinmux_init(void);
 int bonaire_panel_init(void);
 int bonaire_sensors_init(void);
 int bonaire_suspend_init(void);