gpu: nvgpu: Override GM20b RAM SVOP PDP fuses
Alex Frid [Tue, 16 Sep 2014 23:44:43 +0000 (16:44 -0700)]
Override GM20b RAM SVOP PDP fuses with 0x2 setting during clock
initialization.

Bug 1550997

Change-Id: I9a873b892a2db4af384a9a7af4470562cdcb1572
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/499554
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

drivers/gpu/nvgpu/gm20b/clk_gm20b.c

index eb7703b..568d4dd 100644 (file)
@@ -28,6 +28,7 @@
 #include "hw_trim_gm20b.h"
 #include "hw_timer_gm20b.h"
 #include "hw_therm_gm20b.h"
+#include "hw_fuse_gm20b.h"
 #include "clk_gm20b.h"
 
 #define ALLOW_NON_CALIBRATED_NA_MODE   1
@@ -1167,6 +1168,19 @@ static int gm20b_init_clk_setup_hw(struct gk20a *g)
                         trim_sys_bypassctrl_gpcpll_vco_f());
        gk20a_writel(g, trim_sys_bypassctrl_r(), data);
 
+       /* If not fused, set RAM SVOP PDP data 0x2, and enable fuse override */
+       data = gk20a_readl(g, fuse_ctrl_opt_ram_svop_pdp_r());
+       if (!fuse_ctrl_opt_ram_svop_pdp_data_v(data)) {
+               data = set_field(data, fuse_ctrl_opt_ram_svop_pdp_data_m(),
+                        fuse_ctrl_opt_ram_svop_pdp_data_f(0x2));
+               gk20a_writel(g, fuse_ctrl_opt_ram_svop_pdp_r(), data);
+               data = gk20a_readl(g, fuse_ctrl_opt_ram_svop_pdp_override_r());
+               data = set_field(data,
+                       fuse_ctrl_opt_ram_svop_pdp_override_data_m(),
+                       fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f());
+               gk20a_writel(g, fuse_ctrl_opt_ram_svop_pdp_override_r(), data);
+       }
+
        /* Disable idle slow down */
        data = gk20a_readl(g, therm_clk_slowdown_r(0));
        data = set_field(data, therm_clk_slowdown_idle_factor_m(),