arm: tegra: loki: add initial board files
siddardha [Wed, 24 Jul 2013 17:39:21 +0000 (10:39 -0700)]
Added initial board files, power tree,
power mon changes for loki

Bug 1327962

Change-Id: I4c9e73b2560bd858fa623bbca640f7a5ea156f9f
Signed-off-by: siddardha <siddardhan@nvidia.com>
Reviewed-on: http://git-master/r/252996
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

16 files changed:
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/tegra124-loki.dts [new file with mode: 0644]
arch/arm/configs/tegra12_android_defconfig
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-loki-kbc.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-panel.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-pinmux-t12x.h [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-pinmux.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-power.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-powermon.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-sdhci.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki-sensors.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki.c [new file with mode: 0644]
arch/arm/mach-tegra/board-loki.h [new file with mode: 0644]
arch/arm/mach-tegra/tegra-board-id.h

index 728ce4b..7cda474 100644 (file)
@@ -204,7 +204,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra124-bonaire_sim.dtb \
        tegra124-bonaire.dtb \
        tegra124-ardbeg.dtb \
-       tegra124-laguna.dtb
+       tegra124-laguna.dtb \
+       tegra124-loki.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
        versatile-pb.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
diff --git a/arch/arm/boot/dts/tegra124-loki.dts b/arch/arm/boot/dts/tegra124-loki.dts
new file mode 100644 (file)
index 0000000..2fac24c
--- /dev/null
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+/include/ "tegra124.dtsi"
+
+/ {
+       model = "NVIDIA Tegra124 Loki";
+       compatible = "nvidia,loki", "nvidia,tegra124";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       chosen {
+               bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk";
+               linux,initrd-start = <0x85000000>;
+               linux,initrd-end = <0x851bc400>;
+       };
+
+       gpio: gpio@6000d000 {
+               status = "okay";
+       };
+
+       serial@70006000 {
+               compatible = "nvidia,tegra114-hsuart";
+               status = "okay";
+       };
+
+       serial@70006040 {
+               compatible = "nvidia,tegra114-hsuart";
+               status = "okay";
+       };
+
+       serial@70006200 {
+               compatible = "nvidia,tegra114-hsuart";
+               status = "okay";
+       };
+
+       memory@0x80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       spi@7000d400 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+
+       spi@7000da00 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+       };
+};
index 5d77416..3e68a44 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_ARCH_TEGRA=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_ARCH_TEGRA_12x_SOC=y
 CONFIG_MACH_ARDBEG=y
+CONFIG_MACH_LOKI=y
 CONFIG_MACH_LAGUNA=y
 # CONFIG_TEGRA_CORE_DVFS is not set
 CONFIG_TEGRA_CLOCK_DEBUG_WRITE=y
index c587131..270ff9d 100644 (file)
@@ -298,6 +298,14 @@ config MACH_ARDBEG
        help
          Support for NVIDIA ARDBEG Development platform
 
+config MACH_LOKI
+       bool "Loki board"
+       depends on ARCH_TEGRA_12x_SOC
+       select MACH_HAS_SND_SOC_TEGRA_RT5639 if SND_SOC
+       select MACH_HAS_SND_SOC_TEGRA_RT5645 if SND_SOC
+       help
+         Support for NVIDIA LOKI Development platform
+
 config MACH_LAGUNA
         bool "LAGUNA board"
         depends on ARCH_TEGRA_12x_SOC || ARCH_TEGRA_11x_SOC
index 5f24299..7b680ae 100644 (file)
@@ -280,6 +280,20 @@ obj-${CONFIG_MACH_ARDBEG}               += panel-s-wqxga-10-1.o
 obj-${CONFIG_MACH_ARDBEG}               += panel-a-edp-1080p-14-0.o
 obj-${CONFIG_MACH_ARDBEG}               += panel-c-lvds-1366-14.o
 
+obj-${CONFIG_MACH_LOKI}                += board-loki.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-kbc.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-sdhci.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-sensors.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-panel.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-pinmux.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-power.o
+obj-${CONFIG_MACH_LOKI}                += board-tn8-power.o
+obj-${CONFIG_MACH_LOKI}                += board-loki-powermon.o
+obj-${CONFIG_MACH_LOKI}                += panel-a-1080p-11-6.o
+obj-${CONFIG_MACH_LOKI}                += panel-p-wuxga-10-1.o
+obj-${CONFIG_MACH_LOKI}                += panel-s-wqxga-10-1.o
+obj-${CONFIG_MACH_LOKI}                += panel-a-edp-1080p-14-0.o
+
 obj-${CONFIG_MACH_LAGUNA}               += board-ardbeg.o
 obj-${CONFIG_MACH_LAGUNA}               += board-ardbeg-kbc.o
 obj-${CONFIG_MACH_LAGUNA}               += board-ardbeg-sdhci.o
diff --git a/arch/arm/mach-tegra/board-loki-kbc.c b/arch/arm/mach-tegra/board-loki-kbc.c
new file mode 100644 (file)
index 0000000..6249514
--- /dev/null
@@ -0,0 +1,119 @@
+/*
+ * arch/arm/mach-tegra/board-loki-kbc.c
+ * Keys configuration for Nvidia tegra4 loki platform.
+ *
+ * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ * 02111-1307, USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/input/tegra_kbc.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/mfd/palmas.h>
+
+#include "tegra-board-id.h"
+#include "board.h"
+#include "board-loki.h"
+#include "devices.h"
+#include "iomap.h"
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+#include "wakeups-t11x.h"
+#else
+#include "wakeups-t12x.h"
+#endif
+
+
+#define GPIO_KEY(_id, _gpio, _iswake)           \
+       {                                       \
+               .code = _id,                    \
+               .gpio = TEGRA_GPIO_##_gpio,     \
+               .active_low = 1,                \
+               .desc = #_id,                   \
+               .type = EV_KEY,                 \
+               .wakeup = _iswake,              \
+               .debounce_interval = 10,        \
+       }
+
+#define GPIO_IKEY(_id, _irq, _iswake, _deb)    \
+       {                                       \
+               .code = _id,                    \
+               .gpio = -1,                     \
+               .irq = _irq,                    \
+               .desc = #_id,                   \
+               .type = EV_KEY,                 \
+               .wakeup = _iswake,              \
+               .debounce_interval = _deb,      \
+       }
+
+#define PMC_WAKE_STATUS         0x14
+#define TEGRA_WAKE_PWR_INT      (1UL << 18)
+
+static int loki_wakeup_key(void);
+
+static struct gpio_keys_button loki_int_keys[] = {
+       [0] = GPIO_IKEY(KEY_POWER, 0, 1, 10),
+       [1] = GPIO_KEY(KEY_VOLUMEUP, PQ6, 0),
+       [2] = GPIO_KEY(KEY_VOLUMEDOWN, PQ7, 0),
+       [3] = GPIO_KEY(KEY_HOME, PI5, 0),
+       [4] = GPIO_KEY(KEY_CAMERA_FOCUS, PQ2, 0),
+#if 0
+       [5] = GPIO_KEY(KEY_CAMERA, PV3, 0),
+#endif
+};
+
+static struct gpio_keys_platform_data loki_int_keys_pdata = {
+       .buttons        = loki_int_keys,
+       .nbuttons       = ARRAY_SIZE(loki_int_keys),
+       .wakeup_key     = loki_wakeup_key,
+};
+
+static struct platform_device loki_int_keys_device = {
+       .name   = "gpio-keys",
+       .id     = 0,
+       .dev    = {
+               .platform_data  = &loki_int_keys_pdata,
+       },
+};
+
+static int loki_wakeup_key(void)
+{
+       u32 status;
+       status = __raw_readl(IO_ADDRESS(TEGRA_PMC_BASE) + PMC_WAKE_STATUS);
+
+       pr_info("%s: Power key pressed\n", __func__);
+
+       return (status & TEGRA_WAKE_PWR_INT) ? KEY_POWER : KEY_RESERVED;
+}
+
+int __init loki_kbc_init(void)
+{
+       struct board_info board_info;
+       int ret;
+
+       tegra_get_board_info(&board_info);
+       pr_info("Boardid:SKU = 0x%04x:0x%04x\n",
+                       board_info.board_id, board_info.sku);
+
+       loki_int_keys[0].gpio = TEGRA_GPIO_PQ0;
+       loki_int_keys[0].active_low = 1;
+
+       ret = platform_device_register(&loki_int_keys_device);
+       return ret;
+}
diff --git a/arch/arm/mach-tegra/board-loki-panel.c b/arch/arm/mach-tegra/board-loki-panel.c
new file mode 100644 (file)
index 0000000..b38022c
--- /dev/null
@@ -0,0 +1,1040 @@
+/*
+ * arch/arm/mach-tegra/board-loki-panel.c
+ *
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+#include <linux/ioport.h>
+#include <linux/fb.h>
+#include <linux/nvmap.h>
+#include <linux/nvhost.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/tegra_pwm_bl.h>
+#include <linux/regulator/consumer.h>
+#include <linux/pwm_backlight.h>
+#include <linux/of.h>
+
+#include <mach/irqs.h>
+#include <mach/dc.h>
+#include <mach/pinmux.h>
+#include <mach/pinmux-t12.h>
+#include <asm/mach-types.h>
+
+#include "board.h"
+#include "devices.h"
+#include "gpio-names.h"
+#include "iomap.h"
+#include "tegra12_host1x_devices.h"
+
+struct platform_device * __init loki_host1x_init(void)
+{
+       struct platform_device *pdev = NULL;
+
+       pdev = tegra12_register_host1x_devices();
+
+       if (!pdev) {
+               pr_err("host1x devices registration failed\n");
+               return NULL;
+       }
+       return pdev;
+}
+
+#ifdef CONFIG_TEGRA_DC
+
+#define IS_EXTERNAL_PWM                1
+
+#define DSI_PANEL_RESET                1
+
+#define DSI_PANEL_RST_GPIO     TEGRA_GPIO_PH3
+#define DSI_PANEL_BL_PWM       TEGRA_GPIO_PH1
+
+#define DSI_PANEL_CE           0
+
+#define DC_CTRL_MODE   TEGRA_DC_OUT_CONTINUOUS_MODE
+
+/* HDMI Hotplug detection pin */
+#define loki_hdmi_hpd  TEGRA_GPIO_PN7
+
+static atomic_t sd_brightness = ATOMIC_INIT(255);
+
+static bool reg_requested;
+static bool gpio_requested;
+
+static struct regulator *vdd_lcd_s_1v8;
+static struct regulator *vdd_lcd_bl;
+static struct regulator *vdd_lcd_bl_en;
+static struct regulator *avdd_lcd_3v0_2v8;
+
+static struct regulator *loki_hdmi_reg;
+static struct regulator *loki_hdmi_pll;
+static struct regulator *loki_hdmi_vddio;
+
+#ifdef CONFIG_TEGRA_DC_CMU
+static struct tegra_dc_cmu loki_cmu = {
+       /* lut1 maps sRGB to linear space. */
+       {
+               0,    1,    2,    4,    5,    6,    7,    9,
+               10,   11,   12,   14,   15,   16,   18,   20,
+               21,   23,   25,   27,   29,   31,   33,   35,
+               37,   40,   42,   45,   48,   50,   53,   56,
+               59,   62,   66,   69,   72,   76,   79,   83,
+               87,   91,   95,   99,   103,  107,  112,  116,
+               121,  126,  131,  136,  141,  146,  151,  156,
+               162,  168,  173,  179,  185,  191,  197,  204,
+               210,  216,  223,  230,  237,  244,  251,  258,
+               265,  273,  280,  288,  296,  304,  312,  320,
+               329,  337,  346,  354,  363,  372,  381,  390,
+               400,  409,  419,  428,  438,  448,  458,  469,
+               479,  490,  500,  511,  522,  533,  544,  555,
+               567,  578,  590,  602,  614,  626,  639,  651,
+               664,  676,  689,  702,  715,  728,  742,  755,
+               769,  783,  797,  811,  825,  840,  854,  869,
+               884,  899,  914,  929,  945,  960,  976,  992,
+               1008, 1024, 1041, 1057, 1074, 1091, 1108, 1125,
+               1142, 1159, 1177, 1195, 1213, 1231, 1249, 1267,
+               1286, 1304, 1323, 1342, 1361, 1381, 1400, 1420,
+               1440, 1459, 1480, 1500, 1520, 1541, 1562, 1582,
+               1603, 1625, 1646, 1668, 1689, 1711, 1733, 1755,
+               1778, 1800, 1823, 1846, 1869, 1892, 1916, 1939,
+               1963, 1987, 2011, 2035, 2059, 2084, 2109, 2133,
+               2159, 2184, 2209, 2235, 2260, 2286, 2312, 2339,
+               2365, 2392, 2419, 2446, 2473, 2500, 2527, 2555,
+               2583, 2611, 2639, 2668, 2696, 2725, 2754, 2783,
+               2812, 2841, 2871, 2901, 2931, 2961, 2991, 3022,
+               3052, 3083, 3114, 3146, 3177, 3209, 3240, 3272,
+               3304, 3337, 3369, 3402, 3435, 3468, 3501, 3535,
+               3568, 3602, 3636, 3670, 3705, 3739, 3774, 3809,
+               3844, 3879, 3915, 3950, 3986, 4022, 4059, 4095,
+       },
+       /* csc */
+       {
+               0x100, 0x0,   0x0,
+               0x0,   0x100, 0x0,
+               0x0,   0x0,   0x100,
+       },
+       /* lut2 maps linear space to sRGB*/
+       {
+               0, 0, 1, 2, 3, 3, 4, 5,
+               6, 6, 7, 8, 8, 9, 10, 10,
+               11, 12, 12, 13, 13, 14, 14, 15,
+               16, 16, 17, 17, 18, 18, 19, 19,
+               19, 20, 20, 21, 21, 22, 22, 22,
+               23, 23, 24, 24, 24, 25, 25, 25,
+               26, 26, 27, 27, 27, 28, 28, 28,
+               28, 29, 29, 29, 30, 30, 30, 31,
+               31, 31, 31, 32, 32, 32, 33, 33,
+               33, 33, 34, 34, 34, 35, 35, 35,
+               35, 36, 36, 36, 36, 37, 37, 37,
+               38, 38, 38, 38, 39, 39, 39, 39,
+               40, 40, 40, 40, 40, 41, 41, 41,
+               41, 42, 42, 42, 42, 43, 43, 43,
+               43, 43, 44, 44, 44, 44, 45, 45,
+               45, 45, 45, 46, 46, 46, 46, 46,
+               47, 47, 47, 47, 47, 48, 48, 48,
+               48, 48, 49, 49, 49, 49, 49, 49,
+               50, 50, 50, 50, 50, 50, 51, 51,
+               51, 51, 51, 51, 52, 52, 52, 52,
+               52, 52, 53, 53, 53, 53, 53, 53,
+               54, 54, 54, 54, 54, 54, 54, 55,
+               55, 55, 55, 55, 55, 55, 55, 56,
+               56, 56, 56, 56, 56, 56, 57, 57,
+               57, 57, 57, 57, 57, 57, 58, 58,
+               58, 58, 58, 58, 58, 58, 58, 59,
+               59, 59, 59, 59, 59, 59, 59, 59,
+               60, 60, 60, 60, 60, 60, 60, 60,
+               60, 61, 61, 61, 61, 61, 61, 61,
+               61, 61, 61, 62, 62, 62, 62, 62,
+               62, 62, 62, 62, 62, 63, 63, 63,
+               63, 63, 63, 63, 63, 63, 63, 63,
+               64, 64, 64, 64, 64, 64, 64, 64,
+               64, 64, 64, 65, 65, 65, 65, 65,
+               65, 65, 65, 65, 65, 65, 66, 66,
+               66, 66, 66, 66, 66, 66, 66, 66,
+               66, 66, 67, 67, 67, 67, 67, 67,
+               67, 67, 67, 67, 67, 67, 68, 68,
+               68, 68, 68, 68, 68, 68, 68, 68,
+               68, 68, 69, 69, 69, 69, 69, 69,
+               69, 69, 69, 69, 69, 69, 70, 70,
+               70, 70, 70, 70, 70, 70, 70, 70,
+               70, 70, 70, 71, 71, 71, 71, 71,
+               71, 71, 71, 71, 71, 71, 71, 71,
+               72, 72, 72, 72, 72, 72, 72, 72,
+               72, 72, 72, 72, 72, 73, 73, 73,
+               73, 73, 73, 73, 73, 73, 73, 73,
+               73, 73, 73, 74, 74, 74, 74, 74,
+               74, 74, 74, 74, 74, 74, 74, 74,
+               75, 75, 75, 75, 75, 75, 75, 75,
+               75, 75, 75, 75, 75, 75, 76, 76,
+               76, 76, 76, 76, 76, 76, 76, 76,
+               76, 76, 76, 76, 77, 77, 77, 77,
+               77, 77, 77, 77, 77, 77, 77, 77,
+               77, 77, 78, 78, 78, 78, 78, 78,
+               78, 78, 78, 78, 78, 78, 78, 78,
+               79, 79, 79, 79, 79, 79, 79, 79,
+               79, 79, 79, 79, 79, 79, 80, 80,
+               80, 80, 80, 80, 80, 80, 80, 80,
+               80, 80, 80, 80, 81, 81, 81, 81,
+               81, 81, 81, 81, 81, 81, 81, 81,
+               81, 81, 82, 82, 82, 82, 82, 82,
+               82, 82, 82, 82, 82, 82, 82, 82,
+               83, 83, 83, 83, 83, 83, 83, 83,
+               84, 84, 85, 85, 86, 86, 87, 88,
+               88, 89, 89, 90, 90, 91, 92, 92,
+               93, 93, 94, 94, 95, 95, 96, 96,
+               97, 97, 98, 98, 99, 99, 100, 100,
+               101, 101, 102, 102, 103, 103, 104, 104,
+               105, 105, 106, 106, 107, 107, 107, 108,
+               108, 109, 109, 110, 110, 111, 111, 111,
+               112, 112, 113, 113, 114, 114, 114, 115,
+               115, 116, 116, 117, 117, 117, 118, 118,
+               119, 119, 119, 120, 120, 121, 121, 121,
+               122, 122, 123, 123, 123, 124, 124, 125,
+               125, 126, 126, 126, 127, 127, 128, 128,
+               128, 129, 129, 129, 130, 130, 131, 131,
+               131, 132, 132, 133, 133, 133, 134, 134,
+               135, 135, 135, 136, 136, 137, 137, 137,
+               138, 138, 138, 139, 139, 140, 140, 140,
+               141, 141, 142, 142, 142, 143, 143, 143,
+               144, 144, 145, 145, 145, 146, 146, 146,
+               147, 147, 147, 148, 148, 149, 149, 149,
+               150, 150, 150, 151, 151, 151, 152, 152,
+               153, 153, 153, 154, 154, 154, 155, 155,
+               156, 156, 156, 157, 157, 157, 158, 158,
+               159, 159, 159, 160, 160, 160, 161, 161,
+               162, 162, 162, 163, 163, 164, 164, 164,
+               165, 165, 166, 166, 166, 167, 167, 168,
+               168, 168, 169, 169, 170, 170, 170, 171,
+               171, 172, 172, 172, 173, 173, 173, 174,
+               174, 175, 175, 175, 176, 176, 176, 177,
+               177, 177, 178, 178, 178, 179, 179, 179,
+               180, 180, 180, 180, 181, 181, 181, 182,
+               182, 182, 182, 183, 183, 183, 184, 184,
+               184, 184, 185, 185, 185, 185, 186, 186,
+               186, 186, 187, 187, 187, 187, 188, 188,
+               188, 188, 189, 189, 189, 190, 190, 190,
+               190, 191, 191, 191, 191, 192, 192, 192,
+               193, 193, 193, 193, 194, 194, 194, 195,
+               195, 195, 195, 196, 196, 196, 197, 197,
+               197, 198, 198, 198, 198, 199, 199, 199,
+               200, 200, 200, 201, 201, 201, 202, 202,
+               202, 203, 203, 204, 204, 204, 205, 205,
+               205, 206, 206, 206, 207, 207, 208, 208,
+               208, 209, 209, 209, 210, 210, 211, 211,
+               211, 212, 212, 213, 213, 213, 214, 214,
+               215, 215, 215, 216, 216, 217, 217, 217,
+               218, 218, 218, 219, 219, 220, 220, 220,
+               221, 221, 221, 222, 222, 222, 223, 223,
+               223, 224, 224, 224, 225, 225, 225, 225,
+               226, 226, 226, 226, 227, 227, 227, 227,
+               228, 228, 228, 228, 229, 229, 229, 229,
+               229, 230, 230, 230, 230, 231, 231, 231,
+               231, 232, 232, 232, 233, 233, 233, 233,
+               234, 234, 234, 235, 235, 235, 236, 236,
+               236, 237, 237, 238, 238, 239, 239, 239,
+               240, 240, 241, 241, 242, 242, 243, 244,
+               244, 245, 245, 246, 247, 247, 248, 249,
+               250, 250, 251, 252, 253, 254, 254, 255,
+       },
+};
+#endif
+
+static struct resource loki_disp1_resources[] = {
+       {
+               .name   = "irq",
+               .start  = INT_DISPLAY_GENERAL,
+               .end    = INT_DISPLAY_GENERAL,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               .name   = "regs",
+               .start  = TEGRA_DISPLAY_BASE,
+               .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "fbmem",
+               .start  = 0, /* Filled in by loki_panel_init() */
+               .end    = 0, /* Filled in by loki_panel_init() */
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "dsi_regs",
+               .start  = TEGRA_DSI_BASE,
+               .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "mipi_cal",
+               .start  = TEGRA_MIPI_CAL_BASE,
+               .end    = TEGRA_MIPI_CAL_BASE + TEGRA_MIPI_CAL_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct resource loki_disp2_resources[] = {
+       {
+               .name   = "irq",
+               .start  = INT_DISPLAY_B_GENERAL,
+               .end    = INT_DISPLAY_B_GENERAL,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               .name   = "regs",
+               .start  = TEGRA_DISPLAY2_BASE,
+               .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "fbmem",
+               .start  = 0, /* Filled in by loki_panel_init() */
+               .end    = 0, /* Filled in by loki_panel_init() */
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "hdmi_regs",
+               .start  = TEGRA_HDMI_BASE,
+               .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static u8 panel_dsi_config[] = {0xe0, 0x43, 0x0, 0x80, 0x0, 0x0};
+static u8 panel_disp_ctrl1[] = {0xb5, 0x34, 0x20, 0x40, 0x0, 0x20};
+static u8 panel_disp_ctrl2[] = {0xb6, 0x04, 0x74, 0x0f, 0x16, 0x13};
+static u8 panel_internal_clk[] = {0xc0, 0x01, 0x08};
+static u8 panel_pwr_ctrl3[] = {
+       0xc3, 0x0, 0x09, 0x10, 0x02, 0x0, 0x66, 0x00, 0x13, 0x0};
+static u8 panel_pwr_ctrl4[] = {0xc4, 0x23, 0x24, 0x12, 0x12, 0x60};
+static u8 panel_positive_gamma_red[] = {
+       0xd0, 0x21, 0x25, 0x67, 0x36, 0x0a, 0x06, 0x61, 0x23, 0x03};
+static u8 panel_negetive_gamma_red[] = {
+       0xd1, 0x31, 0x25, 0x66, 0x36, 0x05, 0x06, 0x61, 0x23, 0x03};
+static u8 panel_positive_gamma_green[] = {
+       0xd2, 0x41, 0x26, 0x56, 0x36, 0x0a, 0x06, 0x61, 0x23, 0x03};
+static u8 panel_negetive_gamma_green[] = {
+       0xd3, 0x51, 0x26, 0x55, 0x36, 0x05, 0x06, 0x61, 0x23, 0x03};
+static u8 panel_positive_gamma_blue[] = {
+       0xd4, 0x41, 0x26, 0x56, 0x36, 0x0a, 0x06, 0x61, 0x23, 0x03};
+static u8 panel_negetive_gamma_blue[] = {
+       0xd5, 0x51, 0x26, 0x55, 0x36, 0x05, 0x06, 0x61, 0x23, 0x03};
+
+#if DSI_PANEL_CE
+static u8 panel_ce2[] = {0x71, 0x0, 0x0, 0x01, 0x01};
+static u8 panel_ce3[] = {0x72, 0x01, 0x0e};
+static u8 panel_ce4[] = {0x73, 0x34, 0x52, 0x0};
+static u8 panel_ce5[] = {0x74, 0x05, 0x0, 0x06};
+static u8 panel_ce6[] = {0x75, 0x03, 0x0, 0x07};
+static u8 panel_ce7[] = {0x76, 0x07, 0x0, 0x06};
+static u8 panel_ce8[] = {0x77, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f};
+static u8 panel_ce9[] = {0x78, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40};
+static u8 panel_ce10[] = {
+       0x79, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40};
+static u8 panel_ce11[] = {0x7a, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+static u8 panel_ce12[] = {0x7b, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+static u8 panel_ce13[] = {0x7c, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+#endif
+
+static struct tegra_dsi_cmd dsi_init_cmd[] = {
+       DSI_DLY_MS(20),
+       DSI_GPIO_SET(DSI_PANEL_RST_GPIO, 1),
+
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_dsi_config),
+
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_disp_ctrl1),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_disp_ctrl2),
+
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_internal_clk),
+
+       /*  panel power control 1 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc1, 0x0),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_pwr_ctrl3),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_pwr_ctrl4),
+
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_red),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_red),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_green),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_green),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_blue),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_blue),
+
+       DSI_CMD_SHORT(DSI_DCS_WRITE_1_PARAM, DSI_DCS_SET_ADDR_MODE, 0x0B),
+
+       /* panel OTP 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xf9, 0x0),
+
+#if DSI_PANEL_CE
+       /* panel CE 1 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0x70, 0x0),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce2),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce3),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce4),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce5),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce6),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce7),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce8),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce9),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce10),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce11),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce12),
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_ce13),
+#endif
+       /* panel power control 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc2, 0x02),
+       DSI_DLY_MS(20),
+
+       /* panel power control 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc2, 0x06),
+       DSI_DLY_MS(20),
+
+       /* panel power control 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc2, 0x4e),
+       DSI_DLY_MS(100),
+
+       DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_EXIT_SLEEP_MODE, 0x0),
+       DSI_DLY_MS(140),
+
+       /* panel OTP 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xf9, 0x80),
+       DSI_DLY_MS(20),
+
+       DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_ON, 0x0),
+};
+
+static u8 panel_suspend_pwr_ctrl4[] = {0xc4, 0x0, 0x0, 0x0, 0x0, 0x0};
+
+static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
+       DSI_DLY_MS(40),
+
+       DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_OFF, 0x0),
+       DSI_DLY_MS(20),
+
+       DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_ENTER_SLEEP_MODE, 0x0),
+
+       /* panel power control 2 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc2, 0x0),
+
+       /* panel power control 4 */
+       DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_suspend_pwr_ctrl4),
+
+       /* panel power control 1 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc1, 0x2),
+       DSI_DLY_MS(20),
+
+       /* panel power control 1 */
+       DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc1, 0x3),
+       DSI_DLY_MS(20),
+};
+
+static struct tegra_dsi_out loki_dsi = {
+       .n_data_lanes = 4,
+       .controller_vs = DSI_VS_1,
+       .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
+       .refresh_rate = 60,
+       .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
+
+       .dsi_instance = DSI_INSTANCE_0,
+
+       .panel_reset = DSI_PANEL_RESET,
+       .power_saving_suspend = true,
+       .video_data_type = TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE,
+       .video_clock_mode = TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS,
+       .video_burst_mode = TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END,
+       .dsi_init_cmd = dsi_init_cmd,
+       .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
+       .dsi_suspend_cmd = dsi_suspend_cmd,
+       .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
+};
+
+static int loki_dsi_regulator_get(struct device *dev)
+{
+       int err = 0;
+
+       if (reg_requested)
+               return 0;
+
+       avdd_lcd_3v0_2v8 = regulator_get(dev, "avdd_lcd");
+       if (IS_ERR_OR_NULL(avdd_lcd_3v0_2v8)) {
+               pr_err("avdd_lcd regulator get failed\n");
+               err = PTR_ERR(avdd_lcd_3v0_2v8);
+               avdd_lcd_3v0_2v8 = NULL;
+               goto fail;
+       }
+       vdd_lcd_s_1v8 = regulator_get(dev, "dvdd_lcd");
+       if (IS_ERR_OR_NULL(vdd_lcd_s_1v8)) {
+               pr_err("vdd_lcd_1v8_s regulator get failed\n");
+               err = PTR_ERR(vdd_lcd_s_1v8);
+               vdd_lcd_s_1v8 = NULL;
+               goto fail;
+       }
+
+       if (machine_is_dalmore()) {
+               vdd_lcd_bl = regulator_get(dev, "vdd_lcd_bl");
+               if (IS_ERR_OR_NULL(vdd_lcd_bl)) {
+                       pr_err("vdd_lcd_bl regulator get failed\n");
+                       err = PTR_ERR(vdd_lcd_bl);
+                       vdd_lcd_bl = NULL;
+                       goto fail;
+               }
+       }
+
+       vdd_lcd_bl_en = regulator_get(dev, "vdd_lcd_bl_en");
+       if (IS_ERR_OR_NULL(vdd_lcd_bl_en)) {
+               pr_err("vdd_lcd_bl_en regulator get failed\n");
+               err = PTR_ERR(vdd_lcd_bl_en);
+               vdd_lcd_bl_en = NULL;
+               goto fail;
+       }
+       reg_requested = true;
+       return 0;
+fail:
+       return err;
+}
+
+static int loki_dsi_gpio_get(void)
+{
+       int err = 0;
+
+       if (gpio_requested)
+               return 0;
+
+       err = gpio_request(DSI_PANEL_RST_GPIO, "panel rst");
+       if (err < 0) {
+               pr_err("panel reset gpio request failed\n");
+               goto fail;
+       }
+
+       gpio_requested = true;
+       return 0;
+fail:
+       return err;
+}
+
+static struct tegra_dc_out loki_disp1_out;
+
+static int loki_dsi_panel_enable(struct device *dev)
+{
+       int err = 0;
+
+       err = loki_dsi_regulator_get(dev);
+       if (err < 0) {
+               pr_err("dsi regulator get failed\n");
+               goto fail;
+       }
+       err = loki_dsi_gpio_get();
+       if (err < 0) {
+               pr_err("dsi gpio request failed\n");
+               goto fail;
+       }
+
+       /* Skip panel programming if in initialized mode */
+       if (!(loki_disp1_out.flags & TEGRA_DC_OUT_INITIALIZED_MODE)) {
+               loki_dsi.dsi_init_cmd = dsi_init_cmd;
+               gpio_set_value(DSI_PANEL_RST_GPIO, 0);
+       } else {
+               loki_dsi.dsi_init_cmd = dsi_init_cmd + 2;
+       }
+
+       if (vdd_lcd_s_1v8) {
+               err = regulator_enable(vdd_lcd_s_1v8);
+               if (err < 0) {
+                       pr_err("vdd_lcd_1v8_s regulator enable failed\n");
+                       goto fail;
+               }
+       }
+       usleep_range(3000, 5000);
+
+       if (avdd_lcd_3v0_2v8) {
+               err = regulator_enable(avdd_lcd_3v0_2v8);
+               if (err < 0) {
+                       pr_err("avdd_lcd_3v0_2v8 regulator enable failed\n");
+                       goto fail;
+               }
+               regulator_set_voltage(avdd_lcd_3v0_2v8, 2800000, 2800000);
+       }
+       usleep_range(3000, 5000);
+
+       if (vdd_lcd_bl) {
+               err = regulator_enable(vdd_lcd_bl);
+               if (err < 0) {
+                       pr_err("vdd_lcd_bl regulator enable failed\n");
+                       goto fail;
+               }
+       }
+
+       if (vdd_lcd_bl_en) {
+               err = regulator_enable(vdd_lcd_bl_en);
+               if (err < 0) {
+                       pr_err("vdd_lcd_bl_en regulator enable failed\n");
+                       goto fail;
+               }
+       }
+
+       return 0;
+fail:
+       return err;
+}
+
+static int loki_dsi_panel_disable(void)
+{
+       if (vdd_lcd_bl)
+               regulator_disable(vdd_lcd_bl);
+
+       if (vdd_lcd_bl_en)
+               regulator_disable(vdd_lcd_bl_en);
+
+       gpio_set_value(DSI_PANEL_RST_GPIO, 0);
+       mdelay(20);
+
+       if (vdd_lcd_s_1v8)
+               regulator_disable(vdd_lcd_s_1v8);
+
+       if (avdd_lcd_3v0_2v8)
+               regulator_disable(avdd_lcd_3v0_2v8);
+
+       return 0;
+}
+
+static int loki_dsi_panel_postsuspend(void)
+{
+       /* TODO */
+       return 0;
+}
+
+static struct tegra_dc_mode loki_dsi_modes[] = {
+       {
+               .pclk = 66700000,
+               .h_ref_to_sync = 4,
+               .v_ref_to_sync = 1,
+               .h_sync_width = 4,
+               .v_sync_width = 4,
+               .h_back_porch = 112,
+               .v_back_porch = 12,
+               .h_active = 720,
+               .v_active = 1280,
+               .h_front_porch = 12,
+               .v_front_porch = 8,
+       },
+};
+
+static struct tegra_dc_sd_settings sd_settings;
+
+static struct tegra_dc_out loki_disp1_out = {
+       .type           = TEGRA_DC_OUT_DSI,
+       .dsi            = &loki_dsi,
+
+       .flags          = DC_CTRL_MODE,
+       .sd_settings    = &sd_settings,
+
+       .modes          = loki_dsi_modes,
+       .n_modes        = ARRAY_SIZE(loki_dsi_modes),
+
+       .enable         = loki_dsi_panel_enable,
+       .disable        = loki_dsi_panel_disable,
+       .postsuspend    = loki_dsi_panel_postsuspend,
+       .width          = 62,
+       .height         = 110,
+};
+
+static int loki_hdmi_enable(struct device *dev)
+{
+       int ret;
+       if (!loki_hdmi_reg) {
+               loki_hdmi_reg = regulator_get(dev, "avdd_hdmi");
+               if (IS_ERR_OR_NULL(loki_hdmi_reg)) {
+                       pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
+                       loki_hdmi_reg = NULL;
+                       return PTR_ERR(loki_hdmi_reg);
+               }
+       }
+       ret = regulator_enable(loki_hdmi_reg);
+       if (ret < 0) {
+               pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
+               return ret;
+       }
+       if (!loki_hdmi_pll) {
+               loki_hdmi_pll = regulator_get(dev, "avdd_hdmi_pll");
+               if (IS_ERR_OR_NULL(loki_hdmi_pll)) {
+                       pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
+                       loki_hdmi_pll = NULL;
+                       regulator_put(loki_hdmi_reg);
+                       loki_hdmi_reg = NULL;
+                       return PTR_ERR(loki_hdmi_pll);
+               }
+       }
+       ret = regulator_enable(loki_hdmi_pll);
+       if (ret < 0) {
+               pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
+               return ret;
+       }
+       return 0;
+}
+
+static int loki_hdmi_disable(void)
+{
+       if (loki_hdmi_reg) {
+               regulator_disable(loki_hdmi_reg);
+               regulator_put(loki_hdmi_reg);
+               loki_hdmi_reg = NULL;
+       }
+
+       if (loki_hdmi_pll) {
+               regulator_disable(loki_hdmi_pll);
+               regulator_put(loki_hdmi_pll);
+               loki_hdmi_pll = NULL;
+       }
+
+       return 0;
+}
+
+static int loki_hdmi_postsuspend(void)
+{
+       if (loki_hdmi_vddio) {
+               regulator_disable(loki_hdmi_vddio);
+               regulator_put(loki_hdmi_vddio);
+               loki_hdmi_vddio = NULL;
+       }
+       return 0;
+}
+
+static int loki_hdmi_hotplug_init(struct device *dev)
+{
+       if (!loki_hdmi_vddio) {
+               loki_hdmi_vddio = regulator_get(dev, "vdd_hdmi_5v0");
+               if (WARN_ON(IS_ERR(loki_hdmi_vddio))) {
+                       pr_err("%s: couldn't get regulator vdd_hdmi_5v0: %ld\n",
+                                       __func__, PTR_ERR(loki_hdmi_vddio));
+                       loki_hdmi_vddio = NULL;
+               } else
+                       regulator_enable(loki_hdmi_vddio);
+       }
+       return 0;
+}
+
+static void loki_hdmi_hotplug_report(bool state)
+{
+       if (state) {
+               tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_DDC_SDA,
+                                               TEGRA_PUPD_PULL_DOWN);
+               tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_DDC_SCL,
+                                               TEGRA_PUPD_PULL_DOWN);
+       } else {
+               tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_DDC_SDA,
+                                               TEGRA_PUPD_NORMAL);
+               tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_DDC_SCL,
+                                               TEGRA_PUPD_NORMAL);
+       }
+}
+
+static struct tegra_dc_out loki_disp2_out = {
+       .type           = TEGRA_DC_OUT_HDMI,
+       .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
+       .parent_clk     = "pll_d2_out0",
+
+       .dcc_bus        = 3,
+       .hotplug_gpio   = loki_hdmi_hpd,
+
+       .max_pixclock   = KHZ2PICOS(297000),
+
+       .align          = TEGRA_DC_ALIGN_MSB,
+       .order          = TEGRA_DC_ORDER_RED_BLUE,
+
+       .enable         = loki_hdmi_enable,
+       .disable        = loki_hdmi_disable,
+       .postsuspend    = loki_hdmi_postsuspend,
+       .hotplug_init   = loki_hdmi_hotplug_init,
+       .hotplug_report = loki_hdmi_hotplug_report,
+};
+
+static struct tegra_fb_data loki_disp1_fb_data = {
+       .win            = 0,
+       .bits_per_pixel = 32,
+       .flags          = TEGRA_FB_FLIP_ON_PROBE,
+       .xres           = 720,
+       .yres           = 1280,
+};
+
+static struct tegra_dc_platform_data loki_disp1_pdata = {
+       .flags          = TEGRA_DC_FLAG_ENABLED,
+       .default_out    = &loki_disp1_out,
+       .fb             = &loki_disp1_fb_data,
+       .emc_clk_rate   = 204000000,
+#ifdef CONFIG_TEGRA_DC_CMU
+       .cmu_enable     = 1,
+       .cmu            = &loki_cmu,
+#endif
+};
+
+static struct tegra_fb_data loki_disp2_fb_data = {
+       .win            = 0,
+       .xres           = 1024,
+       .yres           = 600,
+       .bits_per_pixel = 32,
+       .flags          = TEGRA_FB_FLIP_ON_PROBE,
+};
+
+static struct tegra_dc_platform_data loki_disp2_pdata = {
+       .flags          = TEGRA_DC_FLAG_ENABLED,
+       .default_out    = &loki_disp2_out,
+       .fb             = &loki_disp2_fb_data,
+       .emc_clk_rate   = 300000000,
+#ifdef CONFIG_TEGRA_DC_CMU
+       .cmu_enable     = 1,
+#endif
+};
+
+static struct platform_device loki_disp2_device = {
+       .name           = "tegradc",
+       .id             = 1,
+       .resource       = loki_disp2_resources,
+       .num_resources  = ARRAY_SIZE(loki_disp2_resources),
+       .dev = {
+               .platform_data = &loki_disp2_pdata,
+       },
+};
+
+static struct platform_device loki_disp1_device = {
+       .name           = "tegradc",
+       .id             = 0,
+       .resource       = loki_disp1_resources,
+       .num_resources  = ARRAY_SIZE(loki_disp1_resources),
+       .dev = {
+               .platform_data = &loki_disp1_pdata,
+       },
+};
+
+static struct nvmap_platform_carveout loki_carveouts[] = {
+       [0] = {
+               .name           = "iram",
+               .usage_mask     = NVMAP_HEAP_CARVEOUT_IRAM,
+               .base           = TEGRA_IRAM_BASE + TEGRA_RESET_HANDLER_SIZE,
+               .size           = TEGRA_IRAM_SIZE - TEGRA_RESET_HANDLER_SIZE,
+               .buddy_size     = 0, /* no buddy allocation for IRAM */
+       },
+       [1] = {
+               .name           = "generic-0",
+               .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
+               .base           = 0, /* Filled in by loki_panel_init() */
+               .size           = 0, /* Filled in by loki_panel_init() */
+               .buddy_size     = SZ_32K,
+       },
+       [2] = {
+               .name           = "vpr",
+               .usage_mask     = NVMAP_HEAP_CARVEOUT_VPR,
+               .base           = 0, /* Filled in by loki_panel_init() */
+               .size           = 0, /* Filled in by loki_panel_init() */
+               .buddy_size     = SZ_32K,
+       },
+};
+
+static struct nvmap_platform_data loki_nvmap_data = {
+       .carveouts      = loki_carveouts,
+       .nr_carveouts   = ARRAY_SIZE(loki_carveouts),
+};
+
+static struct platform_device loki_nvmap_device = {
+       .name   = "tegra-nvmap",
+       .id     = -1,
+       .dev    = {
+               .platform_data = &loki_nvmap_data,
+       },
+};
+
+static int loki_disp1_bl_notify(struct device *unused, int brightness)
+{
+       int cur_sd_brightness = atomic_read(&sd_brightness);
+
+       /* SD brightness is a percentage */
+       brightness = (brightness * cur_sd_brightness) / 255;
+
+       /* Apply any backlight response curve */
+       if (brightness > 255)
+               pr_info("Error: Brightness > 255!\n");
+
+       return brightness;
+}
+
+static int loki_disp1_check_fb(struct device *dev, struct fb_info *info)
+{
+       return info->device == &loki_disp1_device.dev;
+}
+
+static struct platform_pwm_backlight_data loki_disp1_bl_data = {
+       .pwm_id         = 1,
+       .max_brightness = 255,
+       .dft_brightness = 77,
+       .pwm_period_ns  = 40000,
+       .pwm_gpio       = DSI_PANEL_BL_PWM,
+       .notify         = loki_disp1_bl_notify,
+       /* Only toggle backlight on fb blank notifications for disp1 */
+       .check_fb       = loki_disp1_check_fb,
+};
+
+static struct platform_device __maybe_unused
+               loki_disp1_bl_device = {
+       .name   = "pwm-backlight",
+       .id     = -1,
+       .dev    = {
+               .platform_data = &loki_disp1_bl_data,
+       },
+};
+
+static struct tegra_dc_sd_settings loki_sd_settings = {
+       .enable = 0, /* disabled by default. */
+       .use_auto_pwm = false,
+       .hw_update_delay = 0,
+       .bin_width = -1,
+       .aggressiveness = 1,
+       .use_vid_luma = false,
+       .phase_in_adjustments = 0,
+       .k_limit_enable = true,
+       .k_limit = 180,
+       .sd_window_enable = false,
+       .soft_clipping_enable = true,
+       /* Low soft clipping threshold to compensate for aggressive k_limit */
+       .soft_clipping_threshold = 128,
+       .smooth_k_enable = true,
+       .smooth_k_incr = 128,
+       /* Default video coefficients */
+       .coeff = {5, 9, 2},
+       .fc = {0, 0},
+       /* Immediate backlight changes */
+       .blp = {1024, 255},
+       /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
+       /* Default BL TF */
+       .bltf = {
+                       {
+                               {57, 65, 73, 82},
+                               {92, 103, 114, 125},
+                               {138, 150, 164, 178},
+                               {193, 208, 224, 241},
+                       },
+               },
+       /* Default LUT */
+       .lut = {
+                       {
+                               {255, 255, 255},
+                               {199, 199, 199},
+                               {153, 153, 153},
+                               {116, 116, 116},
+                               {85, 85, 85},
+                               {59, 59, 59},
+                               {36, 36, 36},
+                               {17, 17, 17},
+                               {0, 0, 0},
+                       },
+               },
+       .sd_brightness = &sd_brightness,
+       .bl_device_name = "pwm-backlight",
+};
+
+static struct platform_device __maybe_unused
+                       *loki_bl_device[] __initdata = {
+       &tegra_pwfm_device,
+       &loki_disp1_bl_device,
+};
+
+int __init loki_panel_init(int board_id)
+{
+       int err = 0;
+       struct resource __maybe_unused *res;
+       struct platform_device *phost1x = NULL;
+
+       sd_settings = loki_sd_settings;
+
+#ifdef CONFIG_TEGRA_NVMAP
+       loki_carveouts[1].base = tegra_carveout_start;
+       loki_carveouts[1].size = tegra_carveout_size;
+       loki_carveouts[2].base = tegra_vpr_start;
+       loki_carveouts[2].size = tegra_vpr_size;
+
+       err = platform_device_register(&loki_nvmap_device);
+       if (err) {
+               pr_err("nvmap device registration failed\n");
+               return err;
+       }
+#endif
+
+       phost1x = loki_host1x_init();
+       if (!phost1x) {
+               pr_err("host1x devices registration failed\n");
+               return -EINVAL;
+       }
+
+       res = platform_get_resource_byname(&loki_disp1_device,
+                                        IORESOURCE_MEM, "fbmem");
+       res->start = tegra_fb_start;
+       res->end = tegra_fb_start + tegra_fb_size - 1;
+
+       /* Copy the bootloader fb to the fb. */
+       __tegra_move_framebuffer(&loki_nvmap_device,
+               tegra_fb_start, tegra_bootloader_fb_start,
+                       min(tegra_fb_size, tegra_bootloader_fb_size));
+
+       res = platform_get_resource_byname(&loki_disp2_device,
+                                        IORESOURCE_MEM, "fbmem");
+       res->start = tegra_fb2_start;
+       res->end = tegra_fb2_start + tegra_fb2_size - 1;
+
+       /*
+        * only loki supports initialized mode.
+        */
+       if (!board_id)
+               loki_disp1_out.flags |= TEGRA_DC_OUT_INITIALIZED_MODE;
+
+       loki_disp1_device.dev.parent = &phost1x->dev;
+       err = platform_device_register(&loki_disp1_device);
+       if (err) {
+               pr_err("disp1 device registration failed\n");
+               return err;
+       }
+
+       loki_disp2_device.dev.parent = &phost1x->dev;
+       err = platform_device_register(&loki_disp2_device);
+       if (err) {
+               pr_err("disp2 device registration failed\n");
+               return err;
+       }
+
+#if IS_EXTERNAL_PWM
+       err = platform_add_devices(loki_bl_device,
+                               ARRAY_SIZE(loki_bl_device));
+       if (err) {
+               pr_err("disp1 bl device registration failed");
+               return err;
+       }
+#endif
+
+#ifdef CONFIG_TEGRA_NVAVP
+       nvavp_device.dev.parent = &phost1x->dev;
+       err = platform_device_register(&nvavp_device);
+       if (err) {
+               pr_err("nvavp device registration failed\n");
+               return err;
+       }
+#endif
+       return err;
+}
+#else
+int __init loki_panel_init(void)
+{
+       if (loki_host1x_init())
+               return 0;
+       else
+               return -EINVAL;
+}
+#endif
diff --git a/arch/arm/mach-tegra/board-loki-pinmux-t12x.h b/arch/arm/mach-tegra/board-loki-pinmux-t12x.h
new file mode 100644 (file)
index 0000000..71165d8
--- /dev/null
@@ -0,0 +1,333 @@
+/*
+ * arch/arm/mach-tegra/board-loki-pinmux-t12x.h
+ *
+ * Copyright (c) 2013, NVIDIA Corporation.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth floor, Boston, MA  02110-1301, USA
+ */
+
+
+/* DO NOT EDIT THIS FILE. THIS FILE IS AUTO GENERATED FROM T124_CUSTOMER_PINMUX.XLSM */
+
+
+static __initdata struct tegra_pingroup_config loki_pinmux_common[] = {
+
+       /* EXTPERIPH1 pinmux */
+       DEFAULT_PINMUX(DAP_MCLK1,     EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
+
+       /* I2S1 pinmux */
+       DEFAULT_PINMUX(DAP2_DIN,      I2S1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP2_DOUT,     I2S1,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DAP2_FS,       I2S1,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DAP2_SCLK,     I2S1,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* CLDVFS pinmux */
+       DEFAULT_PINMUX(DVFS_PWM,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DVFS_CLK,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+
+       /* SPI1 pinmux */
+       DEFAULT_PINMUX(ULPI_CLK,      SPI1,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(ULPI_DIR,      SPI1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_NXT,      SPI1,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(ULPI_STP,      SPI1,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* I2C2 pinmux */
+       I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+       I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+
+       /* UARTD pinmux */
+       DEFAULT_PINMUX(GPIO_PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(GPIO_PB0,      UARTD,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(GPIO_PB1,      UARTD,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(GPIO_PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+
+       /* SPI4 pinmux */
+       DEFAULT_PINMUX(GPIO_PG4,      SPI4,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(GPIO_PG5,      SPI4,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(GPIO_PG6,      SPI4,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(GPIO_PG7,      SPI4,        NORMAL,    NORMAL,   INPUT),
+
+       /* PWM1 pinmux */
+       DEFAULT_PINMUX(GPIO_PH1,      PWM1,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* EXTPERIPH2 pinmux */
+       DEFAULT_PINMUX(CLK2_OUT,      EXTPERIPH2,  NORMAL,    NORMAL,   OUTPUT),
+
+       /* SDMMC1 pinmux */
+       DEFAULT_PINMUX(SDMMC1_CLK,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_CMD,    SDMMC1,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT0,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT1,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT2,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT3,   SDMMC1,      PULL_UP,   NORMAL,   INPUT),
+
+       /* SDMMC3 pinmux */
+       DEFAULT_PINMUX(SDMMC3_CLK,    SDMMC3,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(SDMMC3_CMD,    SDMMC3,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT0,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT1,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT2,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT3,   SDMMC3,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3,      PULL_UP,   NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CD_N,   SDMMC3,      NORMAL,    NORMAL,   INPUT),
+
+       /* SDMMC4 pinmux */
+       DEFAULT_PINMUX(SDMMC4_CLK,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_CMD,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT0,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT1,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT2,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT3,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT4,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT5,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT6,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT7,   SDMMC4,      NORMAL,    NORMAL,   INPUT),
+
+       /* PWM2 pinmux */
+       DEFAULT_PINMUX(KB_COL3,       PWM2,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* BLINK pinmux */
+       DEFAULT_PINMUX(CLK_32K_OUT,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
+
+       /* I2CPWR pinmux */
+       I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+
+       /* RTCK pinmux */
+       DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* CLK pinmux */
+       DEFAULT_PINMUX(CLK_32K_IN,    CLK,         NORMAL,    NORMAL,   INPUT),
+
+       /* PWRON pinmux */
+       DEFAULT_PINMUX(CORE_PWR_REQ,  PWRON,       NORMAL,    NORMAL,   OUTPUT),
+
+       /* CPU pinmux */
+       DEFAULT_PINMUX(CPU_PWR_REQ,   CPU,         NORMAL,    NORMAL,   OUTPUT),
+
+       /* PMI pinmux */
+       DEFAULT_PINMUX(PWR_INT_N,     PMI,         NORMAL,    NORMAL,   INPUT),
+
+       /* RESET_OUT_N pinmux */
+       DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
+
+       /* I2S3 pinmux */
+       DEFAULT_PINMUX(DAP4_DIN,      I2S3,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP4_DOUT,     I2S3,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DAP4_FS,       I2S3,        NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DAP4_SCLK,     I2S3,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* I2C1 pinmux */
+       I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+       I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+
+       /* PWM0 pinmux */
+       DEFAULT_PINMUX(GPIO_PU3,      PWM0,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* UARTB pinmux */
+       DEFAULT_PINMUX(UART2_CTS_N,   UARTB,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(UART2_RTS_N,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
+
+       /* IRDA pinmux */
+       DEFAULT_PINMUX(UART2_RXD,     IRDA,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(UART2_TXD,     IRDA,        NORMAL,    NORMAL,   OUTPUT),
+
+       /* UARTC pinmux */
+       DEFAULT_PINMUX(UART3_CTS_N,   UARTC,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(UART3_RTS_N,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(UART3_RXD,     UARTC,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(UART3_TXD,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
+
+       /* CEC pinmux */
+       CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
+
+       /* I2C4 pinmux */
+       DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+       DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+
+       /* GPIO pinmux */
+       GPIO_PINMUX(GPIO_X6_AUD, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_X7_AUD, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_W3_AUD, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_X1_AUD, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PG0, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PG1, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH2, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH3, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH5, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH6, NORMAL, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH7, NORMAL, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PG2, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PG3, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PH0, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PK0, PULL_UP, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PK1, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PJ0, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PJ2, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PK3, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PK4, PULL_UP, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PK2, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI3, NORMAL, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI6, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI5, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI1, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI4, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI7, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PC7, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PI0, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(CLK2_REQ, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(SDMMC1_WP_N, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(KB_COL0, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_COL5, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW0, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW1, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW12, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW13, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW15, PULL_DOWN, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW2, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW4, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW5, PULL_UP, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW6, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW7, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(KB_ROW8, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(CLK3_REQ, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PU1, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PU2, NORMAL, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PU4, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PU5, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(GPIO_PU6, PULL_UP, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(HDMI_INT, PULL_DOWN, NORMAL, INPUT, DISABLE),
+       GPIO_PINMUX(SPDIF_OUT, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+       GPIO_PINMUX(SPDIF_IN, PULL_DOWN, NORMAL, OUTPUT, DISABLE),
+};
+
+static __initdata struct tegra_pingroup_config unused_pins_lowpower[] = {
+       UNUSED_PINMUX(DAP_MCLK1_REQ),
+       UNUSED_PINMUX(DAP1_DIN),
+       UNUSED_PINMUX(DAP1_DOUT),
+       UNUSED_PINMUX(DAP1_FS),
+       UNUSED_PINMUX(DAP1_SCLK),
+       UNUSED_PINMUX(GPIO_X4_AUD),
+       UNUSED_PINMUX(GPIO_X5_AUD),
+       UNUSED_PINMUX(GPIO_W2_AUD),
+       UNUSED_PINMUX(GPIO_X3_AUD),
+       UNUSED_PINMUX(DAP3_DIN),
+       UNUSED_PINMUX(DAP3_DOUT),
+       UNUSED_PINMUX(DAP3_FS),
+       UNUSED_PINMUX(DAP3_SCLK),
+       UNUSED_PINMUX(GPIO_PV0),
+       UNUSED_PINMUX(GPIO_PV1),
+       UNUSED_PINMUX(ULPI_DATA0),
+       UNUSED_PINMUX(ULPI_DATA1),
+       UNUSED_PINMUX(ULPI_DATA2),
+       UNUSED_PINMUX(ULPI_DATA3),
+       UNUSED_PINMUX(ULPI_DATA4),
+       UNUSED_PINMUX(ULPI_DATA5),
+       UNUSED_PINMUX(ULPI_DATA6),
+       UNUSED_PINMUX(ULPI_DATA7),
+       UNUSED_PINMUX(CAM_I2C_SCL),
+       UNUSED_PINMUX(CAM_I2C_SDA),
+       VI_PINMUX(CAM_MCLK, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DISABLE),
+       UNUSED_PINMUX(GPIO_PBB0),
+       UNUSED_PINMUX(GPIO_PBB3),
+       UNUSED_PINMUX(GPIO_PBB4),
+       UNUSED_PINMUX(GPIO_PBB5),
+       UNUSED_PINMUX(GPIO_PBB6),
+       UNUSED_PINMUX(GPIO_PBB7),
+       UNUSED_PINMUX(GPIO_PCC1),
+       UNUSED_PINMUX(GPIO_PCC2),
+       UNUSED_PINMUX(GPIO_PH4),
+       UNUSED_PINMUX(GPIO_PI2),
+       UNUSED_PINMUX(PEX_L0_CLKREQ_N),
+       UNUSED_PINMUX(PEX_L0_RST_N),
+       UNUSED_PINMUX(PEX_L1_CLKREQ_N),
+       UNUSED_PINMUX(PEX_L1_RST_N),
+       UNUSED_PINMUX(PEX_WAKE_N),
+       UNUSED_PINMUX(USB_VBUS_EN2),
+       UNUSED_PINMUX(GPIO_PFF2),
+       UNUSED_PINMUX(KB_COL1),
+       UNUSED_PINMUX(KB_COL2),
+       UNUSED_PINMUX(KB_COL4),
+       UNUSED_PINMUX(KB_COL6),
+       UNUSED_PINMUX(KB_COL7),
+       UNUSED_PINMUX(KB_ROW10),
+       UNUSED_PINMUX(KB_ROW11),
+       UNUSED_PINMUX(KB_ROW14),
+       UNUSED_PINMUX(KB_ROW16),
+       UNUSED_PINMUX(KB_ROW17),
+       UNUSED_PINMUX(KB_ROW3),
+       UNUSED_PINMUX(KB_ROW9),
+       UNUSED_PINMUX(CLK3_OUT),
+       UNUSED_PINMUX(GPIO_PU0),
+       UNUSED_PINMUX(OWR),
+       UNUSED_PINMUX(USB_VBUS_EN0),
+       UNUSED_PINMUX(USB_VBUS_EN1),
+};
+
+static struct gpio_init_pin_info init_gpio_mode_loki_common[] = {
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PX6, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PX7, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PW3, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PX1, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PG0, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PG1, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH2, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH3, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH5, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH6, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH7, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PG2, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PG3, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PH0, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK0, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK1, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PJ0, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PJ2, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK3, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK4, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK2, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI3, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI6, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI5, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI1, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI4, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI7, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PC7, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PI0, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PCC5, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PV3, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ0, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PQ5, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR0, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR1, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS4, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS5, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS7, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR2, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR4, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR5, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR6, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PR7, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PS0, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PEE1, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU1, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU2, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU4, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU5, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU6, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PN7, true, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK5, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK6, false, 0),
+};
diff --git a/arch/arm/mach-tegra/board-loki-pinmux.c b/arch/arm/mach-tegra/board-loki-pinmux.c
new file mode 100644 (file)
index 0000000..68e5f8c
--- /dev/null
@@ -0,0 +1,75 @@
+/*
+ * arch/arm/mach-tegra/board-loki-pinmux.c
+ *
+ * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <mach/pinmux.h>
+#include <mach/gpio-tegra.h>
+
+#include "board.h"
+#include "board-loki.h"
+#include "devices.h"
+#include "gpio-names.h"
+
+#include <mach/pinmux-t12.h>
+
+static __initdata struct tegra_drive_pingroup_config loki_drive_pinmux[] = {
+       /*Set DAP2 drive (required for Codec Master Mode)*/
+       SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 51, 51, FASTEST, FASTEST),
+
+       /* SDMMC1 */
+       SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 54, 70, FASTEST, FASTEST),
+
+       /* SDMMC3 */
+       SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 20, 42, FASTEST, FASTEST),
+
+       /* SDMMC4 */
+       SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 1, 2, FASTEST,
+                                                               FASTEST, 1),
+};
+
+
+#include "board-loki-pinmux-t12x.h"
+
+static void __init loki_gpio_init_configure(void)
+{
+       int len;
+       int i;
+       struct gpio_init_pin_info *pins_info;
+
+       len = ARRAY_SIZE(init_gpio_mode_loki_common);
+       pins_info = init_gpio_mode_loki_common;
+
+       for (i = 0; i < len; ++i) {
+               tegra_gpio_init_configure(pins_info->gpio_nr,
+                       pins_info->is_input, pins_info->value);
+               pins_info++;
+       }
+}
+
+int __init loki_pinmux_init(void)
+{
+       loki_gpio_init_configure();
+
+       tegra_pinmux_config_table(loki_pinmux_common, ARRAY_SIZE(loki_pinmux_common));
+       tegra_drive_pinmux_config_table(loki_drive_pinmux,
+                                       ARRAY_SIZE(loki_drive_pinmux));
+       tegra_pinmux_config_table(unused_pins_lowpower,
+               ARRAY_SIZE(unused_pins_lowpower));
+
+       return 0;
+}
diff --git a/arch/arm/mach-tegra/board-loki-power.c b/arch/arm/mach-tegra/board-loki-power.c
new file mode 100644 (file)
index 0000000..559cacd
--- /dev/null
@@ -0,0 +1,544 @@
+/*
+ * arch/arm/mach-tegra/board-loki-power.c
+ *
+ * Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/resource.h>
+#include <linux/io.h>
+#include <linux/regulator/fixed.h>
+#include <linux/mfd/palmas.h>
+#include <linux/regulator/machine.h>
+#include <linux/irq.h>
+
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+
+
+#include <asm/mach-types.h>
+
+#include "pm.h"
+#include "board.h"
+#include "tegra-board-id.h"
+#include "board-common.h"
+#include "board-loki.h"
+#include "board-pmu-defines.h"
+#include "devices.h"
+#include "iomap.h"
+#include "tegra-board-id.h"
+
+#define PMC_CTRL                0x0
+#define PMC_CTRL_INTR_LOW       (1 << 17)
+
+static struct regulator_consumer_supply palmas_smps123_supply[] = {
+       REGULATOR_SUPPLY("vdd_gpu", NULL),
+};
+
+static struct regulator_consumer_supply palmas_smps45_supply[] = {
+       REGULATOR_SUPPLY("vdd_core", NULL),
+};
+
+static struct regulator_consumer_supply palmas_smps6_supply[] = {
+       REGULATOR_SUPPLY("vdd_3v3_sys", NULL),
+};
+
+static struct regulator_consumer_supply palmas_smps7_supply[] = {
+       REGULATOR_SUPPLY("vddio_ddr", NULL),
+       REGULATOR_SUPPLY("vddio_ddr_mclk", NULL),
+       REGULATOR_SUPPLY("vddio_ddr_hs", NULL),
+};
+
+static struct regulator_consumer_supply palmas_smps8_supply[] = {
+       REGULATOR_SUPPLY("dbvdd", "tegra-snd-rt5639.0"),
+       REGULATOR_SUPPLY("dbvdd", "tegra-snd-rt5645.0"),
+       REGULATOR_SUPPLY("avdd", "tegra-snd-rt5639.0"),
+       REGULATOR_SUPPLY("avdd", "tegra-snd-rt5645.0"),
+       REGULATOR_SUPPLY("dmicvdd", "tegra-snd-rt5639.0"),
+       REGULATOR_SUPPLY("dmicvdd", "tegra-snd-rt5645.0"),
+       REGULATOR_SUPPLY("avdd_osc", NULL),
+       REGULATOR_SUPPLY("vddio_sys", NULL),
+       REGULATOR_SUPPLY("vddio_sys_2", NULL),
+       REGULATOR_SUPPLY("vddio_gmi", NULL),
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
+       REGULATOR_SUPPLY("avdd_pll_utmip", "tegra-udc.0"),
+       REGULATOR_SUPPLY("avdd_pll_utmip", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("avdd_pll_utmip", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("avdd_pll_utmip", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("avdd_pll_utmip", "tegra-xhci"),
+       REGULATOR_SUPPLY("vddio_audio", NULL),
+       REGULATOR_SUPPLY("vddio_uart", NULL),
+       REGULATOR_SUPPLY("vddio_bb", NULL),
+       REGULATOR_SUPPLY("vdd_1v8b", "0-0048"),
+       REGULATOR_SUPPLY("vdd_dtv", NULL),
+       REGULATOR_SUPPLY("vdd_1v8_eeprom", NULL),
+       REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
+       REGULATOR_SUPPLY("vddio_cam", "vi"),
+       REGULATOR_SUPPLY("vlogic", "0-0069"),
+       REGULATOR_SUPPLY("vid", "0-000c"),
+       REGULATOR_SUPPLY("vddio", "0-0077"),
+       REGULATOR_SUPPLY("dvdd_lcd", NULL),
+       REGULATOR_SUPPLY("vdd_lcd_1v8_s", NULL),
+};
+
+static struct regulator_consumer_supply palmas_smps9_supply[] = {
+       REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.3"),
+};
+
+static struct regulator_consumer_supply palmas_smps10_supply[] = {
+       REGULATOR_SUPPLY("vdd_5v0_cam", NULL),
+       REGULATOR_SUPPLY("spkvdd", "tegra-snd-rt5639.0"),
+       REGULATOR_SUPPLY("spkvdd", "tegra-snd-rt5645.0"),
+};
+
+static struct regulator_consumer_supply palmas_ldo1_supply[] = {
+       REGULATOR_SUPPLY("avdd_pll_m", NULL),
+       REGULATOR_SUPPLY("avdd_pll_ap_c2_c3", NULL),
+       REGULATOR_SUPPLY("avdd_pll_cud2dpd", NULL),
+       REGULATOR_SUPPLY("avdd_pll_c4", NULL),
+       REGULATOR_SUPPLY("avdd_lvds0_io", NULL),
+       REGULATOR_SUPPLY("vddio_ddr_hs", NULL),
+       REGULATOR_SUPPLY("avdd_pll_erefe", NULL),
+       REGULATOR_SUPPLY("avdd_pll_x", NULL),
+       REGULATOR_SUPPLY("avdd_pll_cg", NULL),
+       REGULATOR_SUPPLY("avdd_pex_pll", "tegra-pcie"),
+       REGULATOR_SUPPLY("avddio_pex", "tegra-pcie"),
+       REGULATOR_SUPPLY("dvddio_pex", "tegra-pcie"),
+       REGULATOR_SUPPLY("avddio_usb", "tegra-xhci"),
+};
+
+static struct regulator_consumer_supply palmas_ldo2_supply[] = {
+       REGULATOR_SUPPLY("vdd", "0-0069"),
+       REGULATOR_SUPPLY("avdd_lcd", "0-0069"),
+};
+
+static struct regulator_consumer_supply palmas_ldo3_supply[] = {
+       REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
+       REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
+       REGULATOR_SUPPLY("avdd_dsi_csi", "vi"),
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("vddio_hsic", "tegra-xhci"),
+};
+
+static struct regulator_consumer_supply palmas_ldo4_supply[] = {
+       REGULATOR_SUPPLY("vpp_fuse", NULL),
+};
+
+static struct regulator_consumer_supply palmas_ldo5_supply[] = {
+       REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
+};
+
+static struct regulator_consumer_supply palmas_ldo6_supply[] = {
+       REGULATOR_SUPPLY("vdd_snsr", NULL),
+       REGULATOR_SUPPLY("vdd", "0-000c"),
+       REGULATOR_SUPPLY("vdd", "0-0077"),
+       REGULATOR_SUPPLY("vdd", "1-004c"),
+};
+
+static struct regulator_consumer_supply palmas_ldo8_supply[] = {
+       REGULATOR_SUPPLY("vdd_rtc", NULL),
+};
+
+static struct regulator_consumer_supply palmas_ldo9_supply[] = {
+       REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
+       REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
+};
+
+static struct regulator_consumer_supply palmas_ldousb_supply[] = {
+       REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
+       REGULATOR_SUPPLY("vddio_pex_ctl", "tegra-pcie"),
+       REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
+       REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
+       REGULATOR_SUPPLY("hvdd_usb", "tegra-xhci"),
+       REGULATOR_SUPPLY("hvdd_pex", "tegra-pcie"),
+       REGULATOR_SUPPLY("hvdd_pex_pll_e", "tegra-pcie"),
+};
+
+static struct regulator_consumer_supply palmas_ldoln_supply[] = {
+       /*
+       Check if LDOLN has better jitter on HDMI pll, than LDO5
+       */
+};
+
+static struct regulator_consumer_supply palmas_regen1_supply[] = {
+       /*
+       Backup/Boost for smps6: vdd_3v3_sys
+       */
+};
+
+static struct regulator_consumer_supply palmas_regen2_supply[] = {
+       /*
+       Backup/Boost for smps10: vdd_5v0_sys
+       */
+};
+
+PALMAS_REGS_PDATA(smps123, 900,  1300, NULL, 0, 0, 0, NORMAL,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(smps45, 900,  1400, NULL, 0, 0, 0, NORMAL,
+               0, PALMAS_EXT_CONTROL_NSLEEP, 0, 2500, 0);
+PALMAS_REGS_PDATA(smps6, 3300,  3300, NULL, 1, 1, 1, NORMAL,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(smps7, 1050,  1050, NULL, 1, 1, 1, NORMAL,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(smps8, 1800,  1800, NULL, 1, 1, 1, NORMAL,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(smps9, 2800,  2800, NULL, 0, 0, 1, NORMAL,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(smps10, 5000,  5000, NULL, 1, 1, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo1, 1050,  1050, palmas_rails(smps7), 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo2, 2800,  2800, NULL, 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo3, 1200,  1200, palmas_rails(smps8), 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo4, 1200,  1200, NULL, 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo5, 2800,  3000, NULL, 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo6, 2800,  3300, palmas_rails(smps6), 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo8, 900,  900, NULL, 1, 1, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo9, 1800,  3300, palmas_rails(smps6), 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldoln, 2800, 3300, NULL, 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldousb, 2300,  3300, NULL, 0, 0, 1, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(regen1, 3300,  3300, NULL, 0, 0, 0, 0,
+               0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(regen2, 5000,  5000, NULL, 1, 1, 0, 0,
+               0, 0, 0, 0, 0);
+
+
+#define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
+static struct regulator_init_data *loki_reg_data[PALMAS_NUM_REGS] = {
+       NULL,
+       PALMAS_REG_PDATA(smps123),
+       NULL,
+       PALMAS_REG_PDATA(smps45),
+       NULL,
+       PALMAS_REG_PDATA(smps6),
+       PALMAS_REG_PDATA(smps7),
+       PALMAS_REG_PDATA(smps8),
+       PALMAS_REG_PDATA(smps9),
+       PALMAS_REG_PDATA(smps10),
+       PALMAS_REG_PDATA(ldo1),
+       PALMAS_REG_PDATA(ldo2),
+       PALMAS_REG_PDATA(ldo3),
+       PALMAS_REG_PDATA(ldo4),
+       PALMAS_REG_PDATA(ldo5),
+       PALMAS_REG_PDATA(ldo6),
+       NULL,
+       PALMAS_REG_PDATA(ldo8),
+       PALMAS_REG_PDATA(ldo9),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       PALMAS_REG_PDATA(ldoln),
+       PALMAS_REG_PDATA(ldousb),
+       PALMAS_REG_PDATA(regen1),
+       PALMAS_REG_PDATA(regen2),
+       NULL,
+       NULL,
+       NULL,
+};
+
+#define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
+static struct palmas_reg_init *loki_reg_init[PALMAS_NUM_REGS] = {
+       NULL,
+       PALMAS_REG_INIT_DATA(smps123),
+       NULL,
+       PALMAS_REG_INIT_DATA(smps45),
+       NULL,
+       PALMAS_REG_INIT_DATA(smps6),
+       PALMAS_REG_INIT_DATA(smps7),
+       PALMAS_REG_INIT_DATA(smps8),
+       PALMAS_REG_INIT_DATA(smps9),
+       PALMAS_REG_INIT_DATA(smps10),
+       PALMAS_REG_INIT_DATA(ldo1),
+       PALMAS_REG_INIT_DATA(ldo2),
+       PALMAS_REG_INIT_DATA(ldo3),
+       PALMAS_REG_INIT_DATA(ldo4),
+       PALMAS_REG_INIT_DATA(ldo5),
+       PALMAS_REG_INIT_DATA(ldo6),
+       NULL,
+       PALMAS_REG_INIT_DATA(ldo8),
+       PALMAS_REG_INIT_DATA(ldo9),
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       NULL,
+       PALMAS_REG_INIT_DATA(ldoln),
+       PALMAS_REG_INIT_DATA(ldousb),
+       PALMAS_REG_INIT_DATA(regen1),
+       PALMAS_REG_INIT_DATA(regen2),
+       NULL,
+       NULL,
+       NULL,
+};
+
+static struct palmas_pinctrl_config palmas_pincfg[] = {
+       PALMAS_PINMUX(POWERGOOD, POWERGOOD, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(VAC, VAC, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO0, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO1, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO2, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO3, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO4, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO5, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO6, GPIO, DEFAULT, DEFAULT),
+       PALMAS_PINMUX(GPIO7, GPIO, DEFAULT, DEFAULT),
+};
+
+static struct palmas_pinctrl_platform_data palmas_pinctrl_pdata = {
+       .pincfg = palmas_pincfg,
+       .num_pinctrl = ARRAY_SIZE(palmas_pincfg),
+       .dvfs1_enable = true,
+       .dvfs2_enable = false,
+};
+
+static struct palmas_pmic_platform_data pmic_platform = {
+};
+
+static struct palmas_clk32k_init_data palmas_clk32k_idata[] = {
+       {
+               .clk32k_id = PALMAS_CLOCK32KG,
+               .enable = true,
+       }, {
+               .clk32k_id = PALMAS_CLOCK32KG_AUDIO,
+               .enable = true,
+       },
+};
+
+static struct palmas_platform_data palmas_pdata = {
+       .gpio_base = PALMAS_TEGRA_GPIO_BASE,
+       .irq_base = PALMAS_TEGRA_IRQ_BASE,
+       .pmic_pdata = &pmic_platform,
+       .use_power_off = true,
+       .pinctrl_pdata = &palmas_pinctrl_pdata,
+       .clk32k_init_data =  palmas_clk32k_idata,
+       .clk32k_init_data_size = ARRAY_SIZE(palmas_clk32k_idata),
+};
+
+static struct i2c_board_info palma_device[] = {
+       {
+               I2C_BOARD_INFO("tps65913", 0x58),
+               .irq            = INT_EXTERNAL_PMU,
+               .platform_data  = &palmas_pdata,
+       },
+};
+
+static struct tegra_suspend_platform_data loki_suspend_data = {
+       .cpu_timer      = 500,
+       .cpu_off_timer  = 300,
+       .suspend_mode   = TEGRA_SUSPEND_LP0,
+       .core_timer     = 0x157e,
+       .core_off_timer = 2000,
+       .corereq_high   = true,
+       .sysclkreq_high = true,
+       .cpu_lp2_min_residency = 1000,
+       .min_residency_crail = 20000,
+};
+
+int __init loki_suspend_init(void)
+{
+       struct board_info pmu_board_info;
+
+       tegra_get_pmu_board_info(&pmu_board_info);
+
+       if (pmu_board_info.board_id == BOARD_E1735)
+               loki_suspend_data.cpu_timer = 2500;
+
+       tegra_init_suspend(&loki_suspend_data);
+       return 0;
+}
+
+
+int __init loki_regulator_init(void)
+{
+       void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+       u32 pmc_ctrl;
+       int i;
+
+       /* TPS65913: Normal state of INT request line is LOW.
+        * configure the power management controller to trigger PMU
+        * interrupts when HIGH.
+        */
+       pmc_ctrl = readl(pmc + PMC_CTRL);
+       writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+       for (i = 0; i < PALMAS_NUM_REGS ; i++) {
+               pmic_platform.reg_data[i] = loki_reg_data[i];
+               pmic_platform.reg_init[i] = loki_reg_init[i];
+       }
+       /* Set vdd_gpu init uV to 1V */
+       reg_idata_smps123.constraints.init_uV = 1000000;
+
+       i2c_register_board_info(4, palma_device,
+                       ARRAY_SIZE(palma_device));
+       return 0;
+}
+/* Macro for defining fixed regulator sub device data */
+#define FIXED_SUPPLY(_name) "fixed_reg_en_"#_name
+#define FIXED_REG(_id, _var, _name, _in_supply,                        \
+       _always_on, _boot_on, _gpio_nr, _open_drain,            \
+       _active_high, _boot_state, _millivolts, _sdelay)        \
+static struct regulator_init_data ri_data_##_var =             \
+{                                                              \
+       .supply_regulator = _in_supply,                         \
+       .num_consumer_supplies =                                \
+       ARRAY_SIZE(fixed_reg_en_##_name##_supply),              \
+       .consumer_supplies = fixed_reg_en_##_name##_supply,     \
+       .constraints = {                                        \
+               .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
+                               REGULATOR_MODE_STANDBY),        \
+               .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
+                               REGULATOR_CHANGE_STATUS |       \
+                               REGULATOR_CHANGE_VOLTAGE),      \
+               .always_on = _always_on,                        \
+               .boot_on = _boot_on,                            \
+       },                                                      \
+};                                                             \
+static struct fixed_voltage_config fixed_reg_en_##_var##_pdata =       \
+{                                                              \
+       .supply_name = FIXED_SUPPLY(_name),                     \
+       .microvolts = _millivolts * 1000,                       \
+       .gpio = _gpio_nr,                                       \
+       .gpio_is_open_drain = _open_drain,                      \
+       .enable_high = _active_high,                            \
+       .enabled_at_boot = _boot_state,                         \
+       .init_data = &ri_data_##_var,                           \
+       .startup_delay = _sdelay                                \
+};                                                             \
+static struct platform_device fixed_reg_en_##_var##_dev = {    \
+       .name = "reg-fixed-voltage",                            \
+       .id = _id,                                              \
+       .dev = {                                                \
+               .platform_data = &fixed_reg_en_##_var##_pdata,  \
+       },                                                      \
+}
+
+/* Always ON Battery regulator */
+static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
+               REGULATOR_SUPPLY("vdd_sys_bl", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_modem_3v3_supply[] = {
+       REGULATOR_SUPPLY("vdd_wwan_mdm", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_hdmi_5v0_supply[] = {
+       REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_sd_slot_supply[] = {
+       REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_1v8_ts_supply[] = {
+       REGULATOR_SUPPLY("dvdd", "spi0.0"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_3v3_ts_supply[] = {
+       REGULATOR_SUPPLY("avdd", "spi0.0"),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_1v8_display_supply[] = {
+       REGULATOR_SUPPLY("vdd_lcd_1v8_s", NULL),
+};
+
+static struct regulator_consumer_supply fixed_reg_en_vdd_cpu_fixed_supply[] = {
+       REGULATOR_SUPPLY("vdd_cpu_fixed", NULL),
+};
+
+FIXED_REG(0,   battery,        battery,        NULL,
+       0,      0,      -1,
+       false,  true,   0,      3300, 0);
+
+FIXED_REG(1,   modem_3v3,      modem_3v3,      palmas_rails(smps10),
+       0,      0,      TEGRA_GPIO_PS2,
+       false,  true,   0,      3700,   0);
+
+FIXED_REG(2,   vdd_hdmi_5v0,   vdd_hdmi_5v0,   palmas_rails(smps6),
+       0,      0,      TEGRA_GPIO_PS5,
+       false,  true,   0,      5000,   5000);
+
+FIXED_REG(3,   vdd_sd_slot,    vdd_sd_slot,    palmas_rails(smps6),
+       0,      0,      TEGRA_GPIO_PR0,
+       false,  true,   0,      3300,   0);
+
+FIXED_REG(4,   1v8_ts, 1v8_ts, palmas_rails(smps8),
+       0,      0,      TEGRA_GPIO_PK1,
+       false,  true,   0,      1800,   0);
+
+FIXED_REG(5,   3v3_ts, 3v3_ts, palmas_rails(smps6),
+       0,      0,      TEGRA_GPIO_PH0,
+       false,  true,   0,      3300,   0);
+
+FIXED_REG(6,   1v8_display,    1v8_display,    palmas_rails(smps8),
+       0,      0,      TEGRA_GPIO_PU4,
+       false,  true,   0,      1800,   0);
+
+FIXED_REG(7,   vdd_cpu_fixed,  vdd_cpu_fixed,  NULL,
+       0,      1,      -1,
+       false,  true,   0,      1000,   0);
+
+/*
+ * Creating fixed regulator device tables
+ */
+#define ADD_FIXED_REG(_name)    (&fixed_reg_en_##_name##_dev)
+#define LOKI_E2545_FIXED_REG           \
+       ADD_FIXED_REG(battery),         \
+       ADD_FIXED_REG(modem_3v3),       \
+       ADD_FIXED_REG(vdd_hdmi_5v0),    \
+       ADD_FIXED_REG(vdd_sd_slot),     \
+       ADD_FIXED_REG(1v8_ts),          \
+       ADD_FIXED_REG(3v3_ts),          \
+       ADD_FIXED_REG(1v8_display),     \
+       ADD_FIXED_REG(vdd_cpu_fixed),
+
+
+static struct platform_device *fixed_reg_devs_e2545[] = {
+       LOKI_E2545_FIXED_REG
+};
+
+static int __init loki_fixed_regulator_init(void)
+{
+       struct board_info pmu_board_info;
+
+       if (!of_machine_is_compatible("nvidia,loki"))
+               return 0;
+
+       tegra_get_pmu_board_info(&pmu_board_info);
+
+       if (pmu_board_info.board_id == BOARD_E2545)
+               return platform_add_devices(fixed_reg_devs_e2545,
+                       ARRAY_SIZE(fixed_reg_devs_e2545));
+
+       return 0;
+}
+
+subsys_initcall_sync(loki_fixed_regulator_init);
diff --git a/arch/arm/mach-tegra/board-loki-powermon.c b/arch/arm/mach-tegra/board-loki-powermon.c
new file mode 100644 (file)
index 0000000..54564c2
--- /dev/null
@@ -0,0 +1,88 @@
+/*
+ * arch/arm/mach-tegra/board-loki-powermon.c
+ *
+ * Copyright (c) 2013, NVIDIA Corporation. All Rights Reserved.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include <linux/i2c.h>
+#include <linux/ina3221.h>
+
+#include "board.h"
+#include "board-loki.h"
+
+enum {
+       VDD_CPU_BAT_VBUS,
+       VDD_DDR_SOC_GPU,
+       VDD_3V3_EMMC_MDM,
+};
+
+static struct ina3221_platform_data power_mon_info[] = {
+       [VDD_CPU_BAT_VBUS] = {
+               .rail_name = {"VDD_CPU", "VDD_BAT",
+                                                       "VDD_VBUS"},
+               .shunt_resistor = {20, 20, 20},
+               .cont_conf_data = INA3221_CONT_CONFIG_DATA,
+               .trig_conf_data = INA3221_TRIG_CONFIG_DATA,
+       },
+       [VDD_DDR_SOC_GPU] = {
+               .rail_name = {"VDD_DDR", "VDD_SOC",
+                                                       "VDD_GPU"},
+               .shunt_resistor = {20, 20, 20},
+               .cont_conf_data = INA3221_CONT_CONFIG_DATA,
+               .trig_conf_data = INA3221_TRIG_CONFIG_DATA,
+       },
+       [VDD_3V3_EMMC_MDM] = {
+               .rail_name = {"VDD_3V3_SYS", "VDD_EMMC",
+                                                       "VDD_MDM"},
+               .shunt_resistor = {20, 20, 20},
+               .cont_conf_data = INA3221_CONT_CONFIG_DATA,
+               .trig_conf_data = INA3221_TRIG_CONFIG_DATA,
+       },
+};
+
+enum {
+       INA_I2C_ADDR_40,
+       INA_I2C_ADDR_41,
+       INA_I2C_ADDR_42,
+};
+
+static struct i2c_board_info loki_i2c1_ina3221_board_info[] = {
+       [INA_I2C_ADDR_40] = {
+               I2C_BOARD_INFO("ina3221", 0x40),
+               .platform_data = &power_mon_info[VDD_CPU_BAT_VBUS],
+               .irq = -1,
+       },
+       [INA_I2C_ADDR_41] = {
+               I2C_BOARD_INFO("ina3221", 0x41),
+               .platform_data = &power_mon_info[VDD_DDR_SOC_GPU],
+               .irq = -1,
+       },
+       [INA_I2C_ADDR_42] = {
+               I2C_BOARD_INFO("ina3221", 0x42),
+               .platform_data = &power_mon_info[VDD_3V3_EMMC_MDM],
+               .irq = -1,
+       },
+};
+
+int __init loki_pmon_init(void)
+{
+       pr_info("INA3221: registering device\n");
+       i2c_register_board_info(2, loki_i2c1_ina3221_board_info,
+               ARRAY_SIZE(loki_i2c1_ina3221_board_info));
+
+       return 0;
+}
diff --git a/arch/arm/mach-tegra/board-loki-sdhci.c b/arch/arm/mach-tegra/board-loki-sdhci.c
new file mode 100644 (file)
index 0000000..d63a220
--- /dev/null
@@ -0,0 +1,303 @@
+/*
+ * arch/arm/mach-tegra/board-loki-sdhci.c
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/resource.h>
+#include <linux/platform_device.h>
+#include <linux/wlan_plat.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/mmc/host.h>
+#include <linux/wl12xx.h>
+#include <linux/platform_data/mmc-sdhci-tegra.h>
+#include <linux/mfd/max77660/max77660-core.h>
+
+#include <asm/mach-types.h>
+#include <mach/irqs.h>
+#include <mach/gpio-tegra.h>
+
+#include "gpio-names.h"
+#include "board.h"
+#include "board-loki.h"
+#include "iomap.h"
+
+#define LOKI_WLAN_RST  TEGRA_GPIO_PCC5
+#define LOKI_WLAN_PWR  TEGRA_GPIO_PX7
+#define LOKI_WLAN_WOW  TEGRA_GPIO_PU5
+
+#define LOKI_SD_CD     TEGRA_GPIO_PV2
+
+static void (*wifi_status_cb)(int card_present, void *dev_id);
+static void *wifi_status_cb_devid;
+static int loki_wifi_status_register(void (*callback)(int , void *), void *);
+
+static int loki_wifi_reset(int on);
+static int loki_wifi_power(int on);
+static int loki_wifi_set_carddetect(int val);
+
+static struct wifi_platform_data loki_wifi_control = {
+       .set_power      = loki_wifi_power,
+       .set_reset      = loki_wifi_reset,
+       .set_carddetect = loki_wifi_set_carddetect,
+};
+
+static struct resource wifi_resource[] = {
+       [0] = {
+               .name   = "bcm4329_wlan_irq",
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
+                               | IORESOURCE_IRQ_SHAREABLE,
+       },
+};
+
+static struct platform_device loki_wifi_device = {
+       .name           = "bcm4329_wlan",
+       .id             = 1,
+       .num_resources  = 1,
+       .resource       = wifi_resource,
+       .dev            = {
+               .platform_data = &loki_wifi_control,
+       },
+};
+
+static struct resource sdhci_resource0[] = {
+       [0] = {
+               .start  = INT_SDMMC1,
+               .end    = INT_SDMMC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [1] = {
+               .start  = TEGRA_SDMMC1_BASE,
+               .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct resource sdhci_resource2[] = {
+       [0] = {
+               .start  = INT_SDMMC3,
+               .end    = INT_SDMMC3,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [1] = {
+               .start  = TEGRA_SDMMC3_BASE,
+               .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct resource sdhci_resource3[] = {
+       [0] = {
+               .start  = INT_SDMMC4,
+               .end    = INT_SDMMC4,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [1] = {
+               .start  = TEGRA_SDMMC4_BASE,
+               .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+static struct embedded_sdio_data embedded_sdio_data0 = {
+       .cccr   = {
+               .sdio_vsn       = 2,
+               .multi_block    = 1,
+               .low_speed      = 0,
+               .wide_bus       = 0,
+               .high_power     = 1,
+               .high_speed     = 1,
+       },
+       .cis  = {
+               .vendor  = 0x02d0,
+               .device  = 0x4329,
+       },
+};
+#endif
+
+static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
+       .mmc_data = {
+               .register_status_notify = loki_wifi_status_register,
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+               .embedded_sdio = &embedded_sdio_data0,
+#endif
+               .built_in = 0,
+               .ocr_mask = MMC_OCR_1V8_MASK,
+       },
+       .cd_gpio = -1,
+       .wp_gpio = -1,
+       .power_gpio = -1,
+       .tap_delay = 0,
+       .trim_delay = 0x2,
+       .ddr_clk_limit = 41000000,
+       .uhs_mask = MMC_UHS_MASK_SDR104 |
+               MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
+};
+
+static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
+       .cd_gpio = LOKI_SD_CD,
+       .wp_gpio = -1,
+       .power_gpio = -1,
+       .tap_delay = 0,
+       .trim_delay = 0x3,
+       .uhs_mask = MMC_UHS_MASK_SDR104 |
+               MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
+/*     .max_clk = 12000000, */
+};
+
+static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
+       .cd_gpio = -1,
+       .wp_gpio = -1,
+       .power_gpio = -1,
+       .is_8bit = 1,
+       .tap_delay = 0x4,
+       .trim_delay = 0x4,
+       .ddr_trim_delay = 0x4,
+       .mmc_data = {
+               .built_in = 1,
+               .ocr_mask = MMC_OCR_1V8_MASK,
+       },
+       .uhs_mask = MMC_MASK_HS200,
+       .ddr_clk_limit = 51000000,
+       .max_clk_limit = 102000000,
+/*     .max_clk = 12000000, */
+};
+
+static struct platform_device tegra_sdhci_device0 = {
+       .name           = "sdhci-tegra",
+       .id             = 0,
+       .resource       = sdhci_resource0,
+       .num_resources  = ARRAY_SIZE(sdhci_resource0),
+       .dev = {
+               .platform_data = &tegra_sdhci_platform_data0,
+       },
+};
+
+static struct platform_device tegra_sdhci_device2 = {
+       .name           = "sdhci-tegra",
+       .id             = 2,
+       .resource       = sdhci_resource2,
+       .num_resources  = ARRAY_SIZE(sdhci_resource2),
+       .dev = {
+               .platform_data = &tegra_sdhci_platform_data2,
+       },
+};
+
+static struct platform_device tegra_sdhci_device3 = {
+       .name           = "sdhci-tegra",
+       .id             = 3,
+       .resource       = sdhci_resource3,
+       .num_resources  = ARRAY_SIZE(sdhci_resource3),
+       .dev = {
+               .platform_data = &tegra_sdhci_platform_data3,
+       },
+};
+
+static int loki_wifi_status_register(
+               void (*callback)(int card_present, void *dev_id),
+               void *dev_id)
+{
+       if (wifi_status_cb)
+               return -EAGAIN;
+       wifi_status_cb = callback;
+       wifi_status_cb_devid = dev_id;
+       return 0;
+}
+
+static int loki_wifi_set_carddetect(int val)
+{
+       pr_debug("%s: %d\n", __func__, val);
+       if (wifi_status_cb)
+               wifi_status_cb(val, wifi_status_cb_devid);
+       else
+               pr_warn("%s: Nobody to notify\n", __func__);
+       return 0;
+}
+
+static int loki_wifi_power(int on)
+{
+       pr_err("%s: %d\n", __func__, on);
+
+       gpio_set_value(LOKI_WLAN_PWR, on);
+       gpio_set_value(LOKI_WLAN_RST, on);
+       mdelay(100);
+
+       return 0;
+}
+
+static int loki_wifi_reset(int on)
+{
+       pr_debug("%s: do nothing\n", __func__);
+       return 0;
+}
+
+static int __init loki_wifi_init(void)
+{
+       int rc;
+
+       rc = gpio_request(LOKI_WLAN_PWR, "wlan_power");
+       if (rc)
+               pr_err("WLAN_PWR gpio request failed:%d\n", rc);
+       rc = gpio_request(LOKI_WLAN_RST, "wlan_rst");
+       if (rc)
+               pr_err("WLAN_RST gpio request failed:%d\n", rc);
+       rc = gpio_request(LOKI_WLAN_WOW, "bcmsdh_sdmmc");
+       if (rc)
+               pr_err("WLAN_WOW gpio request failed:%d\n", rc);
+
+       rc = gpio_direction_output(LOKI_WLAN_PWR, 0);
+       if (rc)
+               pr_err("WLAN_PWR gpio direction configuration failed:%d\n", rc);
+       rc = gpio_direction_output(LOKI_WLAN_RST, 0);
+       if (rc)
+               pr_err("WLAN_RST gpio direction configuration failed:%d\n", rc);
+
+       rc = gpio_direction_input(LOKI_WLAN_WOW);
+       if (rc)
+               pr_err("WLAN_WOW gpio direction configuration failed:%d\n", rc);
+
+       wifi_resource[0].start = wifi_resource[0].end =
+               gpio_to_irq(LOKI_WLAN_WOW);
+
+       platform_device_register(&loki_wifi_device);
+       return 0;
+}
+
+#ifdef CONFIG_TEGRA_PREPOWER_WIFI
+static int __init loki_wifi_prepower(void)
+{
+       if (!of_machine_is_compatible("nvidia,loki"))
+               return 0;
+       loki_wifi_power(1);
+
+       return 0;
+}
+
+subsys_initcall_sync(loki_wifi_prepower);
+#endif
+
+int __init loki_sdhci_init(void)
+{
+       platform_device_register(&tegra_sdhci_device3);
+       platform_device_register(&tegra_sdhci_device2);
+       platform_device_register(&tegra_sdhci_device0);
+       loki_wifi_init();
+
+       return 0;
+}
diff --git a/arch/arm/mach-tegra/board-loki-sensors.c b/arch/arm/mach-tegra/board-loki-sensors.c
new file mode 100644 (file)
index 0000000..0e6cbbe
--- /dev/null
@@ -0,0 +1,501 @@
+/*
+ * arch/arm/mach-tegra/board-loki-sensors.c
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/mpu.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/nct1008.h>
+#include <media/ar0261.h>
+#include <media/imx135.h>
+#include <media/dw9718.h>
+#include <media/as364x.h>
+
+#include "board.h"
+#include "board-common.h"
+#include "board-loki.h"
+#include "tegra-board-id.h"
+
+static struct i2c_board_info loki_i2c_board_info_cm32181[] = {
+       {
+               I2C_BOARD_INFO("cm32181", 0x48),
+       },
+};
+
+/* MPU board file definition    */
+static struct mpu_platform_data mpu9250_gyro_data = {
+       .int_config     = 0x10,
+       .level_shifter  = 0,
+       /* Located in board_[platformname].h */
+       .orientation    = MPU_GYRO_ORIENTATION,
+       .sec_slave_type = SECONDARY_SLAVE_TYPE_NONE,
+       .key            = {0x4E, 0xCC, 0x7E, 0xEB, 0xF6, 0x1E, 0x35, 0x22,
+                       0x00, 0x34, 0x0D, 0x65, 0x32, 0xE9, 0x94, 0x89},
+};
+
+static struct mpu_platform_data mpu_compass_data = {
+       .orientation    = MPU_COMPASS_ORIENTATION,
+       .config         = NVI_CONFIG_BOOT_MPU,
+};
+
+static struct mpu_platform_data mpu_bmp_pdata = {
+       .config         = NVI_CONFIG_BOOT_MPU,
+};
+
+static struct i2c_board_info __initdata inv_mpu9250_i2c0_board_info[] = {
+       {
+               I2C_BOARD_INFO(MPU_GYRO_NAME, MPU_GYRO_ADDR),
+               .platform_data = &mpu9250_gyro_data,
+       },
+       {
+               /* The actual BMP180 address is 0x77 but because this conflicts
+                * with another device, this address is hacked so Linux will
+                * call the driver.  The conflict is technically okay since the
+                * BMP180 is behind the MPU.  Also, the BMP180 driver uses a
+                * hard-coded address of 0x77 since it can't be changed anyway.
+                */
+               I2C_BOARD_INFO(MPU_BMP_NAME, MPU_BMP_ADDR),
+               .platform_data = &mpu_bmp_pdata,
+       },
+       {
+               I2C_BOARD_INFO(MPU_COMPASS_NAME, MPU_COMPASS_ADDR),
+               .platform_data = &mpu_compass_data,
+       },
+};
+
+static void mpuirq_init(void)
+{
+       int ret = 0;
+       unsigned gyro_irq_gpio = MPU_GYRO_IRQ_GPIO;
+       unsigned gyro_bus_num = MPU_GYRO_BUS_NUM;
+       char *gyro_name = MPU_GYRO_NAME;
+
+       pr_info("*** MPU START *** mpuirq_init...\n");
+
+       ret = gpio_request(gyro_irq_gpio, gyro_name);
+
+       if (ret < 0) {
+               pr_err("%s: gpio_request failed %d\n", __func__, ret);
+               return;
+       }
+
+       ret = gpio_direction_input(gyro_irq_gpio);
+       if (ret < 0) {
+               pr_err("%s: gpio_direction_input failed %d\n", __func__, ret);
+               gpio_free(gyro_irq_gpio);
+               return;
+       }
+       pr_info("*** MPU END *** mpuirq_init...\n");
+
+       inv_mpu9250_i2c0_board_info[0].irq = gpio_to_irq(MPU_GYRO_IRQ_GPIO);
+       i2c_register_board_info(gyro_bus_num, inv_mpu9250_i2c0_board_info,
+               ARRAY_SIZE(inv_mpu9250_i2c0_board_info));
+}
+
+static struct regulator *loki_vcmvdd;
+
+static int loki_get_extra_regulators(void)
+{
+       if (!loki_vcmvdd) {
+               loki_vcmvdd = regulator_get(NULL, "avdd_af1_cam");
+               if (WARN_ON(IS_ERR(loki_vcmvdd))) {
+                       pr_err("%s: can't get regulator avdd_af1_cam: %ld\n",
+                                       __func__, PTR_ERR(loki_vcmvdd));
+                       regulator_put(loki_vcmvdd);
+                       loki_vcmvdd = NULL;
+                       return -ENODEV;
+               }
+       }
+
+       return 0;
+}
+
+
+static int loki_ar0261_power_on(struct ar0261_power_rail *pw)
+{
+       int err;
+
+       if (unlikely(WARN_ON(!pw || !pw->avdd || !pw->iovdd || !pw->dvdd)))
+               return -EFAULT;
+
+       if (loki_get_extra_regulators())
+               goto loki_ar0261_poweron_fail;
+
+       gpio_set_value(CAM_RSTN, 0);
+       gpio_set_value(CAM_AF_PWDN, 1);
+
+
+       err = regulator_enable(loki_vcmvdd);
+       if (unlikely(err))
+               goto ar0261_vcm_fail;
+
+       err = regulator_enable(pw->dvdd);
+       if (unlikely(err))
+               goto ar0261_dvdd_fail;
+
+       err = regulator_enable(pw->avdd);
+       if (unlikely(err))
+               goto ar0261_avdd_fail;
+
+       err = regulator_enable(pw->iovdd);
+       if (unlikely(err))
+               goto ar0261_iovdd_fail;
+
+       usleep_range(1, 2);
+       gpio_set_value(CAM2_PWDN, 1);
+
+       gpio_set_value(CAM_RSTN, 1);
+
+       return 0;
+ar0261_iovdd_fail:
+       regulator_disable(pw->dvdd);
+
+ar0261_dvdd_fail:
+       regulator_disable(pw->avdd);
+
+ar0261_avdd_fail:
+       regulator_disable(loki_vcmvdd);
+
+ar0261_vcm_fail:
+       pr_err("%s vcmvdd failed.\n", __func__);
+       return -ENODEV;
+
+loki_ar0261_poweron_fail:
+       pr_err("%s failed.\n", __func__);
+       return -ENODEV;
+}
+
+static int loki_ar0261_power_off(struct ar0261_power_rail *pw)
+{
+       if (unlikely(WARN_ON(!pw || !pw->avdd || !pw->iovdd || !pw->dvdd ||
+                                       !loki_vcmvdd)))
+               return -EFAULT;
+
+       gpio_set_value(CAM_RSTN, 0);
+
+       usleep_range(1, 2);
+
+       regulator_disable(pw->iovdd);
+       regulator_disable(pw->dvdd);
+       regulator_disable(pw->avdd);
+
+
+       regulator_disable(loki_vcmvdd);
+
+       return 0;
+}
+
+struct ar0261_platform_data loki_ar0261_data = {
+       .power_on = loki_ar0261_power_on,
+       .power_off = loki_ar0261_power_off,
+       .mclk_name = "vi_sensor2",
+};
+
+static int loki_imx135_get_extra_regulators(struct imx135_power_rail *pw)
+{
+       if (!pw->ext_reg1) {
+               pw->ext_reg1 = regulator_get(NULL, "imx135_reg1");
+               if (WARN_ON(IS_ERR(pw->ext_reg1))) {
+                       pr_err("%s: can't get regulator imx135_reg1: %ld\n",
+                               __func__, PTR_ERR(pw->ext_reg1));
+                       pw->ext_reg1 = NULL;
+                       return -ENODEV;
+               }
+       }
+
+       if (!pw->ext_reg2) {
+               pw->ext_reg2 = regulator_get(NULL, "imx135_reg2");
+               if (WARN_ON(IS_ERR(pw->ext_reg2))) {
+                       pr_err("%s: can't get regulator imx135_reg2: %ld\n",
+                               __func__, PTR_ERR(pw->ext_reg2));
+                       pw->ext_reg2 = NULL;
+                       return -ENODEV;
+               }
+       }
+
+       return 0;
+}
+
+static int loki_imx135_power_on(struct imx135_power_rail *pw)
+{
+       int err;
+
+       if (unlikely(WARN_ON(!pw || !pw->iovdd || !pw->avdd)))
+               return -EFAULT;
+
+       if (loki_imx135_get_extra_regulators(pw))
+               goto imx135_poweron_fail;
+
+       err = regulator_enable(pw->ext_reg1);
+       if (unlikely(err))
+               goto imx135_ext_reg1_fail;
+
+       err = regulator_enable(pw->ext_reg2);
+       if (unlikely(err))
+               goto imx135_ext_reg2_fail;
+
+
+       gpio_set_value(CAM_RSTN, 0);
+       gpio_set_value(CAM_AF_PWDN, 1);
+       gpio_set_value(CAM1_PWDN, 0);
+       usleep_range(10, 20);
+
+       err = regulator_enable(pw->avdd);
+       if (err)
+               goto imx135_avdd_fail;
+
+       err = regulator_enable(pw->iovdd);
+       if (err)
+               goto imx135_iovdd_fail;
+
+       usleep_range(1, 2);
+       gpio_set_value(CAM_RSTN, 1);
+       gpio_set_value(CAM1_PWDN, 1);
+
+       usleep_range(300, 310);
+
+       return 1;
+
+
+imx135_iovdd_fail:
+       regulator_disable(pw->avdd);
+
+imx135_avdd_fail:
+       if (pw->ext_reg2)
+               regulator_disable(pw->ext_reg2);
+
+imx135_ext_reg2_fail:
+       if (pw->ext_reg1)
+               regulator_disable(pw->ext_reg1);
+       gpio_set_value(CAM_AF_PWDN, 0);
+
+imx135_ext_reg1_fail:
+imx135_poweron_fail:
+       pr_err("%s failed.\n", __func__);
+       return -ENODEV;
+}
+
+static int loki_imx135_power_off(struct imx135_power_rail *pw)
+{
+       if (unlikely(WARN_ON(!pw || !pw->iovdd || !pw->avdd)))
+               return -EFAULT;
+
+       usleep_range(1, 2);
+       gpio_set_value(CAM_RSTN, 0);
+       usleep_range(1, 2);
+
+       regulator_disable(pw->iovdd);
+       regulator_disable(pw->avdd);
+
+       regulator_disable(pw->ext_reg1);
+       regulator_disable(pw->ext_reg2);
+
+       return 0;
+}
+
+struct imx135_platform_data loki_imx135_data = {
+       .power_on = loki_imx135_power_on,
+       .power_off = loki_imx135_power_off,
+};
+
+static int loki_dw9718_power_on(struct dw9718_power_rail *pw)
+{
+       int err;
+       pr_info("%s\n", __func__);
+
+       if (unlikely(!pw || !pw->vdd || !pw->vdd_i2c))
+               return -EFAULT;
+
+       err = regulator_enable(pw->vdd);
+       if (unlikely(err))
+               goto dw9718_vdd_fail;
+
+       err = regulator_enable(pw->vdd_i2c);
+       if (unlikely(err))
+               goto dw9718_i2c_fail;
+
+       usleep_range(1000, 1020);
+
+       /* return 1 to skip the in-driver power_on sequence */
+       pr_debug("%s --\n", __func__);
+       return 1;
+
+dw9718_i2c_fail:
+       regulator_disable(pw->vdd);
+
+dw9718_vdd_fail:
+       pr_err("%s FAILED\n", __func__);
+       return -ENODEV;
+}
+
+static int loki_dw9718_power_off(struct dw9718_power_rail *pw)
+{
+       pr_info("%s\n", __func__);
+
+       if (unlikely(!pw || !pw->vdd || !pw->vdd_i2c))
+               return -EFAULT;
+
+       regulator_disable(pw->vdd);
+       regulator_disable(pw->vdd_i2c);
+
+       return 1;
+}
+
+static u16 dw9718_devid;
+static int loki_dw9718_detect(void *buf, size_t size)
+{
+       dw9718_devid = 0x9718;
+       return 0;
+}
+
+static struct nvc_focus_cap dw9718_cap = {
+       .settle_time = 30,
+       .slew_rate = 0x3A200C,
+       .focus_macro = 450,
+       .focus_infinity = 200,
+       .focus_hyper = 200,
+};
+
+static struct dw9718_platform_data loki_dw9718_data = {
+       .cfg = NVC_CFG_NODEV,
+       .num = 0,
+       .sync = 0,
+       .dev_name = "focuser",
+       .cap = &dw9718_cap,
+       .power_on = loki_dw9718_power_on,
+       .power_off = loki_dw9718_power_off,
+       .detect = loki_dw9718_detect,
+};
+
+static struct as364x_platform_data loki_as3648_data = {
+       .config         = {
+               .led_mask       = 3,
+               .max_total_current_mA = 1000,
+               .max_peak_current_mA = 600,
+               .vin_low_v_run_mV = 3070,
+               .strobe_type = 1,
+               },
+       .pinstate       = {
+               .mask   = 1 << (CAM_FLASH_STROBE - TEGRA_GPIO_PBB0),
+               .values = 1 << (CAM_FLASH_STROBE - TEGRA_GPIO_PBB0)
+               },
+       .dev_name       = "torch",
+       .type           = AS3648,
+       .gpio_strobe    = CAM_FLASH_STROBE,
+};
+
+
+static struct i2c_board_info loki_i2c_board_info_e1823[] = {
+       {
+               I2C_BOARD_INFO("imx135", 0x10),
+               .platform_data = &loki_imx135_data,
+       },
+       {
+               I2C_BOARD_INFO("ar0261", 0x36),
+               .platform_data = &loki_ar0261_data,
+       },
+       {
+               I2C_BOARD_INFO("dw9718", 0x0c),
+               .platform_data = &loki_dw9718_data,
+       },
+       {
+               I2C_BOARD_INFO("as3648", 0x30),
+               .platform_data = &loki_as3648_data,
+       },
+};
+
+
+static int loki_camera_init(void)
+{
+       pr_debug("%s: ++\n", __func__);
+
+
+       i2c_register_board_info(2, loki_i2c_board_info_e1823,
+                       ARRAY_SIZE(loki_i2c_board_info_e1823));
+       return 0;
+}
+
+static struct nct1008_platform_data loki_nct72_pdata = {
+       .supported_hwrev = true,
+       .ext_range = true,
+       .conv_rate = 0x06, /* 4Hz conversion rate */
+       .offset = 0,
+       .shutdown_ext_limit = 85, /* C */
+       .shutdown_local_limit = 120, /* C */
+
+       .num_trips = 0,
+       .trips = {
+               {
+                       .cdev_type = "suspend_soctherm",
+                       .trip_temp = 50000,
+                       .trip_type = THERMAL_TRIP_ACTIVE,
+                       .upper = 1,
+                       .lower = 1,
+                       .hysteresis = 5000,
+               },
+       },
+};
+
+static struct i2c_board_info loki_i2c_nct72_board_info[] = {
+       {
+               I2C_BOARD_INFO("nct72", 0x4c),
+               .platform_data = &loki_nct72_pdata,
+               .irq = -1,
+       }
+};
+
+static int loki_nct72_init(void)
+{
+       int nct72_port = TEGRA_GPIO_PI6;
+       int ret = 0;
+
+/*
+       tegra_add_cdev_trips(loki_nct72_pdata.trips,
+                               &loki_nct72_pdata.num_trips);
+*/
+       loki_i2c_nct72_board_info[0].irq = gpio_to_irq(nct72_port);
+
+       ret = gpio_request(nct72_port, "temp_alert");
+       if (ret < 0)
+               return ret;
+
+       ret = gpio_direction_input(nct72_port);
+       if (ret < 0) {
+               pr_info("%s: calling gpio_free(nct72_port)", __func__);
+               gpio_free(nct72_port);
+       }
+
+       /* loki has thermal sensor on GEN2-I2C i.e. instance 1 */
+       i2c_register_board_info(1, loki_i2c_nct72_board_info,
+               ARRAY_SIZE(loki_i2c_nct72_board_info));
+
+       return ret;
+}
+
+int __init loki_sensors_init(void)
+{
+       mpuirq_init();
+       loki_camera_init();
+       loki_nct72_init();
+
+       i2c_register_board_info(0, loki_i2c_board_info_cm32181,
+                       ARRAY_SIZE(loki_i2c_board_info_cm32181));
+
+       return 0;
+}
diff --git a/arch/arm/mach-tegra/board-loki.c b/arch/arm/mach-tegra/board-loki.c
new file mode 100644 (file)
index 0000000..821a265
--- /dev/null
@@ -0,0 +1,1116 @@
+/*
+ * arch/arm/mach-tegra/board-loki.c
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/ctype.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/serial_8250.h>
+#include <linux/i2c.h>
+#include <linux/i2c/i2c-hid.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/i2c-tegra.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/platform_data/tegra_usb.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/rm31080a_ts.h>
+#include <linux/tegra_uart.h>
+#include <linux/memblock.h>
+#include <linux/spi/spi-tegra.h>
+#include <linux/nfc/pn544.h>
+#include <linux/rfkill-gpio.h>
+#include <linux/skbuff.h>
+#include <linux/ti_wilink_st.h>
+#include <linux/regulator/consumer.h>
+#include <linux/smb349-charger.h>
+#include <linux/max17048_battery.h>
+#include <linux/leds.h>
+#include <linux/i2c/at24.h>
+#include <linux/of_platform.h>
+#include <linux/i2c.h>
+#include <linux/i2c-tegra.h>
+#include <linux/tegra_uart.h>
+#include <linux/serial_tegra.h>
+#include <linux/edp.h>
+#include <linux/mfd/palmas.h>
+#include <linux/usb/tegra_usb_phy.h>
+
+#include <mach/clk.h>
+#include <mach/irqs.h>
+#include <mach/pci.h>
+#include <mach/tegra_fiq_debugger.h>
+
+#include <mach/pinmux.h>
+#include <mach/pinmux-t12.h>
+#include <mach/io_dpd.h>
+#include <mach/i2s.h>
+#include <mach/isomgr.h>
+#include <mach/tegra_asoc_pdata.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/gpio-tegra.h>
+#include <mach/tegra_fiq_debugger.h>
+#include <mach/xusb.h>
+#include <linux/platform_data/tegra_usb_modem_power.h>
+
+#include "board-touch-raydium.h"
+#include "board.h"
+#include "board-common.h"
+#include "clock.h"
+#include "board-loki.h"
+#include "devices.h"
+#include "gpio-names.h"
+#include "fuse.h"
+#include "pm.h"
+#include "pm-irq.h"
+#include "common.h"
+#include "tegra-board-id.h"
+#include "iomap.h"
+
+static struct board_info board_info, display_board_info;
+
+static struct resource loki_bluedroid_pm_resources[] = {
+       [0] = {
+               .name   = "shutdown_gpio",
+               .start  = TEGRA_GPIO_PR1,
+               .end    = TEGRA_GPIO_PR1,
+               .flags  = IORESOURCE_IO,
+       },
+       [1] = {
+               .name = "host_wake",
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+       },
+       [2] = {
+               .name = "gpio_ext_wake",
+               .start  = TEGRA_GPIO_PEE1,
+               .end    = TEGRA_GPIO_PEE1,
+               .flags  = IORESOURCE_IO,
+       },
+       [3] = {
+               .name = "gpio_host_wake",
+               .start  = TEGRA_GPIO_PU6,
+               .end    = TEGRA_GPIO_PU6,
+               .flags  = IORESOURCE_IO,
+       },
+       [4] = {
+               .name = "reset_gpio",
+               .start  = TEGRA_GPIO_PX1,
+               .end    = TEGRA_GPIO_PX1,
+               .flags  = IORESOURCE_IO,
+       },
+};
+
+static struct platform_device loki_bluedroid_pm_device = {
+       .name = "bluedroid_pm",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(loki_bluedroid_pm_resources),
+       .resource       = loki_bluedroid_pm_resources,
+};
+
+static noinline void __init loki_setup_bluedroid_pm(void)
+{
+       loki_bluedroid_pm_resources[1].start =
+               loki_bluedroid_pm_resources[1].end =
+                               gpio_to_irq(TEGRA_GPIO_PU6);
+       platform_device_register(&loki_bluedroid_pm_device);
+}
+
+/*use board file for T12x*/
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+static struct i2c_board_info __initdata rt5639_board_info = {
+       I2C_BOARD_INFO("rt5639", 0x1c),
+};
+static struct i2c_board_info __initdata rt5645_board_info = {
+       I2C_BOARD_INFO("rt5645", 0x1a),
+};
+#endif
+
+static __initdata struct tegra_clk_init_table loki_clk_init_table[] = {
+       /* name         parent          rate            enabled */
+       { "pll_m",      NULL,           0,              false},
+       { "hda",        "pll_p",        108000000,      false},
+       { "hda2codec_2x", "pll_p",      48000000,       false},
+       { "pwm",        "pll_p",        3187500,        false},
+       { "i2s1",       "pll_a_out0",   0,              false},
+       { "i2s3",       "pll_a_out0",   0,              false},
+       { "i2s4",       "pll_a_out0",   0,              false},
+       { "spdif_out",  "pll_a_out0",   0,              false},
+       { "d_audio",    "clk_m",        12000000,       false},
+       { "dam0",       "clk_m",        12000000,       false},
+       { "dam1",       "clk_m",        12000000,       false},
+       { "dam2",       "clk_m",        12000000,       false},
+       { "audio1",     "i2s1_sync",    0,              false},
+       { "audio3",     "i2s3_sync",    0,              false},
+       { "vi_sensor",  "pll_p",        150000000,      false},
+       { "vi_sensor2", "pll_p",        150000000,      false},
+       { "cilab",      "pll_p",        150000000,      false},
+       { "cilcd",      "pll_p",        150000000,      false},
+       { "cile",       "pll_p",        150000000,      false},
+       { "i2c1",       "pll_p",        3200000,        false},
+       { "i2c2",       "pll_p",        3200000,        false},
+       { "i2c3",       "pll_p",        3200000,        false},
+       { "i2c4",       "pll_p",        3200000,        false},
+       { "i2c5",       "pll_p",        3200000,        false},
+       { "sbc1",       "pll_p",        25000000,       false},
+       { "sbc2",       "pll_p",        25000000,       false},
+       { "sbc3",       "pll_p",        25000000,       false},
+       { "sbc4",       "pll_p",        25000000,       false},
+       { "sbc5",       "pll_p",        25000000,       false},
+       { "sbc6",       "pll_p",        25000000,       false},
+       { "uarta",      "pll_p",        408000000,      false},
+       { "uartb",      "pll_p",        408000000,      false},
+       { "uartc",      "pll_p",        408000000,      false},
+       { "uartd",      "pll_p",        408000000,      false},
+       { NULL,         NULL,           0,              0},
+};
+
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+static struct tegra_i2c_platform_data loki_i2c1_platform_data = {
+       .bus_clk_rate   = 100000,
+       .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
+       .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
+};
+
+static struct tegra_i2c_platform_data loki_i2c2_platform_data = {
+       .bus_clk_rate   = 100000,
+       .is_clkon_always = true,
+       .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
+       .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
+};
+
+static struct tegra_i2c_platform_data loki_i2c3_platform_data = {
+       .bus_clk_rate   = 400000,
+       .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
+       .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
+};
+
+static struct tegra_i2c_platform_data loki_i2c4_platform_data = {
+       .bus_clk_rate   = 10000,
+       .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
+       .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
+};
+
+static struct tegra_i2c_platform_data loki_i2c5_platform_data = {
+       .bus_clk_rate   = 400000,
+       .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
+       .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
+       .needs_cl_dvfs_clock = true,
+};
+#endif
+
+static struct i2c_hid_platform_data i2c_keyboard_pdata = {
+       .hid_descriptor_address = 0x0,
+};
+
+static struct i2c_board_info __initdata i2c_keyboard_board_info = {
+       I2C_BOARD_INFO("hid", 0x3B),
+       .platform_data  = &i2c_keyboard_pdata,
+};
+
+static struct i2c_hid_platform_data i2c_touchpad_pdata = {
+       .hid_descriptor_address = 0x20,
+};
+
+static struct i2c_board_info __initdata i2c_touchpad_board_info = {
+       I2C_BOARD_INFO("hid", 0x2C),
+       .platform_data  = &i2c_touchpad_pdata,
+};
+
+static void loki_i2c_init(void)
+{
+       struct board_info board_info;
+       tegra_get_board_info(&board_info);
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+#ifndef CONFIG_USE_OF
+       tegra11_i2c_device1.dev.platform_data = &loki_i2c1_platform_data;
+       tegra11_i2c_device2.dev.platform_data = &loki_i2c2_platform_data;
+       tegra11_i2c_device3.dev.platform_data = &loki_i2c3_platform_data;
+       tegra11_i2c_device4.dev.platform_data = &loki_i2c4_platform_data;
+       tegra11_i2c_device5.dev.platform_data = &loki_i2c5_platform_data;
+
+       platform_device_register(&tegra11_i2c_device5);
+       platform_device_register(&tegra11_i2c_device4);
+       platform_device_register(&tegra11_i2c_device3);
+       platform_device_register(&tegra11_i2c_device2);
+       platform_device_register(&tegra11_i2c_device1);
+#endif
+#else
+       /* T124 does not use device tree as of now */
+       tegra14_i2c_device1.dev.platform_data = &loki_i2c1_platform_data;
+       tegra14_i2c_device2.dev.platform_data = &loki_i2c2_platform_data;
+       tegra14_i2c_device3.dev.platform_data = &loki_i2c3_platform_data;
+       tegra14_i2c_device4.dev.platform_data = &loki_i2c4_platform_data;
+       tegra14_i2c_device5.dev.platform_data = &loki_i2c5_platform_data;
+
+       platform_device_register(&tegra14_i2c_device5);
+       platform_device_register(&tegra14_i2c_device4);
+       platform_device_register(&tegra14_i2c_device3);
+       platform_device_register(&tegra14_i2c_device2);
+       platform_device_register(&tegra14_i2c_device1);
+#endif
+
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+       i2c_register_board_info(0, &rt5639_board_info, 1);
+       i2c_register_board_info(0, &rt5645_board_info, 1);
+#endif
+
+       if (board_info.board_id == BOARD_PM359 ||
+                       board_info.board_id == BOARD_PM358 ||
+                       board_info.board_id == BOARD_PM363) {
+               i2c_keyboard_board_info.irq = gpio_to_irq(I2C_KB_IRQ);
+               i2c_register_board_info(1, &i2c_keyboard_board_info , 1);
+
+               i2c_touchpad_board_info.irq = gpio_to_irq(I2C_TP_IRQ);
+               i2c_register_board_info(1, &i2c_touchpad_board_info , 1);
+       }
+}
+
+#ifndef CONFIG_USE_OF
+static struct platform_device *loki_uart_devices[] __initdata = {
+       &tegra_uarta_device,
+       &tegra_uartb_device,
+       &tegra_uartc_device,
+};
+
+static struct tegra_serial_platform_data loki_uarta_pdata = {
+       .dma_req_selector = 8,
+       .modem_interrupt = false,
+};
+
+static struct tegra_serial_platform_data loki_uartb_pdata = {
+       .dma_req_selector = 9,
+       .modem_interrupt = false,
+};
+
+static struct tegra_serial_platform_data loki_uartc_pdata = {
+       .dma_req_selector = 10,
+       .modem_interrupt = false,
+};
+#endif
+
+static struct tegra_serial_platform_data loki_uartd_pdata = {
+       .dma_req_selector = 19,
+       .modem_interrupt = false,
+};
+
+/*use board file for T12x*/
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+static struct tegra_asoc_platform_data loki_audio_pdata_rt5639 = {
+       .gpio_hp_det = TEGRA_GPIO_HP_DET,
+       .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
+       .gpio_spkr_en = -1,
+       .gpio_int_mic_en = -1,
+       .gpio_ext_mic_en = -1,
+       .gpio_hp_mute = -1,
+       .gpio_codec1 = -1,
+       .gpio_codec2 = -1,
+       .gpio_codec3 = -1,
+       .i2s_param[HIFI_CODEC]       = {
+               .audio_port_id = 1,
+               .is_i2s_master = 0,
+               .i2s_mode = TEGRA_DAIFMT_I2S,
+       },
+       .i2s_param[BT_SCO] = {
+               .audio_port_id = 3,
+               .is_i2s_master = 1,
+               .i2s_mode = TEGRA_DAIFMT_DSP_A,
+       },
+};
+
+static struct tegra_asoc_platform_data loki_audio_pdata_rt5645 = {
+       .gpio_hp_det = TEGRA_GPIO_HP_DET,
+       .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
+       .gpio_spkr_en = -1,
+       .gpio_int_mic_en = -1,
+       .gpio_ext_mic_en = -1,
+       .gpio_hp_mute = -1,
+       .gpio_codec1 = -1,
+       .gpio_codec2 = -1,
+       .gpio_codec3 = -1,
+       .i2s_param[HIFI_CODEC]       = {
+               .audio_port_id = 1,
+               .is_i2s_master = 0,
+               .i2s_mode = TEGRA_DAIFMT_I2S,
+       },
+       .i2s_param[BT_SCO] = {
+               .audio_port_id = 3,
+               .is_i2s_master = 1,
+               .i2s_mode = TEGRA_DAIFMT_DSP_A,
+       },
+};
+
+static void loki_audio_init(void)
+{
+       struct board_info board_info;
+       tegra_get_board_info(&board_info);
+       if (board_info.board_id == BOARD_PM359 ||
+                       board_info.board_id == BOARD_PM358 ||
+                       board_info.board_id == BOARD_PM363) {
+               /*Laguna*/
+               loki_audio_pdata_rt5645.gpio_hp_det =
+                       TEGRA_GPIO_HP_DET;
+               loki_audio_pdata_rt5645.gpio_hp_det_active_high = 1;
+               loki_audio_pdata_rt5645.gpio_ldo1_en = -1;
+       } else {
+               /*Loki*/
+               loki_audio_pdata_rt5645.gpio_hp_det =
+                       TEGRA_GPIO_HP_DET;
+               loki_audio_pdata_rt5645.gpio_hp_det_active_high = 0;
+               loki_audio_pdata_rt5645.gpio_ldo1_en =
+                       TEGRA_GPIO_LDO_EN;
+       }
+
+       loki_audio_pdata_rt5639.gpio_hp_det =
+               loki_audio_pdata_rt5645.gpio_hp_det;
+
+       loki_audio_pdata_rt5639.gpio_hp_det_active_high =
+               loki_audio_pdata_rt5645.gpio_hp_det_active_high;
+
+       loki_audio_pdata_rt5639.gpio_ldo1_en =
+               loki_audio_pdata_rt5645.gpio_ldo1_en;
+
+       loki_audio_pdata_rt5639.codec_name = "rt5639.0-001c";
+       loki_audio_pdata_rt5639.codec_dai_name = "rt5639-aif1";
+       loki_audio_pdata_rt5645.codec_name = "rt5645.0-001a";
+       loki_audio_pdata_rt5645.codec_dai_name = "rt5645-aif1";
+}
+
+static struct platform_device loki_audio_device_rt5645 = {
+       .name = "tegra-snd-rt5645",
+       .id = 0,
+       .dev = {
+               .platform_data = &loki_audio_pdata_rt5645,
+       },
+};
+
+static struct platform_device loki_audio_device_rt5639 = {
+       .name = "tegra-snd-rt5639",
+       .id = 0,
+       .dev = {
+               .platform_data = &loki_audio_pdata_rt5639,
+       },
+};
+
+#endif
+
+static void __init loki_uart_init(void)
+{
+       int debug_port_id;
+
+#ifndef CONFIG_USE_OF
+       tegra_uarta_device.dev.platform_data = &loki_uarta_pdata;
+       tegra_uartb_device.dev.platform_data = &loki_uartb_pdata;
+       tegra_uartc_device.dev.platform_data = &loki_uartc_pdata;
+       platform_add_devices(loki_uart_devices,
+                       ARRAY_SIZE(loki_uart_devices));
+#endif
+       tegra_uartd_device.dev.platform_data = &loki_uartd_pdata;
+       if (!is_tegra_debug_uartport_hs()) {
+               debug_port_id = uart_console_debug_init(3);
+               if (debug_port_id < 0)
+                       return;
+
+               platform_device_register(uart_console_debug_device);
+       } else {
+               tegra_uartd_device.dev.platform_data = &loki_uartd_pdata;
+               platform_device_register(&tegra_uartd_device);
+       }
+
+}
+
+static struct resource tegra_rtc_resources[] = {
+       [0] = {
+               .start = TEGRA_RTC_BASE,
+               .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start = INT_RTC,
+               .end = INT_RTC,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device tegra_rtc_device = {
+       .name = "tegra_rtc",
+       .id   = -1,
+       .resource = tegra_rtc_resources,
+       .num_resources = ARRAY_SIZE(tegra_rtc_resources),
+};
+
+static struct platform_device *loki_devices[] __initdata = {
+       &tegra_pmu_device,
+       &tegra_rtc_device,
+       &tegra_udc_device,
+#if defined(CONFIG_TEGRA_AVP)
+       &tegra_avp_device,
+#endif
+#if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
+#ifdef CONFIG_ARCH_TEGRA_12x_SOC
+       &tegra12_se_device,
+#endif
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+       &tegra11_se_device,
+#endif
+#endif
+/*use board file for T12x*/
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+       &tegra_ahub_device,
+       &tegra_dam_device0,
+       &tegra_dam_device1,
+       &tegra_dam_device2,
+       &tegra_i2s_device1,
+       &tegra_i2s_device3,
+       &tegra_i2s_device4,
+       &loki_audio_device_rt5639,
+       &tegra_spdif_device,
+#endif
+       &spdif_dit_device,
+       &bluetooth_dit_device,
+       &tegra_hda_device,
+#if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
+       &tegra_aes_device,
+#endif
+};
+
+static struct tegra_usb_platform_data tegra_udc_pdata = {
+       .port_otg = true,
+       .has_hostpc = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
+       .op_mode = TEGRA_USB_OPMODE_DEVICE,
+       .u_data.dev = {
+               .vbus_pmu_irq = 0,
+               .vbus_gpio = -1,
+               .charging_supported = false,
+               .remote_wakeup_supported = false,
+       },
+       .u_cfg.utmi = {
+               .hssync_start_delay = 0,
+               .elastic_limit = 16,
+               .idle_wait_delay = 17,
+               .term_range_adj = 6,
+               .xcvr_setup = 8,
+               .xcvr_lsfslew = 2,
+               .xcvr_lsrslew = 2,
+               .xcvr_setup_offset = 0,
+               .xcvr_use_fuses = 1,
+       },
+};
+
+static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
+       .port_otg = true,
+       .has_hostpc = true,
+       .unaligned_dma_buf_supported = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
+       .op_mode = TEGRA_USB_OPMODE_HOST,
+       .u_data.host = {
+               .vbus_gpio = -1,
+               .hot_plug = false,
+               .remote_wakeup_supported = true,
+               .power_off_on_suspend = true,
+       },
+       .u_cfg.utmi = {
+               .hssync_start_delay = 0,
+               .elastic_limit = 16,
+               .idle_wait_delay = 17,
+               .term_range_adj = 6,
+               .xcvr_setup = 15,
+               .xcvr_lsfslew = 0,
+               .xcvr_lsrslew = 3,
+               .xcvr_setup_offset = 0,
+               .xcvr_use_fuses = 0,
+               .vbus_oc_map = 0x4,
+               .xcvr_hsslew_lsb = 2,
+       },
+};
+
+#ifdef CONFIG_ARCH_TEGRA_12x_SOC
+static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
+       .port_otg = false,
+       .has_hostpc = true,
+       .unaligned_dma_buf_supported = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
+       .op_mode = TEGRA_USB_OPMODE_HOST,
+       .u_data.host = {
+               .vbus_gpio = -1,
+               .hot_plug = false,
+               .remote_wakeup_supported = true,
+               .power_off_on_suspend = true,
+       },
+       .u_cfg.utmi = {
+               .hssync_start_delay = 0,
+               .elastic_limit = 16,
+               .idle_wait_delay = 17,
+               .term_range_adj = 6,
+               .xcvr_setup = 8,
+               .xcvr_lsfslew = 2,
+               .xcvr_lsrslew = 2,
+               .xcvr_setup_offset = 0,
+               .xcvr_use_fuses = 1,
+               .vbus_oc_map = 0x5,
+       },
+};
+#endif
+
+static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
+       .port_otg = false,
+       .has_hostpc = true,
+       .unaligned_dma_buf_supported = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
+       .op_mode = TEGRA_USB_OPMODE_HOST,
+       .u_data.host = {
+               .vbus_gpio = -1,
+               .hot_plug = false,
+               .remote_wakeup_supported = true,
+               .power_off_on_suspend = true,
+       },
+       .u_cfg.utmi = {
+       .hssync_start_delay = 0,
+               .elastic_limit = 16,
+               .idle_wait_delay = 17,
+               .term_range_adj = 6,
+               .xcvr_setup = 8,
+               .xcvr_lsfslew = 2,
+               .xcvr_lsrslew = 2,
+               .xcvr_setup_offset = 0,
+               .xcvr_use_fuses = 1,
+               .vbus_oc_map = 0x5,
+       },
+};
+
+static struct gpio modem_gpios[] = { /* Bruce modem */
+       {MODEM_EN, GPIOF_OUT_INIT_HIGH, "MODEM EN"},
+       {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
+};
+
+static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
+       .port_otg = false,
+       .has_hostpc = true,
+       .unaligned_dma_buf_supported = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
+       .op_mode = TEGRA_USB_OPMODE_HOST,
+       .u_data.host = {
+               .vbus_gpio = -1,
+               .hot_plug = false,
+               .remote_wakeup_supported = true,
+               .power_off_on_suspend = true,
+       },
+};
+
+static struct tegra_usb_platform_data tegra_ehci2_hsic_smsc_hub_pdata = {
+       .port_otg = false,
+       .has_hostpc = true,
+       .unaligned_dma_buf_supported = true,
+       .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
+       .op_mode        = TEGRA_USB_OPMODE_HOST,
+       .u_data.host = {
+               .vbus_gpio = -1,
+               .hot_plug = false,
+               .remote_wakeup_supported = true,
+               .power_off_on_suspend = true,
+       },
+};
+
+
+static struct tegra_usb_otg_data tegra_otg_pdata = {
+       .ehci_device = &tegra_ehci1_device,
+       .ehci_pdata = &tegra_ehci1_utmi_pdata,
+};
+
+static void loki_usb_init(void)
+{
+       int usb_port_owner_info = tegra_get_usb_port_owner_info();
+       int modem_id = tegra_get_modem_id();
+       struct board_info bi;
+
+       tegra_get_pmu_board_info(&bi);
+
+       switch (bi.board_id) {
+       case BOARD_E1733:
+               /* Host cable is detected through USB ID */
+               tegra_udc_pdata.id_det_type = TEGRA_USB_ID;
+               tegra_ehci1_utmi_pdata.id_det_type = TEGRA_USB_ID;
+               break;
+       case BOARD_E1735:
+               /* Host cable is detected through PMU Interrupt */
+               tegra_udc_pdata.id_det_type = TEGRA_USB_PMU_ID;
+               tegra_ehci1_utmi_pdata.id_det_type = TEGRA_USB_PMU_ID;
+               tegra_otg_pdata.id_extcon_dev_name = "palmas-extcon";
+       }
+
+       if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
+               tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
+               platform_device_register(&tegra_otg_device);
+               /* Setup the udc platform data */
+               tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
+       }
+#ifdef CONFIG_ARCH_TEGRA_12x_SOC
+       if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
+               if (!modem_id) {
+                       tegra_ehci2_device.dev.platform_data =
+                               &tegra_ehci2_utmi_pdata;
+                       platform_device_register(&tegra_ehci2_device);
+               }
+       }
+#endif
+       if (!(usb_port_owner_info & UTMI3_PORT_OWNER_XUSB)) {
+               tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
+               platform_device_register(&tegra_ehci3_device);
+       }
+}
+
+static struct tegra_xusb_board_data xusb_bdata = {
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+       .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_USB2_P1,
+       .supply = {
+               .s5p0v = "usb_vbus0",
+               .s5p0v1 = "usb_vbus1",
+               .s5p0v2 = "usb_vbus2",
+               .s3p3v = "hvdd_usb",
+               .s1p8v = "avdd_usb_pll",
+               .s1p2v = "vddio_hsic",
+               .s1p05v = "avddio_usb",
+       },
+#else
+       .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_SS_P1 |
+                       TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_USB2_P2,
+       .supply = {
+               .s5p0v = "usb_vbus0",
+               .s5p0v1 = "usb_vbus1",
+               .s5p0v2 = "usb_vbus2",
+               .s3p3v = "hvdd_usb",
+               .s1p8v = "avdd_pll_utmip",
+               .s1p2v = "vddio_hsic",
+               .s1p05v = "avddio_usb",
+       },
+#endif
+       .uses_external_pmic = false,
+       .uses_different_vbus_per_port = true,
+};
+
+static void loki_xusb_init(void)
+{
+       int usb_port_owner_info = tegra_get_usb_port_owner_info();
+
+       xusb_bdata.lane_owner = (u8) tegra_get_lane_owner_info();
+
+       if (board_info.board_id == BOARD_PM359 ||
+                       board_info.board_id == BOARD_PM358 ||
+                       board_info.board_id == BOARD_PM363) {
+               /* Laguna */
+               xusb_bdata.gpio_controls_muxed_ss_lanes = true;
+               /* D[0:15] = gpio number and D[16:31] = output value*/
+               xusb_bdata.gpio_ss1_sata = PMU_TCA6416_GPIO(11) | (0 << 16);
+               xusb_bdata.ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
+                       (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 4);
+
+               if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
+                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                               TEGRA_XUSB_SS_P0);
+
+               if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
+                       xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                               TEGRA_XUSB_SS_P1);
+
+               /* FIXME Add for UTMIP2 when have odmdata assigend */
+       } else {
+               /* Loki */
+               xusb_bdata.gpio_controls_muxed_ss_lanes = false;
+
+               if (board_info.board_id == BOARD_E1781) {
+                       pr_info("Shield ERS-S. 0x%x\n", board_info.board_id);
+                       /* Shield ERS-S */
+                       xusb_bdata.ss_portmap =
+                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 0) |
+                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
+
+                       if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
+                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
+
+                       if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
+                               xusb_bdata.portmap &= ~(
+                                       TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0 |
+                                       TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
+               } else {
+                       pr_info("Shield ERS 0x%x\n", board_info.board_id);
+                       /* Shield ERS */
+                       xusb_bdata.ss_portmap =
+                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
+                               (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
+
+                       if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
+                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
+                                       TEGRA_XUSB_SS_P0);
+
+                       if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
+                               xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
+                                       TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
+               }
+               /* FIXME Add for UTMIP2 when have odmdata assigend */
+       }
+       if (xusb_bdata.portmap)
+               tegra_xusb_init(&xusb_bdata);
+}
+
+static int baseband_init(void)
+{
+       int ret;
+
+       ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
+       if (ret) {
+               pr_warn("%s:gpio request failed\n", __func__);
+               return ret;
+       }
+
+       /* enable pull-down for MDM_COLD_BOOT */
+       tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
+                                   TEGRA_PUPD_PULL_DOWN);
+
+       /* export GPIO for user space access through sysfs */
+       gpio_export(MDM_RST, false);
+
+       return 0;
+}
+
+static const struct tegra_modem_operations baseband_operations = {
+       .init = baseband_init,
+};
+
+static struct tegra_usb_modem_power_platform_data baseband_pdata = {
+       .ops = &baseband_operations,
+       .regulator_name = "vdd_wwan_mdm",
+       .wake_gpio = -1,
+       .boot_gpio = MDM_COLDBOOT,
+       .boot_irq_flags = IRQF_TRIGGER_RISING |
+                                   IRQF_TRIGGER_FALLING |
+                                   IRQF_ONESHOT,
+       .autosuspend_delay = 2000,
+       .short_autosuspend_delay = 50,
+       .tegra_ehci_device = &tegra_ehci2_device,
+       .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
+};
+
+static struct platform_device icera_bruce_device = {
+       .name = "tegra_usb_modem_power",
+       .id = -1,
+       .dev = {
+               .platform_data = &baseband_pdata,
+       },
+};
+
+static void loki_modem_init(void)
+{
+       int modem_id = tegra_get_modem_id();
+       struct board_info board_info;
+       int usb_port_owner_info = tegra_get_usb_port_owner_info();
+
+       tegra_get_board_info(&board_info);
+       pr_info("%s: modem_id = %d\n", __func__, modem_id);
+
+       switch (modem_id) {
+       case TEGRA_BB_BRUCE:
+               if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
+                       platform_device_register(&icera_bruce_device);
+               break;
+       case TEGRA_BB_HSIC_HUB: /* HSIC hub */
+               if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
+                       tegra_ehci2_device.dev.platform_data =
+                               &tegra_ehci2_hsic_smsc_hub_pdata;
+                       platform_device_register(&tegra_ehci2_device);
+               }
+               break;
+       default:
+               return;
+       }
+}
+
+#ifndef CONFIG_USE_OF
+static struct platform_device *loki_spi_devices[] __initdata = {
+       &tegra11_spi_device1,
+       &tegra11_spi_device4,
+};
+
+static struct tegra_spi_platform_data loki_spi1_pdata = {
+       .dma_req_sel            = 15,
+       .spi_max_frequency      = 25000000,
+       .clock_always_on        = false,
+};
+
+static struct tegra_spi_platform_data loki_spi4_pdata = {
+       .dma_req_sel            = 18,
+       .spi_max_frequency      = 25000000,
+       .clock_always_on        = false,
+};
+
+static void __init loki_spi_init(void)
+{
+       tegra11_spi_device1.dev.platform_data = &loki_spi1_pdata;
+       tegra11_spi_device4.dev.platform_data = &loki_spi4_pdata;
+       platform_add_devices(loki_spi_devices,
+                       ARRAY_SIZE(loki_spi_devices));
+}
+#else
+static void __init loki_spi_init(void)
+{
+}
+#endif
+
+#ifdef CONFIG_USE_OF
+struct of_dev_auxdata loki_auxdata_lookup[] __initdata = {
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+       /* sdhci and i2c dt support not planned for bringup */
+       OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
+                               NULL),
+#if 0
+       OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
+                               &loki_tegra_sdhci_platform_data0),
+#endif
+       OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c000, "tegra11-i2c.0",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c400, "tegra11-i2c.1",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c700, "tegra11-i2c.3",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000d000, "tegra11-i2c.4",
+                               NULL),
+#endif
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
+                               NULL),
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+       OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra-audio-rt5645", 0x0, "tegra-snd-rt5645",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra-audio-rt5639", 0x0, "tegra-snd-rt5639",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-apbdma",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
+                               NULL),
+#else
+       OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
+               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
+               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
+#endif
+       OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006000, "serial-tegra.0",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006040, "serial-tegra.1",
+                               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
+                               NULL),
+       {}
+};
+#endif
+
+static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
+       /* name         parent          rate            enabled */
+       { "extern2",    "pll_p",        41000000,       false},
+       { "clk_out_2",  "extern2",      40800000,       false},
+       { NULL,         NULL,           0,              0},
+};
+
+struct rm_spi_ts_platform_data rm31080ts_loki_data = {
+       .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
+       .config = 0,
+       .platform_id = RM_PLATFORM_D010,
+       .name_of_clock = "clk_out_2",
+       .name_of_clock_con = "extern2",
+};
+
+static struct tegra_spi_device_controller_data dev_cdata = {
+       .rx_clk_tap_delay = 0,
+       .tx_clk_tap_delay = 16,
+};
+
+struct spi_board_info rm31080a_loki_spi_board[1] = {
+       {
+               .modalias = "rm_ts_spidev",
+               .bus_num = TOUCH_SPI_ID,
+               .chip_select = TOUCH_SPI_CS,
+               .max_speed_hz = 12 * 1000 * 1000,
+               .mode = SPI_MODE_0,
+               .controller_data = &dev_cdata,
+               .platform_data = &rm31080ts_loki_data,
+       },
+};
+
+static int __init loki_touch_init(void)
+{
+       tegra_clk_init_from_table(touch_clk_init_table);
+       rm31080a_loki_spi_board[0].irq =
+               gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
+       touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
+                               TOUCH_GPIO_RST_RAYDIUM_SPI,
+                               &rm31080ts_loki_data,
+                               &rm31080a_loki_spi_board[0],
+                               ARRAY_SIZE(rm31080a_loki_spi_board));
+       return 0;
+}
+
+static void __init tegra_loki_early_init(void)
+{
+       tegra_clk_init_from_table(loki_clk_init_table);
+       tegra_clk_verify_parents();
+       tegra_soc_device_init("loki");
+}
+
+static void __init tegra_loki_late_init(void)
+{
+       struct board_info board_info;
+       tegra_get_board_info(&board_info);
+       pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
+               board_info.board_id, board_info.sku,
+               board_info.fab, board_info.major_revision,
+               board_info.minor_revision);
+       platform_device_register(&tegra_pinmux_device);
+       loki_pinmux_init();
+       loki_usb_init();
+       loki_modem_init();
+       loki_xusb_init();
+       loki_i2c_init();
+       loki_spi_init();
+       loki_uart_init();
+/*use board file for T12x*/
+#if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
+       loki_audio_init();
+#endif
+       platform_add_devices(loki_devices, ARRAY_SIZE(loki_devices));
+       //tegra_ram_console_debug_init();
+       tegra_io_dpd_init();
+       loki_sdhci_init();
+       loki_regulator_init();
+       loki_suspend_init();
+#if 0
+       loki_emc_init();
+       loki_edp_init();
+#endif
+       isomgr_init();
+       loki_touch_init();
+       loki_panel_init();
+       loki_kbc_init();
+       loki_pmon_init();
+       tegra_release_bootloader_fb();
+#ifdef CONFIG_TEGRA_WDT_RECOVERY
+       tegra_wdt_recovery_init();
+#endif
+       tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
+
+       loki_sensors_init();
+#if 0
+       loki_soctherm_init();
+#endif
+       loki_setup_bluedroid_pm();
+       tegra_register_fuse();
+       tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
+}
+
+static void __init loki_ramconsole_reserve(unsigned long size)
+{
+       tegra_ram_console_debug_reserve(SZ_1M);
+}
+
+static void __init tegra_loki_dt_init(void)
+{
+       tegra_get_board_info(&board_info);
+       tegra_get_display_board_info(&display_board_info);
+
+       tegra_loki_early_init();
+#ifdef CONFIG_USE_OF
+       of_platform_populate(NULL,
+               of_default_bus_match_table, loki_auxdata_lookup,
+               &platform_bus);
+       platform_device_register(&tegra_gpio_device);
+#endif
+
+       tegra_loki_late_init();
+}
+
+static void __init tegra_loki_reserve(void)
+{
+#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM) || \
+               defined(CONFIG_TEGRA_NO_CARVEOUT)
+       /* 1920*1200*4*2 = 18432000 bytes */
+       tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
+#else
+       tegra_reserve(SZ_1G, SZ_16M + SZ_2M, SZ_4M);
+#endif
+       loki_ramconsole_reserve(SZ_1M);
+}
+
+static const char * const loki_dt_board_compat[] = {
+       "nvidia,loki",
+       NULL
+};
+
+DT_MACHINE_START(LOKI, "loki")
+       .atag_offset    = 0x100,
+       .smp            = smp_ops(tegra_smp_ops),
+       .map_io         = tegra_map_common_io,
+       .reserve        = tegra_loki_reserve,
+#ifdef CONFIG_ARCH_TEGRA_12x_SOC
+       .init_early     = tegra12x_init_early,
+#else
+       .init_early     = tegra11x_init_early,
+#endif
+       .init_irq       = tegra_dt_init_irq,
+       .init_time      = tegra_init_timer,
+       .init_machine   = tegra_loki_dt_init,
+       .restart        = tegra_assert_system_reset,
+       .dt_compat      = loki_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-tegra/board-loki.h b/arch/arm/mach-tegra/board-loki.h
new file mode 100644 (file)
index 0000000..a2aa867
--- /dev/null
@@ -0,0 +1,148 @@
+/*
+ * arch/arm/mach-tegra/board-loki.h
+ *
+ * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef _MACH_TEGRA_BOARD_LOKI_H
+#define _MACH_TEGRA_BOARD_LOKI_H
+
+#include <linux/mfd/as3722-reg.h>
+#include <mach/gpio-tegra.h>
+#include <mach/irqs.h>
+#include "gpio-names.h"
+
+int loki_pinmux_init(void);
+int loki_panel_init(void);
+int loki_kbc_init(void);
+int loki_sdhci_init(void);
+int loki_sensors_init(void);
+int loki_regulator_init(void);
+int loki_suspend_init(void);
+int loki_pmon_init(void);
+
+/* Invensense MPU Definitions */
+#define MPU_GYRO_NAME          "mpu6050c"
+#define MPU_GYRO_IRQ_GPIO      TEGRA_GPIO_PS0
+#define MPU_GYRO_ADDR          0x68
+#define MPU_GYRO_BUS_NUM       0
+#define MPU_GYRO_ORIENTATION   MTMAT_TOP_CCW_0
+#define MPU_COMPASS_NAME       "ak8975"
+#define MPU_COMPASS_ADDR       0x0C
+#define MPU_COMPASS_ORIENTATION        MTMAT_BOT_CCW_270
+#define MPU_BMP_NAME           "bmp280"
+#define MPU_BMP_ADDR           0x77
+
+/* PCA954x I2C bus expander bus addresses */
+#define PCA954x_I2C_BUS_BASE    6
+#define PCA954x_I2C_BUS0        (PCA954x_I2C_BUS_BASE + 0)
+#define PCA954x_I2C_BUS1        (PCA954x_I2C_BUS_BASE + 1)
+#define PCA954x_I2C_BUS2        (PCA954x_I2C_BUS_BASE + 2)
+#define PCA954x_I2C_BUS3        (PCA954x_I2C_BUS_BASE + 3)
+
+
+#define PALMAS_TEGRA_GPIO_BASE TEGRA_NR_GPIOS
+#define PALMAS_TEGRA_IRQ_BASE  TEGRA_NR_IRQS
+#define AS3722_GPIO_BASE       TEGRA_NR_GPIOS
+#define AS3722_GPIO_END        (AS3722_GPIO_BASE + AS3722_NUM_GPIO)
+
+/* PMU_TCA6416 GPIOs */
+#define PMU_TCA6416_GPIO_BASE   (AS3722_GPIO_END)
+#define PMU_TCA6416_GPIO(x)     (PMU_TCA6416_GPIO_BASE + x)
+#define PMU_TCA6416_NR_GPIOS    18
+/* External peripheral act as interrupt controller */
+/* AS3720 IRQs */
+#define AS3722_IRQ_BASE         TEGRA_NR_IRQS
+
+#define CAM_RSTN TEGRA_GPIO_PBB3
+#define CAM_FLASH_STROBE TEGRA_GPIO_PBB4
+#define CAM2_PWDN TEGRA_GPIO_PBB6
+#define CAM1_PWDN TEGRA_GPIO_PBB5
+#define CAM_AF_PWDN TEGRA_GPIO_PBB7
+
+/* Modem related GPIOs */
+#define MODEM_EN               TEGRA_GPIO_PS4
+#define MDM_RST                        TEGRA_GPIO_PS3
+#define MDM_COLDBOOT           TEGRA_GPIO_PO5
+
+/* Baseband IDs */
+enum tegra_bb_type {
+       TEGRA_BB_BRUCE = 1,
+       TEGRA_BB_HSIC_HUB = 6,
+};
+
+#define UTMI1_PORT_OWNER_XUSB   0x1
+#define UTMI2_PORT_OWNER_XUSB   0x2
+#define UTMI3_PORT_OWNER_XUSB   0x4
+#define HSIC1_PORT_OWNER_XUSB   0x8
+
+/* Touchscreen definitions */
+#define TOUCH_GPIO_IRQ_RAYDIUM_SPI     TEGRA_GPIO_PK2
+#define TOUCH_GPIO_RST_RAYDIUM_SPI     TEGRA_GPIO_PK4
+#define TOUCH_SPI_ID                   0       /*SPI 1 on ardbeg_interposer*/
+#define TOUCH_SPI_CS                   0       /*CS  0 on ardbeg_interposer*/
+
+/* Audio-related GPIOs */
+/*Same GPIO's used for T114(Interposer) and T124*/
+/*Below GPIO's are same for Laguna and Loki*/
+#define TEGRA_GPIO_CDC_IRQ     TEGRA_GPIO_PH4
+#define TEGRA_GPIO_HP_DET              TEGRA_GPIO_PR7
+/*LDO_EN signal is required only for RT5639 and not for RT5645,
+on Laguna the LDO_EN signal comes from a GPIO expander and
+this is exposed as a fixed regulator directly handeled from
+machine driver of rt5639 and for ardebeg we use the below tegra
+GPIO, also the GPIO is same for T114 interposer and T124*/
+#define TEGRA_GPIO_LDO_EN      TEGRA_GPIO_PR2
+
+/*GPIOs used by board panel file */
+#define DSI_PANEL_RST_GPIO      TEGRA_GPIO_PH3
+#define DSI_PANEL_BL_PWM_GPIO   TEGRA_GPIO_PH1
+
+/* HDMI Hotplug detection pin */
+#define loki_hdmi_hpd  TEGRA_GPIO_PN7
+
+/* I2C related GPIOs */
+/* Same for interposer and t124 */
+#define TEGRA_GPIO_I2C1_SCL    TEGRA_GPIO_PC4
+#define TEGRA_GPIO_I2C1_SDA    TEGRA_GPIO_PC5
+#define TEGRA_GPIO_I2C2_SCL    TEGRA_GPIO_PT5
+#define TEGRA_GPIO_I2C2_SDA    TEGRA_GPIO_PT6
+#define TEGRA_GPIO_I2C3_SCL    TEGRA_GPIO_PBB1
+#define TEGRA_GPIO_I2C3_SDA    TEGRA_GPIO_PBB2
+#define TEGRA_GPIO_I2C4_SCL    TEGRA_GPIO_PV4
+#define TEGRA_GPIO_I2C4_SDA    TEGRA_GPIO_PV5
+#define TEGRA_GPIO_I2C5_SCL    TEGRA_GPIO_PZ6
+#define TEGRA_GPIO_I2C5_SDA    TEGRA_GPIO_PZ7
+
+/* AUO Display related GPIO */
+#define DSI_PANEL_RST_GPIO      TEGRA_GPIO_PH3 /* GMI_AD11 */
+#define LCD_RST_L               TEGRA_GPIO_PH5 /* GMI_AD13 */
+#define LCD_LR                  TEGRA_GPIO_PH6 /* GMI_AD14 */
+#define LCD_TE                  TEGRA_GPIO_PI4 /* GMI_RST_N */
+#define DSI_PANEL_BL_PWM        TEGRA_GPIO_PH1 /*GMI_AD9 */
+#define en_vdd_bl       TEGRA_GPIO_PP2 /* DAP3_DOUT */
+#define lvds_en         TEGRA_GPIO_PI0 /* GMI_WR_N */
+#define refclk_en       TEGRA_GPIO_PG4 /* GMI_AD4 */
+
+/* HID keyboard and trackpad irq same for interposer and t124 */
+#define I2C_KB_IRQ     TEGRA_GPIO_PC7
+#define I2C_TP_IRQ     TEGRA_GPIO_PW3
+
+/* TN8 specific */
+
+int tn8_regulator_init(void);
+
+#endif
index 7bd2767..6a850b7 100644 (file)
@@ -70,6 +70,7 @@
 #define BOARD_E1734    0x6c6
 #define BOARD_E1735    0x6c7
 #define BOARD_E1736    0x6c8
+#define BOARD_E2545    0x9f4
 
 /* Board Fab version */
 #define BOARD_FAB_A00                  0x0