ARM: tegra12: clock: Disable secondary dividers
Kaz Fukuoka [Wed, 28 Aug 2013 01:02:17 +0000 (18:02 -0700)]
Change-Id: I087e4f919203f36d990358ac07a5a4d6f94c9975
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/267573
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/tegra12_clocks.c

index 2638fe5..38df7f7 100644 (file)
@@ -3972,8 +3972,11 @@ static int tegra12_pll_div_clk_set_rate(struct clk *c, unsigned long rate);
 static void tegra12_pll_div_clk_init(struct clk *c)
 {
        if (c->flags & DIV_U71) {
-               u32 divu71;
-               u32 val = clk_readl(c->reg);
+               u32 val, divu71;
+               if (c->parent->state == OFF)
+                       c->ops->disable(c);
+
+               val = clk_readl(c->reg);
                val >>= c->reg_shift;
                c->state = (val & PLL_OUT_CLKEN) ? ON : OFF;
                if (!(val & PLL_OUT_RESET_DISABLE))