UAPI: (Scripted) Disintegrate arch/ia64/include/asm
David Howells [Tue, 9 Oct 2012 08:47:00 +0000 (09:47 +0100)]
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Kerrisk <mtk.manpages@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Dave Jones <davej@redhat.com>

60 files changed:
arch/ia64/include/asm/Kbuild
arch/ia64/include/asm/gcc_intrin.h
arch/ia64/include/asm/intrinsics.h
arch/ia64/include/asm/kvm_para.h
arch/ia64/include/asm/mman.h
arch/ia64/include/asm/param.h
arch/ia64/include/asm/perfmon.h
arch/ia64/include/asm/ptrace.h
arch/ia64/include/asm/siginfo.h
arch/ia64/include/asm/signal.h
arch/ia64/include/asm/termios.h
arch/ia64/include/asm/types.h
arch/ia64/include/asm/unistd.h
arch/ia64/include/asm/ustack.h
arch/ia64/include/uapi/asm/Kbuild
arch/ia64/include/uapi/asm/auxvec.h [moved from arch/ia64/include/asm/auxvec.h with 100% similarity]
arch/ia64/include/uapi/asm/bitsperlong.h [moved from arch/ia64/include/asm/bitsperlong.h with 100% similarity]
arch/ia64/include/uapi/asm/break.h [moved from arch/ia64/include/asm/break.h with 100% similarity]
arch/ia64/include/uapi/asm/byteorder.h [moved from arch/ia64/include/asm/byteorder.h with 100% similarity]
arch/ia64/include/uapi/asm/cmpxchg.h [moved from arch/ia64/include/asm/cmpxchg.h with 100% similarity]
arch/ia64/include/uapi/asm/errno.h [moved from arch/ia64/include/asm/errno.h with 100% similarity]
arch/ia64/include/uapi/asm/fcntl.h [moved from arch/ia64/include/asm/fcntl.h with 100% similarity]
arch/ia64/include/uapi/asm/fpu.h [moved from arch/ia64/include/asm/fpu.h with 100% similarity]
arch/ia64/include/uapi/asm/gcc_intrin.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/ia64regs.h [moved from arch/ia64/include/asm/ia64regs.h with 100% similarity]
arch/ia64/include/uapi/asm/intel_intrin.h [moved from arch/ia64/include/asm/intel_intrin.h with 100% similarity]
arch/ia64/include/uapi/asm/intrinsics.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/ioctl.h [moved from arch/ia64/include/asm/ioctl.h with 100% similarity]
arch/ia64/include/uapi/asm/ioctls.h [moved from arch/ia64/include/asm/ioctls.h with 100% similarity]
arch/ia64/include/uapi/asm/ipcbuf.h [moved from arch/ia64/include/asm/ipcbuf.h with 100% similarity]
arch/ia64/include/uapi/asm/kvm.h [moved from arch/ia64/include/asm/kvm.h with 100% similarity]
arch/ia64/include/uapi/asm/kvm_para.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/mman.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/msgbuf.h [moved from arch/ia64/include/asm/msgbuf.h with 100% similarity]
arch/ia64/include/uapi/asm/param.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/perfmon.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/perfmon_default_smpl.h [moved from arch/ia64/include/asm/perfmon_default_smpl.h with 100% similarity]
arch/ia64/include/uapi/asm/poll.h [moved from arch/ia64/include/asm/poll.h with 100% similarity]
arch/ia64/include/uapi/asm/posix_types.h [moved from arch/ia64/include/asm/posix_types.h with 100% similarity]
arch/ia64/include/uapi/asm/ptrace.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/ptrace_offsets.h [moved from arch/ia64/include/asm/ptrace_offsets.h with 100% similarity]
arch/ia64/include/uapi/asm/resource.h [moved from arch/ia64/include/asm/resource.h with 100% similarity]
arch/ia64/include/uapi/asm/rse.h [moved from arch/ia64/include/asm/rse.h with 100% similarity]
arch/ia64/include/uapi/asm/sembuf.h [moved from arch/ia64/include/asm/sembuf.h with 100% similarity]
arch/ia64/include/uapi/asm/setup.h [moved from arch/ia64/include/asm/setup.h with 100% similarity]
arch/ia64/include/uapi/asm/shmbuf.h [moved from arch/ia64/include/asm/shmbuf.h with 100% similarity]
arch/ia64/include/uapi/asm/sigcontext.h [moved from arch/ia64/include/asm/sigcontext.h with 100% similarity]
arch/ia64/include/uapi/asm/siginfo.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/signal.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/socket.h [moved from arch/ia64/include/asm/socket.h with 100% similarity]
arch/ia64/include/uapi/asm/sockios.h [moved from arch/ia64/include/asm/sockios.h with 100% similarity]
arch/ia64/include/uapi/asm/stat.h [moved from arch/ia64/include/asm/stat.h with 100% similarity]
arch/ia64/include/uapi/asm/statfs.h [moved from arch/ia64/include/asm/statfs.h with 100% similarity]
arch/ia64/include/uapi/asm/swab.h [moved from arch/ia64/include/asm/swab.h with 100% similarity]
arch/ia64/include/uapi/asm/termbits.h [moved from arch/ia64/include/asm/termbits.h with 100% similarity]
arch/ia64/include/uapi/asm/termios.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/types.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/ucontext.h [moved from arch/ia64/include/asm/ucontext.h with 100% similarity]
arch/ia64/include/uapi/asm/unistd.h [new file with mode: 0644]
arch/ia64/include/uapi/asm/ustack.h [new file with mode: 0644]

index 58f3d14..3c39961 100644 (file)
@@ -1,16 +1,2 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += break.h
-header-y += cmpxchg.h
-header-y += fpu.h
-header-y += gcc_intrin.h
-header-y += ia64regs.h
-header-y += intel_intrin.h
-header-y += intrinsics.h
-header-y += perfmon.h
-header-y += perfmon_default_smpl.h
-header-y += ptrace_offsets.h
-header-y += rse.h
-header-y += ucontext.h
-header-y += ustack.h
 generic-y += clkdev.h
index 21ddee5..f9495b1 100644 (file)
-#ifndef _ASM_IA64_GCC_INTRIN_H
-#define _ASM_IA64_GCC_INTRIN_H
 /*
  *
  * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
  * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
  */
+#ifndef _ASM_IA64_GCC_INTRIN_H
+#define _ASM_IA64_GCC_INTRIN_H
 
-#include <linux/types.h>
-#include <linux/compiler.h>
-
-/* define this macro to get some asm stmts included in 'c' files */
-#define ASM_SUPPORTED
-
-/* Optimization barrier */
-/* The "volatile" is due to gcc bugs */
-#define ia64_barrier() asm volatile ("":::"memory")
-
-#define ia64_stop()    asm volatile (";;"::)
-
-#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
-
-#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
-
-#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
-
-#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
-
-extern void ia64_bad_param_for_setreg (void);
-extern void ia64_bad_param_for_getreg (void);
+#include <uapi/asm/gcc_intrin.h>
 
-#ifdef __KERNEL__
 register unsigned long ia64_r13 asm ("r13") __used;
-#endif
-
-#define ia64_native_setreg(regnum, val)                                                \
-({                                                                             \
-       switch (regnum) {                                                       \
-           case _IA64_REG_PSR_L:                                               \
-                   asm volatile ("mov psr.l=%0" :: "r"(val) : "memory");       \
-                   break;                                                      \
-           case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:                          \
-                   asm volatile ("mov ar%0=%1" ::                              \
-                                         "i" (regnum - _IA64_REG_AR_KR0),      \
-                                         "r"(val): "memory");                  \
-                   break;                                                      \
-           case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:                        \
-                   asm volatile ("mov cr%0=%1" ::                              \
-                                         "i" (regnum - _IA64_REG_CR_DCR),      \
-                                         "r"(val): "memory" );                 \
-                   break;                                                      \
-           case _IA64_REG_SP:                                                  \
-                   asm volatile ("mov r12=%0" ::                               \
-                                         "r"(val): "memory");                  \
-                   break;                                                      \
-           case _IA64_REG_GP:                                                  \
-                   asm volatile ("mov gp=%0" :: "r"(val) : "memory");          \
-               break;                                                          \
-           default:                                                            \
-                   ia64_bad_param_for_setreg();                                \
-                   break;                                                      \
-       }                                                                       \
-})
-
-#define ia64_native_getreg(regnum)                                             \
-({                                                                             \
-       __u64 ia64_intri_res;                                                   \
-                                                                               \
-       switch (regnum) {                                                       \
-       case _IA64_REG_GP:                                                      \
-               asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));              \
-               break;                                                          \
-       case _IA64_REG_IP:                                                      \
-               asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));              \
-               break;                                                          \
-       case _IA64_REG_PSR:                                                     \
-               asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));             \
-               break;                                                          \
-       case _IA64_REG_TP:      /* for current() */                             \
-               ia64_intri_res = ia64_r13;                                      \
-               break;                                                          \
-       case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:                              \
-               asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)             \
-                                     : "i"(regnum - _IA64_REG_AR_KR0));        \
-               break;                                                          \
-       case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:                            \
-               asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)             \
-                                     : "i" (regnum - _IA64_REG_CR_DCR));       \
-               break;                                                          \
-       case _IA64_REG_SP:                                                      \
-               asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));             \
-               break;                                                          \
-       default:                                                                \
-               ia64_bad_param_for_getreg();                                    \
-               break;                                                          \
-       }                                                                       \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_hint_pause 0
-
-#define ia64_hint(mode)                                                \
-({                                                             \
-       switch (mode) {                                         \
-       case ia64_hint_pause:                                   \
-               asm volatile ("hint @pause" ::: "memory");      \
-               break;                                          \
-       }                                                       \
-})
-
-
-/* Integer values for mux1 instruction */
-#define ia64_mux1_brcst 0
-#define ia64_mux1_mix   8
-#define ia64_mux1_shuf  9
-#define ia64_mux1_alt  10
-#define ia64_mux1_rev  11
-
-#define ia64_mux1(x, mode)                                                     \
-({                                                                             \
-       __u64 ia64_intri_res;                                                   \
-                                                                               \
-       switch (mode) {                                                         \
-       case ia64_mux1_brcst:                                                   \
-               asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x));    \
-               break;                                                          \
-       case ia64_mux1_mix:                                                     \
-               asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x));      \
-               break;                                                          \
-       case ia64_mux1_shuf:                                                    \
-               asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x));     \
-               break;                                                          \
-       case ia64_mux1_alt:                                                     \
-               asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x));      \
-               break;                                                          \
-       case ia64_mux1_rev:                                                     \
-               asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x));      \
-               break;                                                          \
-       }                                                                       \
-       ia64_intri_res;                                                         \
-})
-
-#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
-# define ia64_popcnt(x)                __builtin_popcountl(x)
-#else
-# define ia64_popcnt(x)                                                \
-  ({                                                           \
-       __u64 ia64_intri_res;                                   \
-       asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
-                                                               \
-       ia64_intri_res;                                         \
-  })
-#endif
-
-#define ia64_getf_exp(x)                                       \
-({                                                             \
-       long ia64_intri_res;                                    \
-                                                               \
-       asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
-                                                               \
-       ia64_intri_res;                                         \
-})
-
-#define ia64_shrp(a, b, count)                                                         \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count));   \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_ldfs(regnum, x)                                   \
-({                                                             \
-       register double __f__ asm ("f"#regnum);                 \
-       asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x));     \
-})
-
-#define ia64_ldfd(regnum, x)                                   \
-({                                                             \
-       register double __f__ asm ("f"#regnum);                 \
-       asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x));     \
-})
-
-#define ia64_ldfe(regnum, x)                                   \
-({                                                             \
-       register double __f__ asm ("f"#regnum);                 \
-       asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x));     \
-})
-
-#define ia64_ldf8(regnum, x)                                   \
-({                                                             \
-       register double __f__ asm ("f"#regnum);                 \
-       asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x));     \
-})
-
-#define ia64_ldf_fill(regnum, x)                               \
-({                                                             \
-       register double __f__ asm ("f"#regnum);                 \
-       asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
-})
-
-#define ia64_st4_rel_nta(m, val)                                       \
-({                                                                     \
-       asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
-})
-
-#define ia64_stfs(x, regnum)                                           \
-({                                                                     \
-       register double __f__ asm ("f"#regnum);                         \
-       asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
-})
-
-#define ia64_stfd(x, regnum)                                           \
-({                                                                     \
-       register double __f__ asm ("f"#regnum);                         \
-       asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
-})
-
-#define ia64_stfe(x, regnum)                                           \
-({                                                                     \
-       register double __f__ asm ("f"#regnum);                         \
-       asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
-})
-
-#define ia64_stf8(x, regnum)                                           \
-({                                                                     \
-       register double __f__ asm ("f"#regnum);                         \
-       asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
-})
-
-#define ia64_stf_spill(x, regnum)                                              \
-({                                                                             \
-       register double __f__ asm ("f"#regnum);                                 \
-       asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory");    \
-})
-
-#define ia64_fetchadd4_acq(p, inc)                                             \
-({                                                                             \
-                                                                               \
-       __u64 ia64_intri_res;                                                   \
-       asm volatile ("fetchadd4.acq %0=[%1],%2"                                \
-                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
-                               : "memory");                                    \
-                                                                               \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_fetchadd4_rel(p, inc)                                             \
-({                                                                             \
-       __u64 ia64_intri_res;                                                   \
-       asm volatile ("fetchadd4.rel %0=[%1],%2"                                \
-                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
-                               : "memory");                                    \
-                                                                               \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_fetchadd8_acq(p, inc)                                             \
-({                                                                             \
-                                                                               \
-       __u64 ia64_intri_res;                                                   \
-       asm volatile ("fetchadd8.acq %0=[%1],%2"                                \
-                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
-                               : "memory");                                    \
-                                                                               \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_fetchadd8_rel(p, inc)                                             \
-({                                                                             \
-       __u64 ia64_intri_res;                                                   \
-       asm volatile ("fetchadd8.rel %0=[%1],%2"                                \
-                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
-                               : "memory");                                    \
-                                                                               \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_xchg1(ptr,x)                                                      \
-({                                                                             \
-       __u64 ia64_intri_res;                                                   \
-       asm volatile ("xchg1 %0=[%1],%2"                                        \
-                     : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_xchg2(ptr,x)                                              \
-({                                                                     \
-       __u64 ia64_intri_res;                                           \
-       asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res)        \
-                     : "r" (ptr), "r" (x) : "memory");                 \
-       ia64_intri_res;                                                 \
-})
-
-#define ia64_xchg4(ptr,x)                                              \
-({                                                                     \
-       __u64 ia64_intri_res;                                           \
-       asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res)        \
-                     : "r" (ptr), "r" (x) : "memory");                 \
-       ia64_intri_res;                                                 \
-})
-
-#define ia64_xchg8(ptr,x)                                              \
-({                                                                     \
-       __u64 ia64_intri_res;                                           \
-       asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res)        \
-                     : "r" (ptr), "r" (x) : "memory");                 \
-       ia64_intri_res;                                                 \
-})
-
-#define ia64_cmpxchg1_acq(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg1_rel(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg2_acq(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg2_rel(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-                                                                                       \
-       asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg4_acq(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg4_rel(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg8_acq(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-       asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_cmpxchg8_rel(ptr, new, old)                                               \
-({                                                                                     \
-       __u64 ia64_intri_res;                                                           \
-       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
-                                                                                       \
-       asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":                                 \
-                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
-       ia64_intri_res;                                                                 \
-})
-
-#define ia64_mf()      asm volatile ("mf" ::: "memory")
-#define ia64_mfa()     asm volatile ("mf.a" ::: "memory")
-
-#define ia64_invala() asm volatile ("invala" ::: "memory")
-
-#define ia64_native_thash(addr)                                                        \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));       \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_srlz_i()  asm volatile (";; srlz.i ;;" ::: "memory")
-#define ia64_srlz_d()  asm volatile (";; srlz.d" ::: "memory");
-
-#ifdef HAVE_SERIALIZE_DIRECTIVE
-# define ia64_dv_serialize_data()              asm volatile (".serialize.data");
-# define ia64_dv_serialize_instruction()       asm volatile (".serialize.instruction");
-#else
-# define ia64_dv_serialize_data()
-# define ia64_dv_serialize_instruction()
-#endif
-
-#define ia64_nop(x)    asm volatile ("nop %0"::"i"(x));
-
-#define ia64_itci(addr)        asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
-
-#define ia64_itcd(addr)        asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
-
-
-#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1"                                \
-                                            :: "r"(trnum), "r"(addr) : "memory")
-
-#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1"                                \
-                                            :: "r"(trnum), "r"(addr) : "memory")
-
-#define ia64_tpa(addr)                                                         \
-({                                                                             \
-       unsigned long ia64_pa;                                                  \
-       asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory");    \
-       ia64_pa;                                                                \
-})
-
-#define __ia64_set_dbr(index, val)                                             \
-       asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_ibr(index, val)                                               \
-       asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pkr(index, val)                                               \
-       asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pmc(index, val)                                               \
-       asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pmd(index, val)                                               \
-       asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_native_set_rr(index, val)                                                 \
-       asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
-
-#define ia64_native_get_cpuid(index)                                                   \
-({                                                                                     \
-       unsigned long ia64_intri_res;                                                   \
-       asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));        \
-       ia64_intri_res;                                                                 \
-})
-
-#define __ia64_get_dbr(index)                                                  \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_get_ibr(index)                                                    \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_get_pkr(index)                                                    \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_get_pmc(index)                                                    \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
-       ia64_intri_res;                                                         \
-})
-
-
-#define ia64_native_get_pmd(index)                                             \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_native_get_rr(index)                                              \
-({                                                                             \
-       unsigned long ia64_intri_res;                                           \
-       asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));    \
-       ia64_intri_res;                                                         \
-})
-
-#define ia64_native_fc(addr)   asm volatile ("fc %0" :: "r"(addr) : "memory")
-
-
-#define ia64_sync_i()  asm volatile (";; sync.i" ::: "memory")
-
-#define ia64_native_ssm(mask)  asm volatile ("ssm %0":: "i"((mask)) : "memory")
-#define ia64_native_rsm(mask)  asm volatile ("rsm %0":: "i"((mask)) : "memory")
-#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
-#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
-
-#define ia64_ptce(addr)        asm volatile ("ptc.e %0" :: "r"(addr))
-
-#define ia64_native_ptcga(addr, size)                                          \
-do {                                                                           \
-       asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");       \
-       ia64_dv_serialize_data();                                               \
-} while (0)
-
-#define ia64_ptcl(addr, size)                                                  \
-do {                                                                           \
-       asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory");        \
-       ia64_dv_serialize_data();                                               \
-} while (0)
-
-#define ia64_ptri(addr, size)                                          \
-       asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
-
-#define ia64_ptrd(addr, size)                                          \
-       asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
-
-#define ia64_ttag(addr)                                                        \
-({                                                                       \
-       __u64 ia64_intri_res;                                              \
-       asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr));   \
-       ia64_intri_res;                                                  \
-})
-
-
-/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
-
-#define ia64_lfhint_none   0
-#define ia64_lfhint_nt1    1
-#define ia64_lfhint_nt2    2
-#define ia64_lfhint_nta    3
-
-#define ia64_lfetch(lfhint, y)                                 \
-({                                                             \
-        switch (lfhint) {                                      \
-        case ia64_lfhint_none:                                 \
-                asm volatile ("lfetch [%0]" : : "r"(y));       \
-                break;                                         \
-        case ia64_lfhint_nt1:                                  \
-                asm volatile ("lfetch.nt1 [%0]" : : "r"(y));   \
-                break;                                         \
-        case ia64_lfhint_nt2:                                  \
-                asm volatile ("lfetch.nt2 [%0]" : : "r"(y));   \
-                break;                                         \
-        case ia64_lfhint_nta:                                  \
-                asm volatile ("lfetch.nta [%0]" : : "r"(y));   \
-                break;                                         \
-        }                                                      \
-})
-
-#define ia64_lfetch_excl(lfhint, y)                                    \
-({                                                                     \
-        switch (lfhint) {                                              \
-        case ia64_lfhint_none:                                         \
-                asm volatile ("lfetch.excl [%0]" :: "r"(y));           \
-                break;                                                 \
-        case ia64_lfhint_nt1:                                          \
-                asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y));       \
-                break;                                                 \
-        case ia64_lfhint_nt2:                                          \
-                asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y));       \
-                break;                                                 \
-        case ia64_lfhint_nta:                                          \
-                asm volatile ("lfetch.excl.nta [%0]" :: "r"(y));       \
-                break;                                                 \
-        }                                                              \
-})
-
-#define ia64_lfetch_fault(lfhint, y)                                   \
-({                                                                     \
-        switch (lfhint) {                                              \
-        case ia64_lfhint_none:                                         \
-                asm volatile ("lfetch.fault [%0]" : : "r"(y));         \
-                break;                                                 \
-        case ia64_lfhint_nt1:                                          \
-                asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y));     \
-                break;                                                 \
-        case ia64_lfhint_nt2:                                          \
-                asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y));     \
-                break;                                                 \
-        case ia64_lfhint_nta:                                          \
-                asm volatile ("lfetch.fault.nta [%0]" : : "r"(y));     \
-                break;                                                 \
-        }                                                              \
-})
-
-#define ia64_lfetch_fault_excl(lfhint, y)                              \
-({                                                                     \
-        switch (lfhint) {                                              \
-        case ia64_lfhint_none:                                         \
-                asm volatile ("lfetch.fault.excl [%0]" :: "r"(y));     \
-                break;                                                 \
-        case ia64_lfhint_nt1:                                          \
-                asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
-                break;                                                 \
-        case ia64_lfhint_nt2:                                          \
-                asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
-                break;                                                 \
-        case ia64_lfhint_nta:                                          \
-                asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
-                break;                                                 \
-        }                                                              \
-})
-
-#define ia64_native_intrin_local_irq_restore(x)                        \
-do {                                                           \
-       asm volatile (";;   cmp.ne p6,p7=%0,r0;;"               \
-                     "(p6) ssm psr.i;"                         \
-                     "(p7) rsm psr.i;;"                        \
-                     "(p6) srlz.d"                             \
-                     :: "r"((x)) : "p6", "p7", "memory");      \
-} while (0)
-
 #endif /* _ASM_IA64_GCC_INTRIN_H */
index d129e36..20477ea 100644 (file)
@@ -1,99 +1,16 @@
-#ifndef _ASM_IA64_INTRINSICS_H
-#define _ASM_IA64_INTRINSICS_H
-
 /*
  * Compiler-dependent intrinsics.
  *
  * Copyright (C) 2002-2003 Hewlett-Packard Co
  *     David Mosberger-Tang <davidm@hpl.hp.com>
  */
+#ifndef _ASM_IA64_INTRINSICS_H
+#define _ASM_IA64_INTRINSICS_H
 
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-/* include compiler specific intrinsics */
-#include <asm/ia64regs.h>
-#ifdef __INTEL_COMPILER
-# include <asm/intel_intrin.h>
-#else
-# include <asm/gcc_intrin.h>
-#endif
-#include <asm/cmpxchg.h>
-
-#define ia64_native_get_psr_i()        (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
-
-#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4)       \
-do {                                                                   \
-       ia64_native_set_rr(0x0000000000000000UL, (val0));               \
-       ia64_native_set_rr(0x2000000000000000UL, (val1));               \
-       ia64_native_set_rr(0x4000000000000000UL, (val2));               \
-       ia64_native_set_rr(0x6000000000000000UL, (val3));               \
-       ia64_native_set_rr(0x8000000000000000UL, (val4));               \
-} while (0)
-
-/*
- * Force an unresolved reference if someone tries to use
- * ia64_fetch_and_add() with a bad value.
- */
-extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
-extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
-
-#define IA64_FETCHADD(tmp,v,n,sz,sem)                                          \
-({                                                                             \
-       switch (sz) {                                                           \
-             case 4:                                                           \
-               tmp = ia64_fetchadd4_##sem((unsigned int *) v, n);              \
-               break;                                                          \
-                                                                               \
-             case 8:                                                           \
-               tmp = ia64_fetchadd8_##sem((unsigned long *) v, n);             \
-               break;                                                          \
-                                                                               \
-             default:                                                          \
-               __bad_size_for_ia64_fetch_and_add();                            \
-       }                                                                       \
-})
-
-#define ia64_fetchadd(i,v,sem)                                                         \
-({                                                                                     \
-       __u64 _tmp;                                                                     \
-       volatile __typeof__(*(v)) *_v = (v);                                            \
-       /* Can't use a switch () here: gcc isn't always smart enough for that... */     \
-       if ((i) == -16)                                                                 \
-               IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem);                        \
-       else if ((i) == -8)                                                             \
-               IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem);                         \
-       else if ((i) == -4)                                                             \
-               IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem);                         \
-       else if ((i) == -1)                                                             \
-               IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem);                         \
-       else if ((i) == 1)                                                              \
-               IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem);                          \
-       else if ((i) == 4)                                                              \
-               IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem);                          \
-       else if ((i) == 8)                                                              \
-               IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem);                          \
-       else if ((i) == 16)                                                             \
-               IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem);                         \
-       else                                                                            \
-               _tmp = __bad_increment_for_ia64_fetch_and_add();                        \
-       (__typeof__(*(v))) (_tmp);      /* return old value */                          \
-})
-
-#define ia64_fetch_and_add(i,v)        (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
-
-#endif
-
-#ifdef __KERNEL__
 #include <asm/paravirt_privop.h>
-#endif
+#include <uapi/asm/intrinsics.h>
 
 #ifndef __ASSEMBLY__
-
-#define IA64_INTRINSIC_API(name)       ia64_native_ ## name
-#define IA64_INTRINSIC_MACRO(name)     ia64_native_ ## name
-
-#if defined(__KERNEL__)
 #if defined(CONFIG_PARAVIRT)
 # undef IA64_INTRINSIC_API
 # undef IA64_INTRINSIC_MACRO
@@ -104,36 +21,5 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
 # endif
 #define IA64_INTRINSIC_MACRO(name)     paravirt_ ## name
 #endif
-#endif
-
-/************************************************/
-/* Instructions paravirtualized for correctness */
-/************************************************/
-/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
-/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
- * is not currently used (though it may be in a long-format VHPT system!)
- */
-#define ia64_fc                                IA64_INTRINSIC_API(fc)
-#define ia64_thash                     IA64_INTRINSIC_API(thash)
-#define ia64_get_cpuid                 IA64_INTRINSIC_API(get_cpuid)
-#define ia64_get_pmd                   IA64_INTRINSIC_API(get_pmd)
-
-
-/************************************************/
-/* Instructions paravirtualized for performance */
-/************************************************/
-#define ia64_ssm                       IA64_INTRINSIC_MACRO(ssm)
-#define ia64_rsm                       IA64_INTRINSIC_MACRO(rsm)
-#define ia64_getreg                    IA64_INTRINSIC_MACRO(getreg)
-#define ia64_setreg                    IA64_INTRINSIC_API(setreg)
-#define ia64_set_rr                    IA64_INTRINSIC_API(set_rr)
-#define ia64_get_rr                    IA64_INTRINSIC_API(get_rr)
-#define ia64_ptcga                     IA64_INTRINSIC_API(ptcga)
-#define ia64_get_psr_i                 IA64_INTRINSIC_API(get_psr_i)
-#define ia64_intrin_local_irq_restore  \
-       IA64_INTRINSIC_API(intrin_local_irq_restore)
-#define ia64_set_rr0_to_rr4            IA64_INTRINSIC_API(set_rr0_to_rr4)
-
 #endif /* !__ASSEMBLY__ */
-
 #endif /* _ASM_IA64_INTRINSICS_H */
index 2019cb9..47c00f9 100644 (file)
@@ -1,6 +1,3 @@
-#ifndef __IA64_KVM_PARA_H
-#define __IA64_KVM_PARA_H
-
 /*
  * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
  *
  * Place - Suite 330, Boston, MA 02111-1307 USA.
  *
  */
+#ifndef __IA64_KVM_PARA_H
+#define __IA64_KVM_PARA_H
+
+#include <uapi/asm/kvm_para.h>
 
-#ifdef __KERNEL__
 
 static inline unsigned int kvm_arch_para_features(void)
 {
@@ -32,5 +32,3 @@ static inline bool kvm_check_and_clear_guest_paused(void)
 }
 
 #endif
-
-#endif
index 4459028..fdd5f52 100644 (file)
@@ -1,23 +1,17 @@
-#ifndef _ASM_IA64_MMAN_H
-#define _ASM_IA64_MMAN_H
-
 /*
  * Based on <asm-i386/mman.h>.
  *
  * Modified 1998-2000, 2002
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_MMAN_H
+#define _ASM_IA64_MMAN_H
 
-#include <asm-generic/mman.h>
-
-#define MAP_GROWSUP    0x0200          /* register stack-like segment */
+#include <uapi/asm/mman.h>
 
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 #define arch_mmap_check        ia64_mmap_check
 int ia64_mmap_check(unsigned long addr, unsigned long len,
                unsigned long flags);
 #endif
-#endif
-
 #endif /* _ASM_IA64_MMAN_H */
index 0964c32..1295913 100644 (file)
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_PARAM_H
-#define _ASM_IA64_PARAM_H
-
 /*
  * Fundamental kernel parameters.
  *
@@ -9,25 +6,12 @@
  * Modified 1998, 1999, 2002-2003
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_PARAM_H
+#define _ASM_IA64_PARAM_H
 
-#define EXEC_PAGESIZE  65536
-
-#ifndef NOGROUP
-# define NOGROUP       (-1)
-#endif
-
-#define MAXHOSTNAMELEN 64      /* max length of hostname */
+#include <uapi/asm/param.h>
 
-#ifdef __KERNEL__
 # define HZ            CONFIG_HZ
 # define USER_HZ       HZ
 # define CLOCKS_PER_SEC        HZ      /* frequency at which times() counts */
-#else
-   /*
-    * Technically, this is wrong, but some old apps still refer to it.  The proper way to
-    * get the HZ value is via sysconf(_SC_CLK_TCK).
-    */
-# define HZ 1024
-#endif
-
 #endif /* _ASM_IA64_PARAM_H */
index d551183..15476dd 100644 (file)
  * Copyright (C) 2001-2003 Hewlett-Packard Co
  *               Stephane Eranian <eranian@hpl.hp.com>
  */
-
 #ifndef _ASM_IA64_PERFMON_H
 #define _ASM_IA64_PERFMON_H
 
-/*
- * perfmon commands supported on all CPU models
- */
-#define PFM_WRITE_PMCS         0x01
-#define PFM_WRITE_PMDS         0x02
-#define PFM_READ_PMDS          0x03
-#define PFM_STOP               0x04
-#define PFM_START              0x05
-#define PFM_ENABLE             0x06 /* obsolete */
-#define PFM_DISABLE            0x07 /* obsolete */
-#define PFM_CREATE_CONTEXT     0x08
-#define PFM_DESTROY_CONTEXT    0x09 /* obsolete use close() */
-#define PFM_RESTART            0x0a
-#define PFM_PROTECT_CONTEXT    0x0b /* obsolete */
-#define PFM_GET_FEATURES       0x0c
-#define PFM_DEBUG              0x0d
-#define PFM_UNPROTECT_CONTEXT  0x0e /* obsolete */
-#define PFM_GET_PMC_RESET_VAL  0x0f
-#define PFM_LOAD_CONTEXT       0x10
-#define PFM_UNLOAD_CONTEXT     0x11
-
-/*
- * PMU model specific commands (may not be supported on all PMU models)
- */
-#define PFM_WRITE_IBRS         0x20
-#define PFM_WRITE_DBRS         0x21
-
-/*
- * context flags
- */
-#define PFM_FL_NOTIFY_BLOCK             0x01   /* block task on user level notifications */
-#define PFM_FL_SYSTEM_WIDE      0x02   /* create a system wide context */
-#define PFM_FL_OVFL_NO_MSG      0x80   /* do not post overflow/end messages for notification */
-
-/*
- * event set flags
- */
-#define PFM_SETFL_EXCL_IDLE      0x01   /* exclude idle task (syswide only) XXX: DO NOT USE YET */
-
-/*
- * PMC flags
- */
-#define PFM_REGFL_OVFL_NOTIFY  0x1     /* send notification on overflow */
-#define PFM_REGFL_RANDOM       0x2     /* randomize sampling interval   */
-
-/*
- * PMD/PMC/IBR/DBR return flags (ignored on input)
- *
- * Those flags are used on output and must be checked in case EAGAIN is returned
- * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
- */
-#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
-#define PFM_REG_RETFL_EINVAL   (1UL<<30) /* set if register entry is invalid */
-#define PFM_REG_RETFL_MASK     (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
-
-#define PFM_REG_HAS_ERROR(flag)        (((flag) & PFM_REG_RETFL_MASK) != 0)
-
-typedef unsigned char pfm_uuid_t[16];  /* custom sampling buffer identifier type */
-
-/*
- * Request structure used to define a context
- */
-typedef struct {
-       pfm_uuid_t     ctx_smpl_buf_id;  /* which buffer format to use (if needed) */
-       unsigned long  ctx_flags;        /* noblock/block */
-       unsigned short ctx_nextra_sets;  /* number of extra event sets (you always get 1) */
-       unsigned short ctx_reserved1;    /* for future use */
-       int            ctx_fd;           /* return arg: unique identification for context */
-       void           *ctx_smpl_vaddr;  /* return arg: virtual address of sampling buffer, is used */
-       unsigned long  ctx_reserved2[11];/* for future use */
-} pfarg_context_t;
-
-/*
- * Request structure used to write/read a PMC or PMD
- */
-typedef struct {
-       unsigned int    reg_num;           /* which register */
-       unsigned short  reg_set;           /* event set for this register */
-       unsigned short  reg_reserved1;     /* for future use */
-
-       unsigned long   reg_value;         /* initial pmc/pmd value */
-       unsigned long   reg_flags;         /* input: pmc/pmd flags, return: reg error */
-
-       unsigned long   reg_long_reset;    /* reset after buffer overflow notification */
-       unsigned long   reg_short_reset;   /* reset after counter overflow */
-
-       unsigned long   reg_reset_pmds[4]; /* which other counters to reset on overflow */
-       unsigned long   reg_random_seed;   /* seed value when randomization is used */
-       unsigned long   reg_random_mask;   /* bitmask used to limit random value */
-       unsigned long   reg_last_reset_val;/* return: PMD last reset value */
-
-       unsigned long   reg_smpl_pmds[4];  /* which pmds are accessed when PMC overflows */
-       unsigned long   reg_smpl_eventid;  /* opaque sampling event identifier */
-
-       unsigned long   reg_reserved2[3];   /* for future use */
-} pfarg_reg_t;
-
-typedef struct {
-       unsigned int    dbreg_num;              /* which debug register */
-       unsigned short  dbreg_set;              /* event set for this register */
-       unsigned short  dbreg_reserved1;        /* for future use */
-       unsigned long   dbreg_value;            /* value for debug register */
-       unsigned long   dbreg_flags;            /* return: dbreg error */
-       unsigned long   dbreg_reserved2[1];     /* for future use */
-} pfarg_dbreg_t;
-
-typedef struct {
-       unsigned int    ft_version;     /* perfmon: major [16-31], minor [0-15] */
-       unsigned int    ft_reserved;    /* reserved for future use */
-       unsigned long   reserved[4];    /* for future use */
-} pfarg_features_t;
-
-typedef struct {
-       pid_t           load_pid;          /* process to load the context into */
-       unsigned short  load_set;          /* first event set to load */
-       unsigned short  load_reserved1;    /* for future use */
-       unsigned long   load_reserved2[3]; /* for future use */
-} pfarg_load_t;
-
-typedef struct {
-       int             msg_type;               /* generic message header */
-       int             msg_ctx_fd;             /* generic message header */
-       unsigned long   msg_ovfl_pmds[4];       /* which PMDs overflowed */
-       unsigned short  msg_active_set;         /* active set at the time of overflow */
-       unsigned short  msg_reserved1;          /* for future use */
-       unsigned int    msg_reserved2;          /* for future use */
-       unsigned long   msg_tstamp;             /* for perf tuning/debug */
-} pfm_ovfl_msg_t;
-
-typedef struct {
-       int             msg_type;               /* generic message header */
-       int             msg_ctx_fd;             /* generic message header */
-       unsigned long   msg_tstamp;             /* for perf tuning */
-} pfm_end_msg_t;
-
-typedef struct {
-       int             msg_type;               /* type of the message */
-       int             msg_ctx_fd;             /* unique identifier for the context */
-       unsigned long   msg_tstamp;             /* for perf tuning */
-} pfm_gen_msg_t;
-
-#define PFM_MSG_OVFL   1       /* an overflow happened */
-#define PFM_MSG_END    2       /* task to which context was attached ended */
-
-typedef union {
-       pfm_ovfl_msg_t  pfm_ovfl_msg;
-       pfm_end_msg_t   pfm_end_msg;
-       pfm_gen_msg_t   pfm_gen_msg;
-} pfm_msg_t;
-
-/*
- * Define the version numbers for both perfmon as a whole and the sampling buffer format.
- */
-#define PFM_VERSION_MAJ                 2U
-#define PFM_VERSION_MIN                 0U
-#define PFM_VERSION             (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
-#define PFM_VERSION_MAJOR(x)    (((x)>>16) & 0xffff)
-#define PFM_VERSION_MINOR(x)    ((x) & 0xffff)
+#include <uapi/asm/perfmon.h>
 
 
-/*
- * miscellaneous architected definitions
- */
-#define PMU_FIRST_COUNTER      4       /* first counting monitor (PMC/PMD) */
-#define PMU_MAX_PMCS           256     /* maximum architected number of PMC registers */
-#define PMU_MAX_PMDS           256     /* maximum architected number of PMD registers */
-
-#ifdef __KERNEL__
-
 extern long perfmonctl(int fd, int cmd, void *arg, int narg);
 
 typedef struct {
@@ -274,6 +107,4 @@ typedef struct {
 extern pfm_sysctl_t pfm_sysctl;
 
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_PERFMON_H */
index 68c98f5..b0e9736 100644 (file)
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_PTRACE_H
-#define _ASM_IA64_PTRACE_H
-
 /*
  * Copyright (C) 1998-2004 Hewlett-Packard Co
  *     David Mosberger-Tang <davidm@hpl.hp.com>
  *  6/17/99    D. Mosberger    added second unat member to "struct switch_stack"
  *
  */
-/*
- * When a user process is blocked, its state looks as follows:
- *
- *            +----------------------+ ------- IA64_STK_OFFSET
- *                   |                      |   ^
- *            | struct pt_regs       |  |
- *           |                      |   |
- *            +----------------------+  |
- *           |                      |   |
- *                   |    memory stack      |   |
- *           | (growing downwards)  |   |
- *           //.....................//  |
- *                                      |
- *           //.....................//  |
- *           |                      |   |
- *            +----------------------+  |
- *            | struct switch_stack  |  |
- *           |                      |   |
- *           +----------------------+   |
- *           |                      |   |
- *           //.....................//  |
- *                                      |
- *           //.....................//  |
- *           |                      |   |
- *           |  register stack      |   |
- *           | (growing upwards)    |   |
- *            |                             |   |
- *           +----------------------+   |  --- IA64_RBS_OFFSET
- *            |  struct thread_info  |  |  ^
- *           +----------------------+   |  |
- *           |                      |   |  |
- *            |  struct task_struct  |  |  |
- * current -> |                             |   |  |
- *           +----------------------+ -------
- *
- * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
- * This is because ar.ec is saved as part of ar.pfs.
- */
-
-
-#include <asm/fpu.h>
+#ifndef _ASM_IA64_PTRACE_H
+#define _ASM_IA64_PTRACE_H
 
-#ifdef __KERNEL__
 #ifndef ASM_OFFSETS_C
 #include <asm/asm-offsets.h>
 #endif
+#include <uapi/asm/ptrace.h>
 
 /*
  * Base-2 logarithm of number of pages to allocate per task structure
 
 #define KERNEL_STACK_SIZE              IA64_STK_OFFSET
 
-#endif /* __KERNEL__ */
-
 #ifndef __ASSEMBLY__
 
-/*
- * This struct defines the way the registers are saved on system
- * calls.
- *
- * We don't save all floating point register because the kernel
- * is compiled to use only a very small subset, so the other are
- * untouched.
- *
- * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
- * (because the memory stack pointer MUST ALWAYS be aligned this way)
- *
- */
-struct pt_regs {
-       /* The following registers are saved by SAVE_MIN: */
-       unsigned long b6;               /* scratch */
-       unsigned long b7;               /* scratch */
-
-       unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
-       unsigned long ar_ssd;           /* reserved for future use (scratch) */
-
-       unsigned long r8;               /* scratch (return value register 0) */
-       unsigned long r9;               /* scratch (return value register 1) */
-       unsigned long r10;              /* scratch (return value register 2) */
-       unsigned long r11;              /* scratch (return value register 3) */
-
-       unsigned long cr_ipsr;          /* interrupted task's psr */
-       unsigned long cr_iip;           /* interrupted task's instruction pointer */
-       /*
-        * interrupted task's function state; if bit 63 is cleared, it
-        * contains syscall's ar.pfs.pfm:
-        */
-       unsigned long cr_ifs;
-
-       unsigned long ar_unat;          /* interrupted task's NaT register (preserved) */
-       unsigned long ar_pfs;           /* prev function state  */
-       unsigned long ar_rsc;           /* RSE configuration */
-       /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
-       unsigned long ar_rnat;          /* RSE NaT */
-       unsigned long ar_bspstore;      /* RSE bspstore */
-
-       unsigned long pr;               /* 64 predicate registers (1 bit each) */
-       unsigned long b0;               /* return pointer (bp) */
-       unsigned long loadrs;           /* size of dirty partition << 16 */
-
-       unsigned long r1;               /* the gp pointer */
-       unsigned long r12;              /* interrupted task's memory stack pointer */
-       unsigned long r13;              /* thread pointer */
-
-       unsigned long ar_fpsr;          /* floating point status (preserved) */
-       unsigned long r15;              /* scratch */
-
-       /* The remaining registers are NOT saved for system calls.  */
-
-       unsigned long r14;              /* scratch */
-       unsigned long r2;               /* scratch */
-       unsigned long r3;               /* scratch */
-
-       /* The following registers are saved by SAVE_REST: */
-       unsigned long r16;              /* scratch */
-       unsigned long r17;              /* scratch */
-       unsigned long r18;              /* scratch */
-       unsigned long r19;              /* scratch */
-       unsigned long r20;              /* scratch */
-       unsigned long r21;              /* scratch */
-       unsigned long r22;              /* scratch */
-       unsigned long r23;              /* scratch */
-       unsigned long r24;              /* scratch */
-       unsigned long r25;              /* scratch */
-       unsigned long r26;              /* scratch */
-       unsigned long r27;              /* scratch */
-       unsigned long r28;              /* scratch */
-       unsigned long r29;              /* scratch */
-       unsigned long r30;              /* scratch */
-       unsigned long r31;              /* scratch */
-
-       unsigned long ar_ccv;           /* compare/exchange value (scratch) */
-
-       /*
-        * Floating point registers that the kernel considers scratch:
-        */
-       struct ia64_fpreg f6;           /* scratch */
-       struct ia64_fpreg f7;           /* scratch */
-       struct ia64_fpreg f8;           /* scratch */
-       struct ia64_fpreg f9;           /* scratch */
-       struct ia64_fpreg f10;          /* scratch */
-       struct ia64_fpreg f11;          /* scratch */
-};
-
-/*
- * This structure contains the addition registers that need to
- * preserved across a context switch.  This generally consists of
- * "preserved" registers.
- */
-struct switch_stack {
-       unsigned long caller_unat;      /* user NaT collection register (preserved) */
-       unsigned long ar_fpsr;          /* floating-point status register */
-
-       struct ia64_fpreg f2;           /* preserved */
-       struct ia64_fpreg f3;           /* preserved */
-       struct ia64_fpreg f4;           /* preserved */
-       struct ia64_fpreg f5;           /* preserved */
-
-       struct ia64_fpreg f12;          /* scratch, but untouched by kernel */
-       struct ia64_fpreg f13;          /* scratch, but untouched by kernel */
-       struct ia64_fpreg f14;          /* scratch, but untouched by kernel */
-       struct ia64_fpreg f15;          /* scratch, but untouched by kernel */
-       struct ia64_fpreg f16;          /* preserved */
-       struct ia64_fpreg f17;          /* preserved */
-       struct ia64_fpreg f18;          /* preserved */
-       struct ia64_fpreg f19;          /* preserved */
-       struct ia64_fpreg f20;          /* preserved */
-       struct ia64_fpreg f21;          /* preserved */
-       struct ia64_fpreg f22;          /* preserved */
-       struct ia64_fpreg f23;          /* preserved */
-       struct ia64_fpreg f24;          /* preserved */
-       struct ia64_fpreg f25;          /* preserved */
-       struct ia64_fpreg f26;          /* preserved */
-       struct ia64_fpreg f27;          /* preserved */
-       struct ia64_fpreg f28;          /* preserved */
-       struct ia64_fpreg f29;          /* preserved */
-       struct ia64_fpreg f30;          /* preserved */
-       struct ia64_fpreg f31;          /* preserved */
-
-       unsigned long r4;               /* preserved */
-       unsigned long r5;               /* preserved */
-       unsigned long r6;               /* preserved */
-       unsigned long r7;               /* preserved */
-
-       unsigned long b0;               /* so we can force a direct return in copy_thread */
-       unsigned long b1;
-       unsigned long b2;
-       unsigned long b3;
-       unsigned long b4;
-       unsigned long b5;
-
-       unsigned long ar_pfs;           /* previous function state */
-       unsigned long ar_lc;            /* loop counter (preserved) */
-       unsigned long ar_unat;          /* NaT bits for r4-r7 */
-       unsigned long ar_rnat;          /* RSE NaT collection register */
-       unsigned long ar_bspstore;      /* RSE dirty base (preserved) */
-       unsigned long pr;               /* 64 predicate registers (1 bit each) */
-};
-
-#ifdef __KERNEL__
-
 #include <asm/current.h>
 #include <asm/page.h>
 
@@ -331,46 +142,5 @@ static inline long regs_return_value(struct pt_regs *regs)
   #define arch_has_single_step()  (1)
   #define arch_has_block_step()   (1)
 
-#endif /* !__KERNEL__ */
-
-/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
-struct pt_all_user_regs {
-       unsigned long nat;
-       unsigned long cr_iip;
-       unsigned long cfm;
-       unsigned long cr_ipsr;
-       unsigned long pr;
-
-       unsigned long gr[32];
-       unsigned long br[8];
-       unsigned long ar[128];
-       struct ia64_fpreg fr[128];
-};
-
 #endif /* !__ASSEMBLY__ */
-
-/* indices to application-registers array in pt_all_user_regs */
-#define PT_AUR_RSC     16
-#define PT_AUR_BSP     17
-#define PT_AUR_BSPSTORE        18
-#define PT_AUR_RNAT    19
-#define PT_AUR_CCV     32
-#define PT_AUR_UNAT    36
-#define PT_AUR_FPSR    40
-#define PT_AUR_PFS     64
-#define PT_AUR_LC      65
-#define PT_AUR_EC      66
-
-/*
- * The numbers chosen here are somewhat arbitrary but absolutely MUST
- * not overlap with any of the number assigned in <linux/ptrace.h>.
- */
-#define PTRACE_SINGLEBLOCK     12      /* resume execution until next branch */
-#define PTRACE_OLD_GETSIGINFO  13      /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>)  */
-#define PTRACE_OLD_SETSIGINFO  14      /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>)  */
-#define PTRACE_GETREGS         18      /* get all registers (pt_all_user_regs) in one shot */
-#define PTRACE_SETREGS         19      /* set all registers (pt_all_user_regs) in one shot */
-
-#define PTRACE_OLDSETOPTIONS   21
-
 #endif /* _ASM_IA64_PTRACE_H */
index c8fcaa2..6f2e2dd 100644 (file)
-#ifndef _ASM_IA64_SIGINFO_H
-#define _ASM_IA64_SIGINFO_H
-
 /*
  * Based on <asm-i386/siginfo.h>.
  *
  * Modified 1998-2002
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_SIGINFO_H
+#define _ASM_IA64_SIGINFO_H
 
-#define __ARCH_SI_PREAMBLE_SIZE        (4 * sizeof(int))
-
-#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_COPY_SIGINFO
-#define HAVE_ARCH_COPY_SIGINFO_TO_USER
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
-       int si_signo;
-       int si_errno;
-       int si_code;
-       int __pad0;
-
-       union {
-               int _pad[SI_PAD_SIZE];
-
-               /* kill() */
-               struct {
-                       pid_t _pid;             /* sender's pid */
-                       uid_t _uid;             /* sender's uid */
-               } _kill;
-
-               /* POSIX.1b timers */
-               struct {
-                       timer_t _tid;           /* timer id */
-                       int _overrun;           /* overrun count */
-                       char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
-                       sigval_t _sigval;       /* must overlay ._rt._sigval! */
-                       int _sys_private;       /* not to be passed to user */
-               } _timer;
-
-               /* POSIX.1b signals */
-               struct {
-                       pid_t _pid;             /* sender's pid */
-                       uid_t _uid;             /* sender's uid */
-                       sigval_t _sigval;
-               } _rt;
-
-               /* SIGCHLD */
-               struct {
-                       pid_t _pid;             /* which child */
-                       uid_t _uid;             /* sender's uid */
-                       int _status;            /* exit code */
-                       clock_t _utime;
-                       clock_t _stime;
-               } _sigchld;
-
-               /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
-               struct {
-                       void __user *_addr;     /* faulting insn/memory ref. */
-                       int _imm;               /* immediate value for "break" */
-                       unsigned int _flags;    /* see below */
-                       unsigned long _isr;     /* isr */
-                       short _addr_lsb;        /* lsb of faulting address */
-               } _sigfault;
-
-               /* SIGPOLL */
-               struct {
-                       long _band;     /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
-                       int _fd;
-               } _sigpoll;
-       } _sifields;
-} siginfo_t;
-
-#define si_imm         _sifields._sigfault._imm        /* as per UNIX SysV ABI spec */
-#define si_flags       _sifields._sigfault._flags
-/*
- * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
- * si_code is non-zero and __ISR_VALID is set in si_flags.
- */
-#define si_isr         _sifields._sigfault._isr
-
-/*
- * Flag values for si_flags:
- */
-#define __ISR_VALID_BIT        0
-#define __ISR_VALID    (1 << __ISR_VALID_BIT)
-
-/*
- * SIGILL si_codes
- */
-#define ILL_BADIADDR   (__SI_FAULT|9)  /* unimplemented instruction address */
-#define __ILL_BREAK    (__SI_FAULT|10) /* illegal break */
-#define __ILL_BNDMOD   (__SI_FAULT|11) /* bundle-update (modification) in progress */
-#undef NSIGILL
-#define NSIGILL                11
-
-/*
- * SIGFPE si_codes
- */
-#define __FPE_DECOVF   (__SI_FAULT|9)  /* decimal overflow */
-#define __FPE_DECDIV   (__SI_FAULT|10) /* decimal division by zero */
-#define __FPE_DECERR   (__SI_FAULT|11) /* packed decimal error */
-#define __FPE_INVASC   (__SI_FAULT|12) /* invalid ASCII digit */
-#define __FPE_INVDEC   (__SI_FAULT|13) /* invalid decimal digit */
-#undef NSIGFPE
-#define NSIGFPE                13
-
-/*
- * SIGSEGV si_codes
- */
-#define __SEGV_PSTKOVF (__SI_FAULT|3)  /* paragraph stack overflow */
-#undef NSIGSEGV
-#define NSIGSEGV       3
-
-#undef NSIGTRAP
-#define NSIGTRAP       4
-
-#ifdef __KERNEL__
 #include <linux/string.h>
+#include <uapi/asm/siginfo.h>
 
 static inline void
 copy_siginfo (siginfo_t *to, siginfo_t *from)
@@ -130,6 +20,4 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
                memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
 }
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_SIGINFO_H */
index b166248..aecda5b 100644 (file)
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_SIGNAL_H
-#define _ASM_IA64_SIGNAL_H
-
 /*
  * Modified 1998-2001, 2003
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  * Unfortunately, this file is being included by bits/signal.h in
  * glibc-2.x.  Hence the #ifdef __KERNEL__ ugliness.
  */
+#ifndef _ASM_IA64_SIGNAL_H
+#define _ASM_IA64_SIGNAL_H
 
-#define SIGHUP          1
-#define SIGINT          2
-#define SIGQUIT                 3
-#define SIGILL          4
-#define SIGTRAP                 5
-#define SIGABRT                 6
-#define SIGIOT          6
-#define SIGBUS          7
-#define SIGFPE          8
-#define SIGKILL                 9
-#define SIGUSR1                10
-#define SIGSEGV                11
-#define SIGUSR2                12
-#define SIGPIPE                13
-#define SIGALRM                14
-#define SIGTERM                15
-#define SIGSTKFLT      16
-#define SIGCHLD                17
-#define SIGCONT                18
-#define SIGSTOP                19
-#define SIGTSTP                20
-#define SIGTTIN                21
-#define SIGTTOU                22
-#define SIGURG         23
-#define SIGXCPU                24
-#define SIGXFSZ                25
-#define SIGVTALRM      26
-#define SIGPROF                27
-#define SIGWINCH       28
-#define SIGIO          29
-#define SIGPOLL                SIGIO
-/*
-#define SIGLOST                29
-*/
-#define SIGPWR         30
-#define SIGSYS         31
-/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
-#define        SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN       32
-#define SIGRTMAX       _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP   0x00000001
-#define SA_NOCLDWAIT   0x00000002
-#define SA_SIGINFO     0x00000004
-#define SA_ONSTACK     0x08000000
-#define SA_RESTART     0x10000000
-#define SA_NODEFER     0x40000000
-#define SA_RESETHAND   0x80000000
-
-#define SA_NOMASK      SA_NODEFER
-#define SA_ONESHOT     SA_RESETHAND
-
-#define SA_RESTORER    0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK     1
-#define SS_DISABLE     2
-
-/*
- * The minimum stack size needs to be fairly large because we want to
- * be sure that an app compiled for today's CPUs will continue to run
- * on all future CPU models.  The CPU model matters because the signal
- * frame needs to have space for the complete machine state, including
- * all physical stacked registers.  The number of physical stacked
- * registers is CPU model dependent, but given that the width of
- * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
- * more than 16KB of space.
- */
-#if 1
-  /*
-   * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
-   * in wrong. ;-(  To preserve backwards compatibility, we leave the kernel at the
-   * incorrect value and fix libc only.
-   */
-# define MINSIGSTKSZ   131027  /* min. stack size for sigaltstack() */
-#else
-# define MINSIGSTKSZ   131072  /* min. stack size for sigaltstack() */
-#endif
-#define SIGSTKSZ       262144  /* default stack size for sigaltstack() */
+#include <uapi/asm/signal.h>
 
-#ifdef __KERNEL__
 
 #define _NSIG          64
 #define _NSIG_BPW      64
 #define _NSIG_WORDS    (_NSIG / _NSIG_BPW)
 
-#endif /* __KERNEL__ */
-
-#include <asm-generic/signal-defs.h>
-
 # ifndef __ASSEMBLY__
 
-#  include <linux/types.h>
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-typedef struct sigaltstack {
-       void __user *ss_sp;
-       int ss_flags;
-       size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 
@@ -154,7 +40,5 @@ struct k_sigaction {
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* __KERNEL__ */
-
 # endif /* !__ASSEMBLY__ */
 #endif /* _ASM_IA64_SIGNAL_H */
index 689d218..a42f870 100644 (file)
@@ -1,52 +1,14 @@
-#ifndef _ASM_IA64_TERMIOS_H
-#define _ASM_IA64_TERMIOS_H
-
 /*
  * Modified 1999
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  *
  * 99/01/28    Added N_IRDA and N_SMSBLOCK
  */
+#ifndef _ASM_IA64_TERMIOS_H
+#define _ASM_IA64_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct winsize {
-       unsigned short ws_row;
-       unsigned short ws_col;
-       unsigned short ws_xpixel;
-       unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-       unsigned short c_iflag;         /* input mode flags */
-       unsigned short c_oflag;         /* output mode flags */
-       unsigned short c_cflag;         /* control mode flags */
-       unsigned short c_lflag;         /* local mode flags */
-       unsigned char c_line;           /* line discipline */
-       unsigned char c_cc[NCC];        /* control characters */
-};
-
-/* modem lines */
-#define TIOCM_LE       0x001
-#define TIOCM_DTR      0x002
-#define TIOCM_RTS      0x004
-#define TIOCM_ST       0x008
-#define TIOCM_SR       0x010
-#define TIOCM_CTS      0x020
-#define TIOCM_CAR      0x040
-#define TIOCM_RNG      0x080
-#define TIOCM_DSR      0x100
-#define TIOCM_CD       TIOCM_CAR
-#define TIOCM_RI       TIOCM_RNG
-#define TIOCM_OUT1     0x2000
-#define TIOCM_OUT2     0x4000
-#define TIOCM_LOOP     0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+#include <uapi/asm/termios.h>
 
-# ifdef __KERNEL__
 
 /*     intr=^C         quit=^\         erase=del       kill=^U
        eof=^D          vtime=\0        vmin=\1         sxtc=\0
@@ -92,6 +54,4 @@ struct termio {
 #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
 #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
 
-# endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_TERMIOS_H */
index 3f5b122..4c351b1 100644 (file)
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_TYPES_H
-#define _ASM_IA64_TYPES_H
-
 /*
  * This file is never included by application software unless explicitly
  * requested (e.g., via linux/types.h) in which case the application is
  * Modified 1998-2000, 2002
  *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_TYPES_H
+#define _ASM_IA64_TYPES_H
 
-#ifdef __KERNEL__
 #include <asm-generic/int-ll64.h>
-#else
-#include <asm-generic/int-l64.h>
-#endif
+#include <uapi/asm/types.h>
 
 #ifdef __ASSEMBLY__
-# define __IA64_UL(x)          (x)
-# define __IA64_UL_CONST(x)    x
-
 #else
-# define __IA64_UL(x)          ((unsigned long)(x))
-# define __IA64_UL_CONST(x)    x##UL
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-# ifdef __KERNEL__
 
 struct fnptr {
        unsigned long ip;
        unsigned long gp;
 };
 
-# endif /* __KERNEL__ */
 #endif /* !__ASSEMBLY__ */
-
 #endif /* _ASM_IA64_TYPES_H */
index 7a3bd25..8b3ff2f 100644 (file)
-#ifndef _ASM_IA64_UNISTD_H
-#define _ASM_IA64_UNISTD_H
-
 /*
  * IA-64 Linux syscall numbers and inline-functions.
  *
  * Copyright (C) 1998-2005 Hewlett-Packard Co
  *     David Mosberger-Tang <davidm@hpl.hp.com>
  */
+#ifndef _ASM_IA64_UNISTD_H
+#define _ASM_IA64_UNISTD_H
 
-#include <asm/break.h>
-
-#define __BREAK_SYSCALL                        __IA64_BREAK_SYSCALL
-
-#define __NR_ni_syscall                        1024
-#define __NR_exit                      1025
-#define __NR_read                      1026
-#define __NR_write                     1027
-#define __NR_open                      1028
-#define __NR_close                     1029
-#define __NR_creat                     1030
-#define __NR_link                      1031
-#define __NR_unlink                    1032
-#define __NR_execve                    1033
-#define __NR_chdir                     1034
-#define __NR_fchdir                    1035
-#define __NR_utimes                    1036
-#define __NR_mknod                     1037
-#define __NR_chmod                     1038
-#define __NR_chown                     1039
-#define __NR_lseek                     1040
-#define __NR_getpid                    1041
-#define __NR_getppid                   1042
-#define __NR_mount                     1043
-#define __NR_umount                    1044
-#define __NR_setuid                    1045
-#define __NR_getuid                    1046
-#define __NR_geteuid                   1047
-#define __NR_ptrace                    1048
-#define __NR_access                    1049
-#define __NR_sync                      1050
-#define __NR_fsync                     1051
-#define __NR_fdatasync                 1052
-#define __NR_kill                      1053
-#define __NR_rename                    1054
-#define __NR_mkdir                     1055
-#define __NR_rmdir                     1056
-#define __NR_dup                       1057
-#define __NR_pipe                      1058
-#define __NR_times                     1059
-#define __NR_brk                       1060
-#define __NR_setgid                    1061
-#define __NR_getgid                    1062
-#define __NR_getegid                   1063
-#define __NR_acct                      1064
-#define __NR_ioctl                     1065
-#define __NR_fcntl                     1066
-#define __NR_umask                     1067
-#define __NR_chroot                    1068
-#define __NR_ustat                     1069
-#define __NR_dup2                      1070
-#define __NR_setreuid                  1071
-#define __NR_setregid                  1072
-#define __NR_getresuid                 1073
-#define __NR_setresuid                 1074
-#define __NR_getresgid                 1075
-#define __NR_setresgid                 1076
-#define __NR_getgroups                 1077
-#define __NR_setgroups                 1078
-#define __NR_getpgid                   1079
-#define __NR_setpgid                   1080
-#define __NR_setsid                    1081
-#define __NR_getsid                    1082
-#define __NR_sethostname               1083
-#define __NR_setrlimit                 1084
-#define __NR_getrlimit                 1085
-#define __NR_getrusage                 1086
-#define __NR_gettimeofday              1087
-#define __NR_settimeofday              1088
-#define __NR_select                    1089
-#define __NR_poll                      1090
-#define __NR_symlink                   1091
-#define __NR_readlink                  1092
-#define __NR_uselib                    1093
-#define __NR_swapon                    1094
-#define __NR_swapoff                   1095
-#define __NR_reboot                    1096
-#define __NR_truncate                  1097
-#define __NR_ftruncate                 1098
-#define __NR_fchmod                    1099
-#define __NR_fchown                    1100
-#define __NR_getpriority               1101
-#define __NR_setpriority               1102
-#define __NR_statfs                    1103
-#define __NR_fstatfs                   1104
-#define __NR_gettid                    1105
-#define __NR_semget                    1106
-#define __NR_semop                     1107
-#define __NR_semctl                    1108
-#define __NR_msgget                    1109
-#define __NR_msgsnd                    1110
-#define __NR_msgrcv                    1111
-#define __NR_msgctl                    1112
-#define __NR_shmget                    1113
-#define __NR_shmat                     1114
-#define __NR_shmdt                     1115
-#define __NR_shmctl                    1116
-/* also known as klogctl() in GNU libc: */
-#define __NR_syslog                    1117
-#define __NR_setitimer                 1118
-#define __NR_getitimer                 1119
-/* 1120 was __NR_old_stat */
-/* 1121 was __NR_old_lstat */
-/* 1122 was __NR_old_fstat */
-#define __NR_vhangup                   1123
-#define __NR_lchown                    1124
-#define __NR_remap_file_pages          1125
-#define __NR_wait4                     1126
-#define __NR_sysinfo                   1127
-#define __NR_clone                     1128
-#define __NR_setdomainname             1129
-#define __NR_uname                     1130
-#define __NR_adjtimex                  1131
-/* 1132 was __NR_create_module */
-#define __NR_init_module               1133
-#define __NR_delete_module             1134
-/* 1135 was __NR_get_kernel_syms */
-/* 1136 was __NR_query_module */
-#define __NR_quotactl                  1137
-#define __NR_bdflush                   1138
-#define __NR_sysfs                     1139
-#define __NR_personality               1140
-#define __NR_afs_syscall               1141
-#define __NR_setfsuid                  1142
-#define __NR_setfsgid                  1143
-#define __NR_getdents                  1144
-#define __NR_flock                     1145
-#define __NR_readv                     1146
-#define __NR_writev                    1147
-#define __NR_pread64                   1148
-#define __NR_pwrite64                  1149
-#define __NR__sysctl                   1150
-#define __NR_mmap                      1151
-#define __NR_munmap                    1152
-#define __NR_mlock                     1153
-#define __NR_mlockall                  1154
-#define __NR_mprotect                  1155
-#define __NR_mremap                    1156
-#define __NR_msync                     1157
-#define __NR_munlock                   1158
-#define __NR_munlockall                        1159
-#define __NR_sched_getparam            1160
-#define __NR_sched_setparam            1161
-#define __NR_sched_getscheduler                1162
-#define __NR_sched_setscheduler                1163
-#define __NR_sched_yield               1164
-#define __NR_sched_get_priority_max    1165
-#define __NR_sched_get_priority_min    1166
-#define __NR_sched_rr_get_interval     1167
-#define __NR_nanosleep                 1168
-#define __NR_nfsservctl                        1169
-#define __NR_prctl                     1170
-/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
-#define __NR_mmap2                     1172
-#define __NR_pciconfig_read            1173
-#define __NR_pciconfig_write           1174
-#define __NR_perfmonctl                        1175
-#define __NR_sigaltstack               1176
-#define __NR_rt_sigaction              1177
-#define __NR_rt_sigpending             1178
-#define __NR_rt_sigprocmask            1179
-#define __NR_rt_sigqueueinfo           1180
-#define __NR_rt_sigreturn              1181
-#define __NR_rt_sigsuspend             1182
-#define __NR_rt_sigtimedwait           1183
-#define __NR_getcwd                    1184
-#define __NR_capget                    1185
-#define __NR_capset                    1186
-#define __NR_sendfile                  1187
-#define __NR_getpmsg                   1188
-#define __NR_putpmsg                   1189
-#define __NR_socket                    1190
-#define __NR_bind                      1191
-#define __NR_connect                   1192
-#define __NR_listen                    1193
-#define __NR_accept                    1194
-#define __NR_getsockname               1195
-#define __NR_getpeername               1196
-#define __NR_socketpair                        1197
-#define __NR_send                      1198
-#define __NR_sendto                    1199
-#define __NR_recv                      1200
-#define __NR_recvfrom                  1201
-#define __NR_shutdown                  1202
-#define __NR_setsockopt                        1203
-#define __NR_getsockopt                        1204
-#define __NR_sendmsg                   1205
-#define __NR_recvmsg                   1206
-#define __NR_pivot_root                        1207
-#define __NR_mincore                   1208
-#define __NR_madvise                   1209
-#define __NR_stat                      1210
-#define __NR_lstat                     1211
-#define __NR_fstat                     1212
-#define __NR_clone2                    1213
-#define __NR_getdents64                        1214
-#define __NR_getunwind                 1215
-#define __NR_readahead                 1216
-#define __NR_setxattr                  1217
-#define __NR_lsetxattr                 1218
-#define __NR_fsetxattr                 1219
-#define __NR_getxattr                  1220
-#define __NR_lgetxattr                 1221
-#define __NR_fgetxattr                 1222
-#define __NR_listxattr                 1223
-#define __NR_llistxattr                        1224
-#define __NR_flistxattr                        1225
-#define __NR_removexattr               1226
-#define __NR_lremovexattr              1227
-#define __NR_fremovexattr              1228
-#define __NR_tkill                     1229
-#define __NR_futex                     1230
-#define __NR_sched_setaffinity         1231
-#define __NR_sched_getaffinity         1232
-#define __NR_set_tid_address           1233
-#define __NR_fadvise64                 1234
-#define __NR_tgkill                    1235
-#define __NR_exit_group                        1236
-#define __NR_lookup_dcookie            1237
-#define __NR_io_setup                  1238
-#define __NR_io_destroy                        1239
-#define __NR_io_getevents              1240
-#define __NR_io_submit                 1241
-#define __NR_io_cancel                 1242
-#define __NR_epoll_create              1243
-#define __NR_epoll_ctl                 1244
-#define __NR_epoll_wait                        1245
-#define __NR_restart_syscall           1246
-#define __NR_semtimedop                        1247
-#define __NR_timer_create              1248
-#define __NR_timer_settime             1249
-#define __NR_timer_gettime             1250
-#define __NR_timer_getoverrun          1251
-#define __NR_timer_delete              1252
-#define __NR_clock_settime             1253
-#define __NR_clock_gettime             1254
-#define __NR_clock_getres              1255
-#define __NR_clock_nanosleep           1256
-#define __NR_fstatfs64                 1257
-#define __NR_statfs64                  1258
-#define __NR_mbind                     1259
-#define __NR_get_mempolicy             1260
-#define __NR_set_mempolicy             1261
-#define __NR_mq_open                   1262
-#define __NR_mq_unlink                 1263
-#define __NR_mq_timedsend              1264
-#define __NR_mq_timedreceive           1265
-#define __NR_mq_notify                 1266
-#define __NR_mq_getsetattr             1267
-#define __NR_kexec_load                        1268
-#define __NR_vserver                   1269
-#define __NR_waitid                    1270
-#define __NR_add_key                   1271
-#define __NR_request_key               1272
-#define __NR_keyctl                    1273
-#define __NR_ioprio_set                        1274
-#define __NR_ioprio_get                        1275
-#define __NR_move_pages                        1276
-#define __NR_inotify_init              1277
-#define __NR_inotify_add_watch         1278
-#define __NR_inotify_rm_watch          1279
-#define __NR_migrate_pages             1280
-#define __NR_openat                    1281
-#define __NR_mkdirat                   1282
-#define __NR_mknodat                   1283
-#define __NR_fchownat                  1284
-#define __NR_futimesat                 1285
-#define __NR_newfstatat                        1286
-#define __NR_unlinkat                  1287
-#define __NR_renameat                  1288
-#define __NR_linkat                    1289
-#define __NR_symlinkat                 1290
-#define __NR_readlinkat                        1291
-#define __NR_fchmodat                  1292
-#define __NR_faccessat                 1293
-#define __NR_pselect6                  1294
-#define __NR_ppoll                     1295
-#define __NR_unshare                   1296
-#define __NR_splice                    1297
-#define __NR_set_robust_list           1298
-#define __NR_get_robust_list           1299
-#define __NR_sync_file_range           1300
-#define __NR_tee                       1301
-#define __NR_vmsplice                  1302
-#define __NR_fallocate                 1303
-#define __NR_getcpu                    1304
-#define __NR_epoll_pwait               1305
-#define __NR_utimensat                 1306
-#define __NR_signalfd                  1307
-#define __NR_timerfd                   1308
-#define __NR_eventfd                   1309
-#define __NR_timerfd_create            1310
-#define __NR_timerfd_settime           1311
-#define __NR_timerfd_gettime           1312
-#define __NR_signalfd4                 1313
-#define __NR_eventfd2                  1314
-#define __NR_epoll_create1             1315
-#define __NR_dup3                      1316
-#define __NR_pipe2                     1317
-#define __NR_inotify_init1             1318
-#define __NR_preadv                    1319
-#define __NR_pwritev                   1320
-#define __NR_rt_tgsigqueueinfo         1321
-#define __NR_recvmmsg                  1322
-#define __NR_fanotify_init             1323
-#define __NR_fanotify_mark             1324
-#define __NR_prlimit64                 1325
-#define __NR_name_to_handle_at         1326
-#define __NR_open_by_handle_at         1327
-#define __NR_clock_adjtime             1328
-#define __NR_syncfs                    1329
-#define __NR_setns                     1330
-#define __NR_sendmmsg                  1331
-#define __NR_process_vm_readv          1332
-#define __NR_process_vm_writev         1333
-#define __NR_accept4                   1334
+#include <uapi/asm/unistd.h>
 
-#ifdef __KERNEL__
 
 
 #define NR_syscalls                    311 /* length of syscall table */
@@ -382,5 +65,4 @@ asmlinkage long sys_rt_sigaction(int sig,
 #define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
 
 #endif /* !__ASSEMBLY__ */
-#endif /* __KERNEL__ */
 #endif /* _ASM_IA64_UNISTD_H */
index 504167c..b275401 100644 (file)
@@ -1,20 +1,11 @@
 #ifndef _ASM_IA64_USTACK_H
 #define _ASM_IA64_USTACK_H
 
-/*
- * Constants for the user stack size
- */
-
-#ifdef __KERNEL__
 #include <asm/page.h>
+#include <uapi/asm/ustack.h>
 
 /* The absolute hard limit for stack size is 1/2 of the mappable space in the region */
 #define MAX_USER_STACK_SIZE    (RGN_MAP_LIMIT/2)
 #define STACK_TOP              (0x6000000000000000UL + RGN_MAP_LIMIT)
 #define STACK_TOP_MAX          STACK_TOP
-#endif
-
-/* Make a default stack size of 2GiB */
-#define DEFAULT_USER_STACK_SIZE        (1UL << 31)
-
 #endif /* _ASM_IA64_USTACK_H */
index baebb3d..30cafac 100644 (file)
@@ -1,3 +1,48 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += break.h
+header-y += byteorder.h
+header-y += cmpxchg.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += fpu.h
+header-y += gcc_intrin.h
+header-y += ia64regs.h
+header-y += intel_intrin.h
+header-y += intrinsics.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += perfmon.h
+header-y += perfmon_default_smpl.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += ptrace_offsets.h
+header-y += resource.h
+header-y += rse.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += ucontext.h
+header-y += unistd.h
+header-y += ustack.h
diff --git a/arch/ia64/include/uapi/asm/gcc_intrin.h b/arch/ia64/include/uapi/asm/gcc_intrin.h
new file mode 100644 (file)
index 0000000..61d0d01
--- /dev/null
@@ -0,0 +1,618 @@
+/*
+ *
+ * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
+ * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
+ */
+#ifndef _UAPI_ASM_IA64_GCC_INTRIN_H
+#define _UAPI_ASM_IA64_GCC_INTRIN_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+/* define this macro to get some asm stmts included in 'c' files */
+#define ASM_SUPPORTED
+
+/* Optimization barrier */
+/* The "volatile" is due to gcc bugs */
+#define ia64_barrier() asm volatile ("":::"memory")
+
+#define ia64_stop()    asm volatile (";;"::)
+
+#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
+
+#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
+
+#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
+
+#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
+
+extern void ia64_bad_param_for_setreg (void);
+extern void ia64_bad_param_for_getreg (void);
+
+
+#define ia64_native_setreg(regnum, val)                                                \
+({                                                                             \
+       switch (regnum) {                                                       \
+           case _IA64_REG_PSR_L:                                               \
+                   asm volatile ("mov psr.l=%0" :: "r"(val) : "memory");       \
+                   break;                                                      \
+           case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:                          \
+                   asm volatile ("mov ar%0=%1" ::                              \
+                                         "i" (regnum - _IA64_REG_AR_KR0),      \
+                                         "r"(val): "memory");                  \
+                   break;                                                      \
+           case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:                        \
+                   asm volatile ("mov cr%0=%1" ::                              \
+                                         "i" (regnum - _IA64_REG_CR_DCR),      \
+                                         "r"(val): "memory" );                 \
+                   break;                                                      \
+           case _IA64_REG_SP:                                                  \
+                   asm volatile ("mov r12=%0" ::                               \
+                                         "r"(val): "memory");                  \
+                   break;                                                      \
+           case _IA64_REG_GP:                                                  \
+                   asm volatile ("mov gp=%0" :: "r"(val) : "memory");          \
+               break;                                                          \
+           default:                                                            \
+                   ia64_bad_param_for_setreg();                                \
+                   break;                                                      \
+       }                                                                       \
+})
+
+#define ia64_native_getreg(regnum)                                             \
+({                                                                             \
+       __u64 ia64_intri_res;                                                   \
+                                                                               \
+       switch (regnum) {                                                       \
+       case _IA64_REG_GP:                                                      \
+               asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));              \
+               break;                                                          \
+       case _IA64_REG_IP:                                                      \
+               asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));              \
+               break;                                                          \
+       case _IA64_REG_PSR:                                                     \
+               asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));             \
+               break;                                                          \
+       case _IA64_REG_TP:      /* for current() */                             \
+               ia64_intri_res = ia64_r13;                                      \
+               break;                                                          \
+       case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:                              \
+               asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)             \
+                                     : "i"(regnum - _IA64_REG_AR_KR0));        \
+               break;                                                          \
+       case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:                            \
+               asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)             \
+                                     : "i" (regnum - _IA64_REG_CR_DCR));       \
+               break;                                                          \
+       case _IA64_REG_SP:                                                      \
+               asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));             \
+               break;                                                          \
+       default:                                                                \
+               ia64_bad_param_for_getreg();                                    \
+               break;                                                          \
+       }                                                                       \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_hint_pause 0
+
+#define ia64_hint(mode)                                                \
+({                                                             \
+       switch (mode) {                                         \
+       case ia64_hint_pause:                                   \
+               asm volatile ("hint @pause" ::: "memory");      \
+               break;                                          \
+       }                                                       \
+})
+
+
+/* Integer values for mux1 instruction */
+#define ia64_mux1_brcst 0
+#define ia64_mux1_mix   8
+#define ia64_mux1_shuf  9
+#define ia64_mux1_alt  10
+#define ia64_mux1_rev  11
+
+#define ia64_mux1(x, mode)                                                     \
+({                                                                             \
+       __u64 ia64_intri_res;                                                   \
+                                                                               \
+       switch (mode) {                                                         \
+       case ia64_mux1_brcst:                                                   \
+               asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x));    \
+               break;                                                          \
+       case ia64_mux1_mix:                                                     \
+               asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x));      \
+               break;                                                          \
+       case ia64_mux1_shuf:                                                    \
+               asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x));     \
+               break;                                                          \
+       case ia64_mux1_alt:                                                     \
+               asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x));      \
+               break;                                                          \
+       case ia64_mux1_rev:                                                     \
+               asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x));      \
+               break;                                                          \
+       }                                                                       \
+       ia64_intri_res;                                                         \
+})
+
+#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+# define ia64_popcnt(x)                __builtin_popcountl(x)
+#else
+# define ia64_popcnt(x)                                                \
+  ({                                                           \
+       __u64 ia64_intri_res;                                   \
+       asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
+                                                               \
+       ia64_intri_res;                                         \
+  })
+#endif
+
+#define ia64_getf_exp(x)                                       \
+({                                                             \
+       long ia64_intri_res;                                    \
+                                                               \
+       asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
+                                                               \
+       ia64_intri_res;                                         \
+})
+
+#define ia64_shrp(a, b, count)                                                         \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count));   \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_ldfs(regnum, x)                                   \
+({                                                             \
+       register double __f__ asm ("f"#regnum);                 \
+       asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x));     \
+})
+
+#define ia64_ldfd(regnum, x)                                   \
+({                                                             \
+       register double __f__ asm ("f"#regnum);                 \
+       asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x));     \
+})
+
+#define ia64_ldfe(regnum, x)                                   \
+({                                                             \
+       register double __f__ asm ("f"#regnum);                 \
+       asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x));     \
+})
+
+#define ia64_ldf8(regnum, x)                                   \
+({                                                             \
+       register double __f__ asm ("f"#regnum);                 \
+       asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x));     \
+})
+
+#define ia64_ldf_fill(regnum, x)                               \
+({                                                             \
+       register double __f__ asm ("f"#regnum);                 \
+       asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
+})
+
+#define ia64_st4_rel_nta(m, val)                                       \
+({                                                                     \
+       asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
+})
+
+#define ia64_stfs(x, regnum)                                           \
+({                                                                     \
+       register double __f__ asm ("f"#regnum);                         \
+       asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_stfd(x, regnum)                                           \
+({                                                                     \
+       register double __f__ asm ("f"#regnum);                         \
+       asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_stfe(x, regnum)                                           \
+({                                                                     \
+       register double __f__ asm ("f"#regnum);                         \
+       asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_stf8(x, regnum)                                           \
+({                                                                     \
+       register double __f__ asm ("f"#regnum);                         \
+       asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_stf_spill(x, regnum)                                              \
+({                                                                             \
+       register double __f__ asm ("f"#regnum);                                 \
+       asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory");    \
+})
+
+#define ia64_fetchadd4_acq(p, inc)                                             \
+({                                                                             \
+                                                                               \
+       __u64 ia64_intri_res;                                                   \
+       asm volatile ("fetchadd4.acq %0=[%1],%2"                                \
+                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
+                               : "memory");                                    \
+                                                                               \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_fetchadd4_rel(p, inc)                                             \
+({                                                                             \
+       __u64 ia64_intri_res;                                                   \
+       asm volatile ("fetchadd4.rel %0=[%1],%2"                                \
+                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
+                               : "memory");                                    \
+                                                                               \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_fetchadd8_acq(p, inc)                                             \
+({                                                                             \
+                                                                               \
+       __u64 ia64_intri_res;                                                   \
+       asm volatile ("fetchadd8.acq %0=[%1],%2"                                \
+                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
+                               : "memory");                                    \
+                                                                               \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_fetchadd8_rel(p, inc)                                             \
+({                                                                             \
+       __u64 ia64_intri_res;                                                   \
+       asm volatile ("fetchadd8.rel %0=[%1],%2"                                \
+                               : "=r"(ia64_intri_res) : "r"(p), "i" (inc)      \
+                               : "memory");                                    \
+                                                                               \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_xchg1(ptr,x)                                                      \
+({                                                                             \
+       __u64 ia64_intri_res;                                                   \
+       asm volatile ("xchg1 %0=[%1],%2"                                        \
+                     : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_xchg2(ptr,x)                                              \
+({                                                                     \
+       __u64 ia64_intri_res;                                           \
+       asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res)        \
+                     : "r" (ptr), "r" (x) : "memory");                 \
+       ia64_intri_res;                                                 \
+})
+
+#define ia64_xchg4(ptr,x)                                              \
+({                                                                     \
+       __u64 ia64_intri_res;                                           \
+       asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res)        \
+                     : "r" (ptr), "r" (x) : "memory");                 \
+       ia64_intri_res;                                                 \
+})
+
+#define ia64_xchg8(ptr,x)                                              \
+({                                                                     \
+       __u64 ia64_intri_res;                                           \
+       asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res)        \
+                     : "r" (ptr), "r" (x) : "memory");                 \
+       ia64_intri_res;                                                 \
+})
+
+#define ia64_cmpxchg1_acq(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg1_rel(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg2_acq(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg2_rel(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+                                                                                       \
+       asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg4_acq(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg4_rel(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg8_acq(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+       asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_cmpxchg8_rel(ptr, new, old)                                               \
+({                                                                                     \
+       __u64 ia64_intri_res;                                                           \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                                  \
+                                                                                       \
+       asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":                                 \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");    \
+       ia64_intri_res;                                                                 \
+})
+
+#define ia64_mf()      asm volatile ("mf" ::: "memory")
+#define ia64_mfa()     asm volatile ("mf.a" ::: "memory")
+
+#define ia64_invala() asm volatile ("invala" ::: "memory")
+
+#define ia64_native_thash(addr)                                                        \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));       \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_srlz_i()  asm volatile (";; srlz.i ;;" ::: "memory")
+#define ia64_srlz_d()  asm volatile (";; srlz.d" ::: "memory");
+
+#ifdef HAVE_SERIALIZE_DIRECTIVE
+# define ia64_dv_serialize_data()              asm volatile (".serialize.data");
+# define ia64_dv_serialize_instruction()       asm volatile (".serialize.instruction");
+#else
+# define ia64_dv_serialize_data()
+# define ia64_dv_serialize_instruction()
+#endif
+
+#define ia64_nop(x)    asm volatile ("nop %0"::"i"(x));
+
+#define ia64_itci(addr)        asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
+
+#define ia64_itcd(addr)        asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
+
+
+#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1"                                \
+                                            :: "r"(trnum), "r"(addr) : "memory")
+
+#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1"                                \
+                                            :: "r"(trnum), "r"(addr) : "memory")
+
+#define ia64_tpa(addr)                                                         \
+({                                                                             \
+       unsigned long ia64_pa;                                                  \
+       asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory");    \
+       ia64_pa;                                                                \
+})
+
+#define __ia64_set_dbr(index, val)                                             \
+       asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_ibr(index, val)                                               \
+       asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pkr(index, val)                                               \
+       asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pmc(index, val)                                               \
+       asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pmd(index, val)                                               \
+       asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_native_set_rr(index, val)                                                 \
+       asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
+
+#define ia64_native_get_cpuid(index)                                                   \
+({                                                                                     \
+       unsigned long ia64_intri_res;                                                   \
+       asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));        \
+       ia64_intri_res;                                                                 \
+})
+
+#define __ia64_get_dbr(index)                                                  \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_get_ibr(index)                                                    \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_get_pkr(index)                                                    \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_get_pmc(index)                                                    \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
+       ia64_intri_res;                                                         \
+})
+
+
+#define ia64_native_get_pmd(index)                                             \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));    \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_native_get_rr(index)                                              \
+({                                                                             \
+       unsigned long ia64_intri_res;                                           \
+       asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));    \
+       ia64_intri_res;                                                         \
+})
+
+#define ia64_native_fc(addr)   asm volatile ("fc %0" :: "r"(addr) : "memory")
+
+
+#define ia64_sync_i()  asm volatile (";; sync.i" ::: "memory")
+
+#define ia64_native_ssm(mask)  asm volatile ("ssm %0":: "i"((mask)) : "memory")
+#define ia64_native_rsm(mask)  asm volatile ("rsm %0":: "i"((mask)) : "memory")
+#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
+#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
+
+#define ia64_ptce(addr)        asm volatile ("ptc.e %0" :: "r"(addr))
+
+#define ia64_native_ptcga(addr, size)                                          \
+do {                                                                           \
+       asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");       \
+       ia64_dv_serialize_data();                                               \
+} while (0)
+
+#define ia64_ptcl(addr, size)                                                  \
+do {                                                                           \
+       asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory");        \
+       ia64_dv_serialize_data();                                               \
+} while (0)
+
+#define ia64_ptri(addr, size)                                          \
+       asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
+
+#define ia64_ptrd(addr, size)                                          \
+       asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
+
+#define ia64_ttag(addr)                                                        \
+({                                                                       \
+       __u64 ia64_intri_res;                                              \
+       asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr));   \
+       ia64_intri_res;                                                  \
+})
+
+
+/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
+
+#define ia64_lfhint_none   0
+#define ia64_lfhint_nt1    1
+#define ia64_lfhint_nt2    2
+#define ia64_lfhint_nta    3
+
+#define ia64_lfetch(lfhint, y)                                 \
+({                                                             \
+        switch (lfhint) {                                      \
+        case ia64_lfhint_none:                                 \
+                asm volatile ("lfetch [%0]" : : "r"(y));       \
+                break;                                         \
+        case ia64_lfhint_nt1:                                  \
+                asm volatile ("lfetch.nt1 [%0]" : : "r"(y));   \
+                break;                                         \
+        case ia64_lfhint_nt2:                                  \
+                asm volatile ("lfetch.nt2 [%0]" : : "r"(y));   \
+                break;                                         \
+        case ia64_lfhint_nta:                                  \
+                asm volatile ("lfetch.nta [%0]" : : "r"(y));   \
+                break;                                         \
+        }                                                      \
+})
+
+#define ia64_lfetch_excl(lfhint, y)                                    \
+({                                                                     \
+        switch (lfhint) {                                              \
+        case ia64_lfhint_none:                                         \
+                asm volatile ("lfetch.excl [%0]" :: "r"(y));           \
+                break;                                                 \
+        case ia64_lfhint_nt1:                                          \
+                asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y));       \
+                break;                                                 \
+        case ia64_lfhint_nt2:                                          \
+                asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y));       \
+                break;                                                 \
+        case ia64_lfhint_nta:                                          \
+                asm volatile ("lfetch.excl.nta [%0]" :: "r"(y));       \
+                break;                                                 \
+        }                                                              \
+})
+
+#define ia64_lfetch_fault(lfhint, y)                                   \
+({                                                                     \
+        switch (lfhint) {                                              \
+        case ia64_lfhint_none:                                         \
+                asm volatile ("lfetch.fault [%0]" : : "r"(y));         \
+                break;                                                 \
+        case ia64_lfhint_nt1:                                          \
+                asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y));     \
+                break;                                                 \
+        case ia64_lfhint_nt2:                                          \
+                asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y));     \
+                break;                                                 \
+        case ia64_lfhint_nta:                                          \
+                asm volatile ("lfetch.fault.nta [%0]" : : "r"(y));     \
+                break;                                                 \
+        }                                                              \
+})
+
+#define ia64_lfetch_fault_excl(lfhint, y)                              \
+({                                                                     \
+        switch (lfhint) {                                              \
+        case ia64_lfhint_none:                                         \
+                asm volatile ("lfetch.fault.excl [%0]" :: "r"(y));     \
+                break;                                                 \
+        case ia64_lfhint_nt1:                                          \
+                asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
+                break;                                                 \
+        case ia64_lfhint_nt2:                                          \
+                asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
+                break;                                                 \
+        case ia64_lfhint_nta:                                          \
+                asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
+                break;                                                 \
+        }                                                              \
+})
+
+#define ia64_native_intrin_local_irq_restore(x)                        \
+do {                                                           \
+       asm volatile (";;   cmp.ne p6,p7=%0,r0;;"               \
+                     "(p6) ssm psr.i;"                         \
+                     "(p7) rsm psr.i;;"                        \
+                     "(p6) srlz.d"                             \
+                     :: "r"((x)) : "p6", "p7", "memory");      \
+} while (0)
+
+#endif /* _UAPI_ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/uapi/asm/intrinsics.h b/arch/ia64/include/uapi/asm/intrinsics.h
new file mode 100644 (file)
index 0000000..5829978
--- /dev/null
@@ -0,0 +1,124 @@
+/*
+ * Compiler-dependent intrinsics.
+ *
+ * Copyright (C) 2002-2003 Hewlett-Packard Co
+ *     David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+#ifndef _UAPI_ASM_IA64_INTRINSICS_H
+#define _UAPI_ASM_IA64_INTRINSICS_H
+
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+/* include compiler specific intrinsics */
+#include <asm/ia64regs.h>
+#ifdef __INTEL_COMPILER
+# include <asm/intel_intrin.h>
+#else
+# include <asm/gcc_intrin.h>
+#endif
+#include <asm/cmpxchg.h>
+
+#define ia64_native_get_psr_i()        (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
+
+#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4)       \
+do {                                                                   \
+       ia64_native_set_rr(0x0000000000000000UL, (val0));               \
+       ia64_native_set_rr(0x2000000000000000UL, (val1));               \
+       ia64_native_set_rr(0x4000000000000000UL, (val2));               \
+       ia64_native_set_rr(0x6000000000000000UL, (val3));               \
+       ia64_native_set_rr(0x8000000000000000UL, (val4));               \
+} while (0)
+
+/*
+ * Force an unresolved reference if someone tries to use
+ * ia64_fetch_and_add() with a bad value.
+ */
+extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
+extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
+
+#define IA64_FETCHADD(tmp,v,n,sz,sem)                                          \
+({                                                                             \
+       switch (sz) {                                                           \
+             case 4:                                                           \
+               tmp = ia64_fetchadd4_##sem((unsigned int *) v, n);              \
+               break;                                                          \
+                                                                               \
+             case 8:                                                           \
+               tmp = ia64_fetchadd8_##sem((unsigned long *) v, n);             \
+               break;                                                          \
+                                                                               \
+             default:                                                          \
+               __bad_size_for_ia64_fetch_and_add();                            \
+       }                                                                       \
+})
+
+#define ia64_fetchadd(i,v,sem)                                                         \
+({                                                                                     \
+       __u64 _tmp;                                                                     \
+       volatile __typeof__(*(v)) *_v = (v);                                            \
+       /* Can't use a switch () here: gcc isn't always smart enough for that... */     \
+       if ((i) == -16)                                                                 \
+               IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem);                        \
+       else if ((i) == -8)                                                             \
+               IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem);                         \
+       else if ((i) == -4)                                                             \
+               IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem);                         \
+       else if ((i) == -1)                                                             \
+               IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem);                         \
+       else if ((i) == 1)                                                              \
+               IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem);                          \
+       else if ((i) == 4)                                                              \
+               IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem);                          \
+       else if ((i) == 8)                                                              \
+               IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem);                          \
+       else if ((i) == 16)                                                             \
+               IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem);                         \
+       else                                                                            \
+               _tmp = __bad_increment_for_ia64_fetch_and_add();                        \
+       (__typeof__(*(v))) (_tmp);      /* return old value */                          \
+})
+
+#define ia64_fetch_and_add(i,v)        (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
+
+#endif
+
+
+#ifndef __ASSEMBLY__
+
+#define IA64_INTRINSIC_API(name)       ia64_native_ ## name
+#define IA64_INTRINSIC_MACRO(name)     ia64_native_ ## name
+
+
+/************************************************/
+/* Instructions paravirtualized for correctness */
+/************************************************/
+/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
+/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
+ * is not currently used (though it may be in a long-format VHPT system!)
+ */
+#define ia64_fc                                IA64_INTRINSIC_API(fc)
+#define ia64_thash                     IA64_INTRINSIC_API(thash)
+#define ia64_get_cpuid                 IA64_INTRINSIC_API(get_cpuid)
+#define ia64_get_pmd                   IA64_INTRINSIC_API(get_pmd)
+
+
+/************************************************/
+/* Instructions paravirtualized for performance */
+/************************************************/
+#define ia64_ssm                       IA64_INTRINSIC_MACRO(ssm)
+#define ia64_rsm                       IA64_INTRINSIC_MACRO(rsm)
+#define ia64_getreg                    IA64_INTRINSIC_MACRO(getreg)
+#define ia64_setreg                    IA64_INTRINSIC_API(setreg)
+#define ia64_set_rr                    IA64_INTRINSIC_API(set_rr)
+#define ia64_get_rr                    IA64_INTRINSIC_API(get_rr)
+#define ia64_ptcga                     IA64_INTRINSIC_API(ptcga)
+#define ia64_get_psr_i                 IA64_INTRINSIC_API(get_psr_i)
+#define ia64_intrin_local_irq_restore  \
+       IA64_INTRINSIC_API(intrin_local_irq_restore)
+#define ia64_set_rr0_to_rr4            IA64_INTRINSIC_API(set_rr0_to_rr4)
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _UAPI_ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/uapi/asm/kvm_para.h b/arch/ia64/include/uapi/asm/kvm_para.h
new file mode 100644 (file)
index 0000000..e69de29
diff --git a/arch/ia64/include/uapi/asm/mman.h b/arch/ia64/include/uapi/asm/mman.h
new file mode 100644 (file)
index 0000000..8740819
--- /dev/null
@@ -0,0 +1,16 @@
+/*
+ * Based on <asm-i386/mman.h>.
+ *
+ * Modified 1998-2000, 2002
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_MMAN_H
+#define _UAPI_ASM_IA64_MMAN_H
+
+
+#include <asm-generic/mman.h>
+
+#define MAP_GROWSUP    0x0200          /* register stack-like segment */
+
+
+#endif /* _UAPI_ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/uapi/asm/param.h b/arch/ia64/include/uapi/asm/param.h
new file mode 100644 (file)
index 0000000..d7da41d
--- /dev/null
@@ -0,0 +1,29 @@
+/*
+ * Fundamental kernel parameters.
+ *
+ * Based on <asm-i386/param.h>.
+ *
+ * Modified 1998, 1999, 2002-2003
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_PARAM_H
+#define _UAPI_ASM_IA64_PARAM_H
+
+
+#define EXEC_PAGESIZE  65536
+
+#ifndef NOGROUP
+# define NOGROUP       (-1)
+#endif
+
+#define MAXHOSTNAMELEN 64      /* max length of hostname */
+
+#ifndef __KERNEL__
+   /*
+    * Technically, this is wrong, but some old apps still refer to it.  The proper way to
+    * get the HZ value is via sysconf(_SC_CLK_TCK).
+    */
+# define HZ 1024
+#endif
+
+#endif /* _UAPI_ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/uapi/asm/perfmon.h b/arch/ia64/include/uapi/asm/perfmon.h
new file mode 100644 (file)
index 0000000..1a10a2d
--- /dev/null
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2001-2003 Hewlett-Packard Co
+ *               Stephane Eranian <eranian@hpl.hp.com>
+ */
+
+#ifndef _UAPI_ASM_IA64_PERFMON_H
+#define _UAPI_ASM_IA64_PERFMON_H
+
+/*
+ * perfmon commands supported on all CPU models
+ */
+#define PFM_WRITE_PMCS         0x01
+#define PFM_WRITE_PMDS         0x02
+#define PFM_READ_PMDS          0x03
+#define PFM_STOP               0x04
+#define PFM_START              0x05
+#define PFM_ENABLE             0x06 /* obsolete */
+#define PFM_DISABLE            0x07 /* obsolete */
+#define PFM_CREATE_CONTEXT     0x08
+#define PFM_DESTROY_CONTEXT    0x09 /* obsolete use close() */
+#define PFM_RESTART            0x0a
+#define PFM_PROTECT_CONTEXT    0x0b /* obsolete */
+#define PFM_GET_FEATURES       0x0c
+#define PFM_DEBUG              0x0d
+#define PFM_UNPROTECT_CONTEXT  0x0e /* obsolete */
+#define PFM_GET_PMC_RESET_VAL  0x0f
+#define PFM_LOAD_CONTEXT       0x10
+#define PFM_UNLOAD_CONTEXT     0x11
+
+/*
+ * PMU model specific commands (may not be supported on all PMU models)
+ */
+#define PFM_WRITE_IBRS         0x20
+#define PFM_WRITE_DBRS         0x21
+
+/*
+ * context flags
+ */
+#define PFM_FL_NOTIFY_BLOCK             0x01   /* block task on user level notifications */
+#define PFM_FL_SYSTEM_WIDE      0x02   /* create a system wide context */
+#define PFM_FL_OVFL_NO_MSG      0x80   /* do not post overflow/end messages for notification */
+
+/*
+ * event set flags
+ */
+#define PFM_SETFL_EXCL_IDLE      0x01   /* exclude idle task (syswide only) XXX: DO NOT USE YET */
+
+/*
+ * PMC flags
+ */
+#define PFM_REGFL_OVFL_NOTIFY  0x1     /* send notification on overflow */
+#define PFM_REGFL_RANDOM       0x2     /* randomize sampling interval   */
+
+/*
+ * PMD/PMC/IBR/DBR return flags (ignored on input)
+ *
+ * Those flags are used on output and must be checked in case EAGAIN is returned
+ * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
+ */
+#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
+#define PFM_REG_RETFL_EINVAL   (1UL<<30) /* set if register entry is invalid */
+#define PFM_REG_RETFL_MASK     (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
+
+#define PFM_REG_HAS_ERROR(flag)        (((flag) & PFM_REG_RETFL_MASK) != 0)
+
+typedef unsigned char pfm_uuid_t[16];  /* custom sampling buffer identifier type */
+
+/*
+ * Request structure used to define a context
+ */
+typedef struct {
+       pfm_uuid_t     ctx_smpl_buf_id;  /* which buffer format to use (if needed) */
+       unsigned long  ctx_flags;        /* noblock/block */
+       unsigned short ctx_nextra_sets;  /* number of extra event sets (you always get 1) */
+       unsigned short ctx_reserved1;    /* for future use */
+       int            ctx_fd;           /* return arg: unique identification for context */
+       void           *ctx_smpl_vaddr;  /* return arg: virtual address of sampling buffer, is used */
+       unsigned long  ctx_reserved2[11];/* for future use */
+} pfarg_context_t;
+
+/*
+ * Request structure used to write/read a PMC or PMD
+ */
+typedef struct {
+       unsigned int    reg_num;           /* which register */
+       unsigned short  reg_set;           /* event set for this register */
+       unsigned short  reg_reserved1;     /* for future use */
+
+       unsigned long   reg_value;         /* initial pmc/pmd value */
+       unsigned long   reg_flags;         /* input: pmc/pmd flags, return: reg error */
+
+       unsigned long   reg_long_reset;    /* reset after buffer overflow notification */
+       unsigned long   reg_short_reset;   /* reset after counter overflow */
+
+       unsigned long   reg_reset_pmds[4]; /* which other counters to reset on overflow */
+       unsigned long   reg_random_seed;   /* seed value when randomization is used */
+       unsigned long   reg_random_mask;   /* bitmask used to limit random value */
+       unsigned long   reg_last_reset_val;/* return: PMD last reset value */
+
+       unsigned long   reg_smpl_pmds[4];  /* which pmds are accessed when PMC overflows */
+       unsigned long   reg_smpl_eventid;  /* opaque sampling event identifier */
+
+       unsigned long   reg_reserved2[3];   /* for future use */
+} pfarg_reg_t;
+
+typedef struct {
+       unsigned int    dbreg_num;              /* which debug register */
+       unsigned short  dbreg_set;              /* event set for this register */
+       unsigned short  dbreg_reserved1;        /* for future use */
+       unsigned long   dbreg_value;            /* value for debug register */
+       unsigned long   dbreg_flags;            /* return: dbreg error */
+       unsigned long   dbreg_reserved2[1];     /* for future use */
+} pfarg_dbreg_t;
+
+typedef struct {
+       unsigned int    ft_version;     /* perfmon: major [16-31], minor [0-15] */
+       unsigned int    ft_reserved;    /* reserved for future use */
+       unsigned long   reserved[4];    /* for future use */
+} pfarg_features_t;
+
+typedef struct {
+       pid_t           load_pid;          /* process to load the context into */
+       unsigned short  load_set;          /* first event set to load */
+       unsigned short  load_reserved1;    /* for future use */
+       unsigned long   load_reserved2[3]; /* for future use */
+} pfarg_load_t;
+
+typedef struct {
+       int             msg_type;               /* generic message header */
+       int             msg_ctx_fd;             /* generic message header */
+       unsigned long   msg_ovfl_pmds[4];       /* which PMDs overflowed */
+       unsigned short  msg_active_set;         /* active set at the time of overflow */
+       unsigned short  msg_reserved1;          /* for future use */
+       unsigned int    msg_reserved2;          /* for future use */
+       unsigned long   msg_tstamp;             /* for perf tuning/debug */
+} pfm_ovfl_msg_t;
+
+typedef struct {
+       int             msg_type;               /* generic message header */
+       int             msg_ctx_fd;             /* generic message header */
+       unsigned long   msg_tstamp;             /* for perf tuning */
+} pfm_end_msg_t;
+
+typedef struct {
+       int             msg_type;               /* type of the message */
+       int             msg_ctx_fd;             /* unique identifier for the context */
+       unsigned long   msg_tstamp;             /* for perf tuning */
+} pfm_gen_msg_t;
+
+#define PFM_MSG_OVFL   1       /* an overflow happened */
+#define PFM_MSG_END    2       /* task to which context was attached ended */
+
+typedef union {
+       pfm_ovfl_msg_t  pfm_ovfl_msg;
+       pfm_end_msg_t   pfm_end_msg;
+       pfm_gen_msg_t   pfm_gen_msg;
+} pfm_msg_t;
+
+/*
+ * Define the version numbers for both perfmon as a whole and the sampling buffer format.
+ */
+#define PFM_VERSION_MAJ                 2U
+#define PFM_VERSION_MIN                 0U
+#define PFM_VERSION             (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
+#define PFM_VERSION_MAJOR(x)    (((x)>>16) & 0xffff)
+#define PFM_VERSION_MINOR(x)    ((x) & 0xffff)
+
+
+/*
+ * miscellaneous architected definitions
+ */
+#define PMU_FIRST_COUNTER      4       /* first counting monitor (PMC/PMD) */
+#define PMU_MAX_PMCS           256     /* maximum architected number of PMC registers */
+#define PMU_MAX_PMDS           256     /* maximum architected number of PMD registers */
+
+
+#endif /* _UAPI_ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/uapi/asm/ptrace.h b/arch/ia64/include/uapi/asm/ptrace.h
new file mode 100644 (file)
index 0000000..0a02f63
--- /dev/null
@@ -0,0 +1,247 @@
+/*
+ * Copyright (C) 1998-2004 Hewlett-Packard Co
+ *     David Mosberger-Tang <davidm@hpl.hp.com>
+ *     Stephane Eranian <eranian@hpl.hp.com>
+ * Copyright (C) 2003 Intel Co
+ *     Suresh Siddha <suresh.b.siddha@intel.com>
+ *     Fenghua Yu <fenghua.yu@intel.com>
+ *     Arun Sharma <arun.sharma@intel.com>
+ *
+ * 12/07/98    S. Eranian      added pt_regs & switch_stack
+ * 12/21/98    D. Mosberger    updated to match latest code
+ *  6/17/99    D. Mosberger    added second unat member to "struct switch_stack"
+ *
+ */
+#ifndef _UAPI_ASM_IA64_PTRACE_H
+#define _UAPI_ASM_IA64_PTRACE_H
+
+/*
+ * When a user process is blocked, its state looks as follows:
+ *
+ *            +----------------------+ ------- IA64_STK_OFFSET
+ *                   |                      |   ^
+ *            | struct pt_regs       |  |
+ *           |                      |   |
+ *            +----------------------+  |
+ *           |                      |   |
+ *                   |    memory stack      |   |
+ *           | (growing downwards)  |   |
+ *           //.....................//  |
+ *                                      |
+ *           //.....................//  |
+ *           |                      |   |
+ *            +----------------------+  |
+ *            | struct switch_stack  |  |
+ *           |                      |   |
+ *           +----------------------+   |
+ *           |                      |   |
+ *           //.....................//  |
+ *                                      |
+ *           //.....................//  |
+ *           |                      |   |
+ *           |  register stack      |   |
+ *           | (growing upwards)    |   |
+ *            |                             |   |
+ *           +----------------------+   |  --- IA64_RBS_OFFSET
+ *            |  struct thread_info  |  |  ^
+ *           +----------------------+   |  |
+ *           |                      |   |  |
+ *            |  struct task_struct  |  |  |
+ * current -> |                             |   |  |
+ *           +----------------------+ -------
+ *
+ * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
+ * This is because ar.ec is saved as part of ar.pfs.
+ */
+
+
+#include <asm/fpu.h>
+
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This struct defines the way the registers are saved on system
+ * calls.
+ *
+ * We don't save all floating point register because the kernel
+ * is compiled to use only a very small subset, so the other are
+ * untouched.
+ *
+ * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
+ * (because the memory stack pointer MUST ALWAYS be aligned this way)
+ *
+ */
+struct pt_regs {
+       /* The following registers are saved by SAVE_MIN: */
+       unsigned long b6;               /* scratch */
+       unsigned long b7;               /* scratch */
+
+       unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
+       unsigned long ar_ssd;           /* reserved for future use (scratch) */
+
+       unsigned long r8;               /* scratch (return value register 0) */
+       unsigned long r9;               /* scratch (return value register 1) */
+       unsigned long r10;              /* scratch (return value register 2) */
+       unsigned long r11;              /* scratch (return value register 3) */
+
+       unsigned long cr_ipsr;          /* interrupted task's psr */
+       unsigned long cr_iip;           /* interrupted task's instruction pointer */
+       /*
+        * interrupted task's function state; if bit 63 is cleared, it
+        * contains syscall's ar.pfs.pfm:
+        */
+       unsigned long cr_ifs;
+
+       unsigned long ar_unat;          /* interrupted task's NaT register (preserved) */
+       unsigned long ar_pfs;           /* prev function state  */
+       unsigned long ar_rsc;           /* RSE configuration */
+       /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
+       unsigned long ar_rnat;          /* RSE NaT */
+       unsigned long ar_bspstore;      /* RSE bspstore */
+
+       unsigned long pr;               /* 64 predicate registers (1 bit each) */
+       unsigned long b0;               /* return pointer (bp) */
+       unsigned long loadrs;           /* size of dirty partition << 16 */
+
+       unsigned long r1;               /* the gp pointer */
+       unsigned long r12;              /* interrupted task's memory stack pointer */
+       unsigned long r13;              /* thread pointer */
+
+       unsigned long ar_fpsr;          /* floating point status (preserved) */
+       unsigned long r15;              /* scratch */
+
+       /* The remaining registers are NOT saved for system calls.  */
+
+       unsigned long r14;              /* scratch */
+       unsigned long r2;               /* scratch */
+       unsigned long r3;               /* scratch */
+
+       /* The following registers are saved by SAVE_REST: */
+       unsigned long r16;              /* scratch */
+       unsigned long r17;              /* scratch */
+       unsigned long r18;              /* scratch */
+       unsigned long r19;              /* scratch */
+       unsigned long r20;              /* scratch */
+       unsigned long r21;              /* scratch */
+       unsigned long r22;              /* scratch */
+       unsigned long r23;              /* scratch */
+       unsigned long r24;              /* scratch */
+       unsigned long r25;              /* scratch */
+       unsigned long r26;              /* scratch */
+       unsigned long r27;              /* scratch */
+       unsigned long r28;              /* scratch */
+       unsigned long r29;              /* scratch */
+       unsigned long r30;              /* scratch */
+       unsigned long r31;              /* scratch */
+
+       unsigned long ar_ccv;           /* compare/exchange value (scratch) */
+
+       /*
+        * Floating point registers that the kernel considers scratch:
+        */
+       struct ia64_fpreg f6;           /* scratch */
+       struct ia64_fpreg f7;           /* scratch */
+       struct ia64_fpreg f8;           /* scratch */
+       struct ia64_fpreg f9;           /* scratch */
+       struct ia64_fpreg f10;          /* scratch */
+       struct ia64_fpreg f11;          /* scratch */
+};
+
+/*
+ * This structure contains the addition registers that need to
+ * preserved across a context switch.  This generally consists of
+ * "preserved" registers.
+ */
+struct switch_stack {
+       unsigned long caller_unat;      /* user NaT collection register (preserved) */
+       unsigned long ar_fpsr;          /* floating-point status register */
+
+       struct ia64_fpreg f2;           /* preserved */
+       struct ia64_fpreg f3;           /* preserved */
+       struct ia64_fpreg f4;           /* preserved */
+       struct ia64_fpreg f5;           /* preserved */
+
+       struct ia64_fpreg f12;          /* scratch, but untouched by kernel */
+       struct ia64_fpreg f13;          /* scratch, but untouched by kernel */
+       struct ia64_fpreg f14;          /* scratch, but untouched by kernel */
+       struct ia64_fpreg f15;          /* scratch, but untouched by kernel */
+       struct ia64_fpreg f16;          /* preserved */
+       struct ia64_fpreg f17;          /* preserved */
+       struct ia64_fpreg f18;          /* preserved */
+       struct ia64_fpreg f19;          /* preserved */
+       struct ia64_fpreg f20;          /* preserved */
+       struct ia64_fpreg f21;          /* preserved */
+       struct ia64_fpreg f22;          /* preserved */
+       struct ia64_fpreg f23;          /* preserved */
+       struct ia64_fpreg f24;          /* preserved */
+       struct ia64_fpreg f25;          /* preserved */
+       struct ia64_fpreg f26;          /* preserved */
+       struct ia64_fpreg f27;          /* preserved */
+       struct ia64_fpreg f28;          /* preserved */
+       struct ia64_fpreg f29;          /* preserved */
+       struct ia64_fpreg f30;          /* preserved */
+       struct ia64_fpreg f31;          /* preserved */
+
+       unsigned long r4;               /* preserved */
+       unsigned long r5;               /* preserved */
+       unsigned long r6;               /* preserved */
+       unsigned long r7;               /* preserved */
+
+       unsigned long b0;               /* so we can force a direct return in copy_thread */
+       unsigned long b1;
+       unsigned long b2;
+       unsigned long b3;
+       unsigned long b4;
+       unsigned long b5;
+
+       unsigned long ar_pfs;           /* previous function state */
+       unsigned long ar_lc;            /* loop counter (preserved) */
+       unsigned long ar_unat;          /* NaT bits for r4-r7 */
+       unsigned long ar_rnat;          /* RSE NaT collection register */
+       unsigned long ar_bspstore;      /* RSE dirty base (preserved) */
+       unsigned long pr;               /* 64 predicate registers (1 bit each) */
+};
+
+
+/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
+struct pt_all_user_regs {
+       unsigned long nat;
+       unsigned long cr_iip;
+       unsigned long cfm;
+       unsigned long cr_ipsr;
+       unsigned long pr;
+
+       unsigned long gr[32];
+       unsigned long br[8];
+       unsigned long ar[128];
+       struct ia64_fpreg fr[128];
+};
+
+#endif /* !__ASSEMBLY__ */
+
+/* indices to application-registers array in pt_all_user_regs */
+#define PT_AUR_RSC     16
+#define PT_AUR_BSP     17
+#define PT_AUR_BSPSTORE        18
+#define PT_AUR_RNAT    19
+#define PT_AUR_CCV     32
+#define PT_AUR_UNAT    36
+#define PT_AUR_FPSR    40
+#define PT_AUR_PFS     64
+#define PT_AUR_LC      65
+#define PT_AUR_EC      66
+
+/*
+ * The numbers chosen here are somewhat arbitrary but absolutely MUST
+ * not overlap with any of the number assigned in <linux/ptrace.h>.
+ */
+#define PTRACE_SINGLEBLOCK     12      /* resume execution until next branch */
+#define PTRACE_OLD_GETSIGINFO  13      /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>)  */
+#define PTRACE_OLD_SETSIGINFO  14      /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>)  */
+#define PTRACE_GETREGS         18      /* get all registers (pt_all_user_regs) in one shot */
+#define PTRACE_SETREGS         19      /* set all registers (pt_all_user_regs) in one shot */
+
+#define PTRACE_OLDSETOPTIONS   21
+
+#endif /* _UAPI_ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/uapi/asm/siginfo.h b/arch/ia64/include/uapi/asm/siginfo.h
new file mode 100644 (file)
index 0000000..4ea6225
--- /dev/null
@@ -0,0 +1,121 @@
+/*
+ * Based on <asm-i386/siginfo.h>.
+ *
+ * Modified 1998-2002
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_SIGINFO_H
+#define _UAPI_ASM_IA64_SIGINFO_H
+
+
+#define __ARCH_SI_PREAMBLE_SIZE        (4 * sizeof(int))
+
+#define HAVE_ARCH_SIGINFO_T
+#define HAVE_ARCH_COPY_SIGINFO
+#define HAVE_ARCH_COPY_SIGINFO_TO_USER
+
+#include <asm-generic/siginfo.h>
+
+typedef struct siginfo {
+       int si_signo;
+       int si_errno;
+       int si_code;
+       int __pad0;
+
+       union {
+               int _pad[SI_PAD_SIZE];
+
+               /* kill() */
+               struct {
+                       pid_t _pid;             /* sender's pid */
+                       uid_t _uid;             /* sender's uid */
+               } _kill;
+
+               /* POSIX.1b timers */
+               struct {
+                       timer_t _tid;           /* timer id */
+                       int _overrun;           /* overrun count */
+                       char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
+                       sigval_t _sigval;       /* must overlay ._rt._sigval! */
+                       int _sys_private;       /* not to be passed to user */
+               } _timer;
+
+               /* POSIX.1b signals */
+               struct {
+                       pid_t _pid;             /* sender's pid */
+                       uid_t _uid;             /* sender's uid */
+                       sigval_t _sigval;
+               } _rt;
+
+               /* SIGCHLD */
+               struct {
+                       pid_t _pid;             /* which child */
+                       uid_t _uid;             /* sender's uid */
+                       int _status;            /* exit code */
+                       clock_t _utime;
+                       clock_t _stime;
+               } _sigchld;
+
+               /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+               struct {
+                       void __user *_addr;     /* faulting insn/memory ref. */
+                       int _imm;               /* immediate value for "break" */
+                       unsigned int _flags;    /* see below */
+                       unsigned long _isr;     /* isr */
+                       short _addr_lsb;        /* lsb of faulting address */
+               } _sigfault;
+
+               /* SIGPOLL */
+               struct {
+                       long _band;     /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
+                       int _fd;
+               } _sigpoll;
+       } _sifields;
+} siginfo_t;
+
+#define si_imm         _sifields._sigfault._imm        /* as per UNIX SysV ABI spec */
+#define si_flags       _sifields._sigfault._flags
+/*
+ * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
+ * si_code is non-zero and __ISR_VALID is set in si_flags.
+ */
+#define si_isr         _sifields._sigfault._isr
+
+/*
+ * Flag values for si_flags:
+ */
+#define __ISR_VALID_BIT        0
+#define __ISR_VALID    (1 << __ISR_VALID_BIT)
+
+/*
+ * SIGILL si_codes
+ */
+#define ILL_BADIADDR   (__SI_FAULT|9)  /* unimplemented instruction address */
+#define __ILL_BREAK    (__SI_FAULT|10) /* illegal break */
+#define __ILL_BNDMOD   (__SI_FAULT|11) /* bundle-update (modification) in progress */
+#undef NSIGILL
+#define NSIGILL                11
+
+/*
+ * SIGFPE si_codes
+ */
+#define __FPE_DECOVF   (__SI_FAULT|9)  /* decimal overflow */
+#define __FPE_DECDIV   (__SI_FAULT|10) /* decimal division by zero */
+#define __FPE_DECERR   (__SI_FAULT|11) /* packed decimal error */
+#define __FPE_INVASC   (__SI_FAULT|12) /* invalid ASCII digit */
+#define __FPE_INVDEC   (__SI_FAULT|13) /* invalid decimal digit */
+#undef NSIGFPE
+#define NSIGFPE                13
+
+/*
+ * SIGSEGV si_codes
+ */
+#define __SEGV_PSTKOVF (__SI_FAULT|3)  /* paragraph stack overflow */
+#undef NSIGSEGV
+#define NSIGSEGV       3
+
+#undef NSIGTRAP
+#define NSIGTRAP       4
+
+
+#endif /* _UAPI_ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/uapi/asm/signal.h b/arch/ia64/include/uapi/asm/signal.h
new file mode 100644 (file)
index 0000000..e531c42
--- /dev/null
@@ -0,0 +1,127 @@
+/*
+ * Modified 1998-2001, 2003
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ *
+ * Unfortunately, this file is being included by bits/signal.h in
+ * glibc-2.x.  Hence the #ifdef __KERNEL__ ugliness.
+ */
+#ifndef _UAPI_ASM_IA64_SIGNAL_H
+#define _UAPI_ASM_IA64_SIGNAL_H
+
+
+#define SIGHUP          1
+#define SIGINT          2
+#define SIGQUIT                 3
+#define SIGILL          4
+#define SIGTRAP                 5
+#define SIGABRT                 6
+#define SIGIOT          6
+#define SIGBUS          7
+#define SIGFPE          8
+#define SIGKILL                 9
+#define SIGUSR1                10
+#define SIGSEGV                11
+#define SIGUSR2                12
+#define SIGPIPE                13
+#define SIGALRM                14
+#define SIGTERM                15
+#define SIGSTKFLT      16
+#define SIGCHLD                17
+#define SIGCONT                18
+#define SIGSTOP                19
+#define SIGTSTP                20
+#define SIGTTIN                21
+#define SIGTTOU                22
+#define SIGURG         23
+#define SIGXCPU                24
+#define SIGXFSZ                25
+#define SIGVTALRM      26
+#define SIGPROF                27
+#define SIGWINCH       28
+#define SIGIO          29
+#define SIGPOLL                SIGIO
+/*
+#define SIGLOST                29
+*/
+#define SIGPWR         30
+#define SIGSYS         31
+/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
+#define        SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN       32
+#define SIGRTMAX       _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP   0x00000001
+#define SA_NOCLDWAIT   0x00000002
+#define SA_SIGINFO     0x00000004
+#define SA_ONSTACK     0x08000000
+#define SA_RESTART     0x10000000
+#define SA_NODEFER     0x40000000
+#define SA_RESETHAND   0x80000000
+
+#define SA_NOMASK      SA_NODEFER
+#define SA_ONESHOT     SA_RESETHAND
+
+#define SA_RESTORER    0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK     1
+#define SS_DISABLE     2
+
+/*
+ * The minimum stack size needs to be fairly large because we want to
+ * be sure that an app compiled for today's CPUs will continue to run
+ * on all future CPU models.  The CPU model matters because the signal
+ * frame needs to have space for the complete machine state, including
+ * all physical stacked registers.  The number of physical stacked
+ * registers is CPU model dependent, but given that the width of
+ * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
+ * more than 16KB of space.
+ */
+#if 1
+  /*
+   * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
+   * in wrong. ;-(  To preserve backwards compatibility, we leave the kernel at the
+   * incorrect value and fix libc only.
+   */
+# define MINSIGSTKSZ   131027  /* min. stack size for sigaltstack() */
+#else
+# define MINSIGSTKSZ   131072  /* min. stack size for sigaltstack() */
+#endif
+#define SIGSTKSZ       262144  /* default stack size for sigaltstack() */
+
+
+#include <asm-generic/signal-defs.h>
+
+# ifndef __ASSEMBLY__
+
+#  include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+typedef struct sigaltstack {
+       void __user *ss_sp;
+       int ss_flags;
+       size_t ss_size;
+} stack_t;
+
+
+# endif /* !__ASSEMBLY__ */
+#endif /* _UAPI_ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/uapi/asm/termios.h b/arch/ia64/include/uapi/asm/termios.h
new file mode 100644 (file)
index 0000000..d59b48c
--- /dev/null
@@ -0,0 +1,50 @@
+/*
+ * Modified 1999
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ *
+ * 99/01/28    Added N_IRDA and N_SMSBLOCK
+ */
+#ifndef _UAPI_ASM_IA64_TERMIOS_H
+#define _UAPI_ASM_IA64_TERMIOS_H
+
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+       unsigned short ws_row;
+       unsigned short ws_col;
+       unsigned short ws_xpixel;
+       unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+       unsigned short c_iflag;         /* input mode flags */
+       unsigned short c_oflag;         /* output mode flags */
+       unsigned short c_cflag;         /* control mode flags */
+       unsigned short c_lflag;         /* local mode flags */
+       unsigned char c_line;           /* line discipline */
+       unsigned char c_cc[NCC];        /* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE       0x001
+#define TIOCM_DTR      0x002
+#define TIOCM_RTS      0x004
+#define TIOCM_ST       0x008
+#define TIOCM_SR       0x010
+#define TIOCM_CTS      0x020
+#define TIOCM_CAR      0x040
+#define TIOCM_RNG      0x080
+#define TIOCM_DSR      0x100
+#define TIOCM_CD       TIOCM_CAR
+#define TIOCM_RI       TIOCM_RNG
+#define TIOCM_OUT1     0x2000
+#define TIOCM_OUT2     0x4000
+#define TIOCM_LOOP     0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+
+#endif /* _UAPI_ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/uapi/asm/types.h b/arch/ia64/include/uapi/asm/types.h
new file mode 100644 (file)
index 0000000..321193b
--- /dev/null
@@ -0,0 +1,31 @@
+/*
+ * This file is never included by application software unless explicitly
+ * requested (e.g., via linux/types.h) in which case the application is
+ * Linux specific so (user-) name space pollution is not a major issue.
+ * However, for interoperability, libraries still need to be careful to
+ * avoid naming clashes.
+ *
+ * Based on <asm-alpha/types.h>.
+ *
+ * Modified 1998-2000, 2002
+ *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_TYPES_H
+#define _UAPI_ASM_IA64_TYPES_H
+
+
+#ifndef __KERNEL__
+#include <asm-generic/int-l64.h>
+#endif
+
+#ifdef __ASSEMBLY__
+# define __IA64_UL(x)          (x)
+# define __IA64_UL_CONST(x)    x
+
+#else
+# define __IA64_UL(x)          ((unsigned long)(x))
+# define __IA64_UL_CONST(x)    x##UL
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _UAPI_ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
new file mode 100644 (file)
index 0000000..b706aa5
--- /dev/null
@@ -0,0 +1,328 @@
+/*
+ * IA-64 Linux syscall numbers and inline-functions.
+ *
+ * Copyright (C) 1998-2005 Hewlett-Packard Co
+ *     David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+#ifndef _UAPI_ASM_IA64_UNISTD_H
+#define _UAPI_ASM_IA64_UNISTD_H
+
+
+#include <asm/break.h>
+
+#define __BREAK_SYSCALL                        __IA64_BREAK_SYSCALL
+
+#define __NR_ni_syscall                        1024
+#define __NR_exit                      1025
+#define __NR_read                      1026
+#define __NR_write                     1027
+#define __NR_open                      1028
+#define __NR_close                     1029
+#define __NR_creat                     1030
+#define __NR_link                      1031
+#define __NR_unlink                    1032
+#define __NR_execve                    1033
+#define __NR_chdir                     1034
+#define __NR_fchdir                    1035
+#define __NR_utimes                    1036
+#define __NR_mknod                     1037
+#define __NR_chmod                     1038
+#define __NR_chown                     1039
+#define __NR_lseek                     1040
+#define __NR_getpid                    1041
+#define __NR_getppid                   1042
+#define __NR_mount                     1043
+#define __NR_umount                    1044
+#define __NR_setuid                    1045
+#define __NR_getuid                    1046
+#define __NR_geteuid                   1047
+#define __NR_ptrace                    1048
+#define __NR_access                    1049
+#define __NR_sync                      1050
+#define __NR_fsync                     1051
+#define __NR_fdatasync                 1052
+#define __NR_kill                      1053
+#define __NR_rename                    1054
+#define __NR_mkdir                     1055
+#define __NR_rmdir                     1056
+#define __NR_dup                       1057
+#define __NR_pipe                      1058
+#define __NR_times                     1059
+#define __NR_brk                       1060
+#define __NR_setgid                    1061
+#define __NR_getgid                    1062
+#define __NR_getegid                   1063
+#define __NR_acct                      1064
+#define __NR_ioctl                     1065
+#define __NR_fcntl                     1066
+#define __NR_umask                     1067
+#define __NR_chroot                    1068
+#define __NR_ustat                     1069
+#define __NR_dup2                      1070
+#define __NR_setreuid                  1071
+#define __NR_setregid                  1072
+#define __NR_getresuid                 1073
+#define __NR_setresuid                 1074
+#define __NR_getresgid                 1075
+#define __NR_setresgid                 1076
+#define __NR_getgroups                 1077
+#define __NR_setgroups                 1078
+#define __NR_getpgid                   1079
+#define __NR_setpgid                   1080
+#define __NR_setsid                    1081
+#define __NR_getsid                    1082
+#define __NR_sethostname               1083
+#define __NR_setrlimit                 1084
+#define __NR_getrlimit                 1085
+#define __NR_getrusage                 1086
+#define __NR_gettimeofday              1087
+#define __NR_settimeofday              1088
+#define __NR_select                    1089
+#define __NR_poll                      1090
+#define __NR_symlink                   1091
+#define __NR_readlink                  1092
+#define __NR_uselib                    1093
+#define __NR_swapon                    1094
+#define __NR_swapoff                   1095
+#define __NR_reboot                    1096
+#define __NR_truncate                  1097
+#define __NR_ftruncate                 1098
+#define __NR_fchmod                    1099
+#define __NR_fchown                    1100
+#define __NR_getpriority               1101
+#define __NR_setpriority               1102
+#define __NR_statfs                    1103
+#define __NR_fstatfs                   1104
+#define __NR_gettid                    1105
+#define __NR_semget                    1106
+#define __NR_semop                     1107
+#define __NR_semctl                    1108
+#define __NR_msgget                    1109
+#define __NR_msgsnd                    1110
+#define __NR_msgrcv                    1111
+#define __NR_msgctl                    1112
+#define __NR_shmget                    1113
+#define __NR_shmat                     1114
+#define __NR_shmdt                     1115
+#define __NR_shmctl                    1116
+/* also known as klogctl() in GNU libc: */
+#define __NR_syslog                    1117
+#define __NR_setitimer                 1118
+#define __NR_getitimer                 1119
+/* 1120 was __NR_old_stat */
+/* 1121 was __NR_old_lstat */
+/* 1122 was __NR_old_fstat */
+#define __NR_vhangup                   1123
+#define __NR_lchown                    1124
+#define __NR_remap_file_pages          1125
+#define __NR_wait4                     1126
+#define __NR_sysinfo                   1127
+#define __NR_clone                     1128
+#define __NR_setdomainname             1129
+#define __NR_uname                     1130
+#define __NR_adjtimex                  1131
+/* 1132 was __NR_create_module */
+#define __NR_init_module               1133
+#define __NR_delete_module             1134
+/* 1135 was __NR_get_kernel_syms */
+/* 1136 was __NR_query_module */
+#define __NR_quotactl                  1137
+#define __NR_bdflush                   1138
+#define __NR_sysfs                     1139
+#define __NR_personality               1140
+#define __NR_afs_syscall               1141
+#define __NR_setfsuid                  1142
+#define __NR_setfsgid                  1143
+#define __NR_getdents                  1144
+#define __NR_flock                     1145
+#define __NR_readv                     1146
+#define __NR_writev                    1147
+#define __NR_pread64                   1148
+#define __NR_pwrite64                  1149
+#define __NR__sysctl                   1150
+#define __NR_mmap                      1151
+#define __NR_munmap                    1152
+#define __NR_mlock                     1153
+#define __NR_mlockall                  1154
+#define __NR_mprotect                  1155
+#define __NR_mremap                    1156
+#define __NR_msync                     1157
+#define __NR_munlock                   1158
+#define __NR_munlockall                        1159
+#define __NR_sched_getparam            1160
+#define __NR_sched_setparam            1161
+#define __NR_sched_getscheduler                1162
+#define __NR_sched_setscheduler                1163
+#define __NR_sched_yield               1164
+#define __NR_sched_get_priority_max    1165
+#define __NR_sched_get_priority_min    1166
+#define __NR_sched_rr_get_interval     1167
+#define __NR_nanosleep                 1168
+#define __NR_nfsservctl                        1169
+#define __NR_prctl                     1170
+/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
+#define __NR_mmap2                     1172
+#define __NR_pciconfig_read            1173
+#define __NR_pciconfig_write           1174
+#define __NR_perfmonctl                        1175
+#define __NR_sigaltstack               1176
+#define __NR_rt_sigaction              1177
+#define __NR_rt_sigpending             1178
+#define __NR_rt_sigprocmask            1179
+#define __NR_rt_sigqueueinfo           1180
+#define __NR_rt_sigreturn              1181
+#define __NR_rt_sigsuspend             1182
+#define __NR_rt_sigtimedwait           1183
+#define __NR_getcwd                    1184
+#define __NR_capget                    1185
+#define __NR_capset                    1186
+#define __NR_sendfile                  1187
+#define __NR_getpmsg                   1188
+#define __NR_putpmsg                   1189
+#define __NR_socket                    1190
+#define __NR_bind                      1191
+#define __NR_connect                   1192
+#define __NR_listen                    1193
+#define __NR_accept                    1194
+#define __NR_getsockname               1195
+#define __NR_getpeername               1196
+#define __NR_socketpair                        1197
+#define __NR_send                      1198
+#define __NR_sendto                    1199
+#define __NR_recv                      1200
+#define __NR_recvfrom                  1201
+#define __NR_shutdown                  1202
+#define __NR_setsockopt                        1203
+#define __NR_getsockopt                        1204
+#define __NR_sendmsg                   1205
+#define __NR_recvmsg                   1206
+#define __NR_pivot_root                        1207
+#define __NR_mincore                   1208
+#define __NR_madvise                   1209
+#define __NR_stat                      1210
+#define __NR_lstat                     1211
+#define __NR_fstat                     1212
+#define __NR_clone2                    1213
+#define __NR_getdents64                        1214
+#define __NR_getunwind                 1215
+#define __NR_readahead                 1216
+#define __NR_setxattr                  1217
+#define __NR_lsetxattr                 1218
+#define __NR_fsetxattr                 1219
+#define __NR_getxattr                  1220
+#define __NR_lgetxattr                 1221
+#define __NR_fgetxattr                 1222
+#define __NR_listxattr                 1223
+#define __NR_llistxattr                        1224
+#define __NR_flistxattr                        1225
+#define __NR_removexattr               1226
+#define __NR_lremovexattr              1227
+#define __NR_fremovexattr              1228
+#define __NR_tkill                     1229
+#define __NR_futex                     1230
+#define __NR_sched_setaffinity         1231
+#define __NR_sched_getaffinity         1232
+#define __NR_set_tid_address           1233
+#define __NR_fadvise64                 1234
+#define __NR_tgkill                    1235
+#define __NR_exit_group                        1236
+#define __NR_lookup_dcookie            1237
+#define __NR_io_setup                  1238
+#define __NR_io_destroy                        1239
+#define __NR_io_getevents              1240
+#define __NR_io_submit                 1241
+#define __NR_io_cancel                 1242
+#define __NR_epoll_create              1243
+#define __NR_epoll_ctl                 1244
+#define __NR_epoll_wait                        1245
+#define __NR_restart_syscall           1246
+#define __NR_semtimedop                        1247
+#define __NR_timer_create              1248
+#define __NR_timer_settime             1249
+#define __NR_timer_gettime             1250
+#define __NR_timer_getoverrun          1251
+#define __NR_timer_delete              1252
+#define __NR_clock_settime             1253
+#define __NR_clock_gettime             1254
+#define __NR_clock_getres              1255
+#define __NR_clock_nanosleep           1256
+#define __NR_fstatfs64                 1257
+#define __NR_statfs64                  1258
+#define __NR_mbind                     1259
+#define __NR_get_mempolicy             1260
+#define __NR_set_mempolicy             1261
+#define __NR_mq_open                   1262
+#define __NR_mq_unlink                 1263
+#define __NR_mq_timedsend              1264
+#define __NR_mq_timedreceive           1265
+#define __NR_mq_notify                 1266
+#define __NR_mq_getsetattr             1267
+#define __NR_kexec_load                        1268
+#define __NR_vserver                   1269
+#define __NR_waitid                    1270
+#define __NR_add_key                   1271
+#define __NR_request_key               1272
+#define __NR_keyctl                    1273
+#define __NR_ioprio_set                        1274
+#define __NR_ioprio_get                        1275
+#define __NR_move_pages                        1276
+#define __NR_inotify_init              1277
+#define __NR_inotify_add_watch         1278
+#define __NR_inotify_rm_watch          1279
+#define __NR_migrate_pages             1280
+#define __NR_openat                    1281
+#define __NR_mkdirat                   1282
+#define __NR_mknodat                   1283
+#define __NR_fchownat                  1284
+#define __NR_futimesat                 1285
+#define __NR_newfstatat                        1286
+#define __NR_unlinkat                  1287
+#define __NR_renameat                  1288
+#define __NR_linkat                    1289
+#define __NR_symlinkat                 1290
+#define __NR_readlinkat                        1291
+#define __NR_fchmodat                  1292
+#define __NR_faccessat                 1293
+#define __NR_pselect6                  1294
+#define __NR_ppoll                     1295
+#define __NR_unshare                   1296
+#define __NR_splice                    1297
+#define __NR_set_robust_list           1298
+#define __NR_get_robust_list           1299
+#define __NR_sync_file_range           1300
+#define __NR_tee                       1301
+#define __NR_vmsplice                  1302
+#define __NR_fallocate                 1303
+#define __NR_getcpu                    1304
+#define __NR_epoll_pwait               1305
+#define __NR_utimensat                 1306
+#define __NR_signalfd                  1307
+#define __NR_timerfd                   1308
+#define __NR_eventfd                   1309
+#define __NR_timerfd_create            1310
+#define __NR_timerfd_settime           1311
+#define __NR_timerfd_gettime           1312
+#define __NR_signalfd4                 1313
+#define __NR_eventfd2                  1314
+#define __NR_epoll_create1             1315
+#define __NR_dup3                      1316
+#define __NR_pipe2                     1317
+#define __NR_inotify_init1             1318
+#define __NR_preadv                    1319
+#define __NR_pwritev                   1320
+#define __NR_rt_tgsigqueueinfo         1321
+#define __NR_recvmmsg                  1322
+#define __NR_fanotify_init             1323
+#define __NR_fanotify_mark             1324
+#define __NR_prlimit64                 1325
+#define __NR_name_to_handle_at         1326
+#define __NR_open_by_handle_at         1327
+#define __NR_clock_adjtime             1328
+#define __NR_syncfs                    1329
+#define __NR_setns                     1330
+#define __NR_sendmmsg                  1331
+#define __NR_process_vm_readv          1332
+#define __NR_process_vm_writev         1333
+#define __NR_accept4                   1334
+
+#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/uapi/asm/ustack.h b/arch/ia64/include/uapi/asm/ustack.h
new file mode 100644 (file)
index 0000000..1dfebc6
--- /dev/null
@@ -0,0 +1,12 @@
+#ifndef _UAPI_ASM_IA64_USTACK_H
+#define _UAPI_ASM_IA64_USTACK_H
+
+/*
+ * Constants for the user stack size
+ */
+
+
+/* Make a default stack size of 2GiB */
+#define DEFAULT_USER_STACK_SIZE        (1UL << 31)
+
+#endif /* _UAPI_ASM_IA64_USTACK_H */