ARM: tegra12: dvfs: Add GPU rail Vmin thermal floor
Alex Frid [Fri, 6 Sep 2013 03:49:59 +0000 (20:49 -0700)]
Implemented Tegra12 GPU rail Vmin floor 0.9V when temperature is
below 20C.

Bug 1273253
Bug 1342499

Change-Id: I5e8fce0c798145d5682c9e60c219e7f603703324
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/271329
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

arch/arm/mach-tegra/board-ardbeg-sensors.c
arch/arm/mach-tegra/board-common.c
arch/arm/mach-tegra/dvfs.c
arch/arm/mach-tegra/dvfs.h
arch/arm/mach-tegra/tegra12_dvfs.c

index 9c1417c..23f86e7 100644 (file)
@@ -741,11 +741,9 @@ static int ardbeg_nct72_init(void)
                                        12000); /* edp temperature margin */
        }
 
-
-/*
        tegra_add_cdev_trips(ardbeg_nct72_pdata.trips,
                                &ardbeg_nct72_pdata.num_trips);
-*/
+
        ardbeg_i2c_nct72_board_info[0].irq = gpio_to_irq(nct72_port);
 
        ret = gpio_request(nct72_port, "temp_alert");
index d432221..fd41324 100644 (file)
@@ -171,6 +171,7 @@ void tegra_add_cdev_trips(struct thermal_trip_info *trips, int *num_trips)
        tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_cpu_vmin_cdev());
        tegra_add_trip_points(trips, num_trips,
                              tegra_dvfs_get_core_vmin_cdev());
+       tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_gpu_vmin_cdev());
 }
 
 void tegra_add_tj_trips(struct thermal_trip_info *trips, int *num_trips)
index 80f1320..d2f326c 100644 (file)
@@ -1179,6 +1179,13 @@ struct tegra_cooling_device *tegra_dvfs_get_core_vmin_cdev(void)
        return NULL;
 }
 
+struct tegra_cooling_device *tegra_dvfs_get_gpu_vmin_cdev(void)
+{
+       if (tegra_gpu_rail)
+               return tegra_gpu_rail->vmin_cdev;
+       return NULL;
+}
+
 #ifdef CONFIG_THERMAL
 /* Cooling device limits minimum rail voltage at cold temperature in pll mode */
 static int tegra_dvfs_rail_get_vmin_cdev_max_state(
index 38d0189..29b6736 100644 (file)
@@ -233,6 +233,7 @@ int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate);
 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmax_cdev(void);
 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmin_cdev(void);
 struct tegra_cooling_device *tegra_dvfs_get_core_vmin_cdev(void);
+struct tegra_cooling_device *tegra_dvfs_get_gpu_vmin_cdev(void);
 void __init init_rail_vmin_thermal_profile(
        int *therm_trips_table, int *therm_floors_table,
        struct dvfs_rail *rail, struct dvfs_dfll_data *d);
index 642f6b8..8807e64 100644 (file)
@@ -43,6 +43,9 @@ static bool tegra_dvfs_gpu_disabled;
 static int vdd_core_therm_trips_table[MAX_THERMAL_LIMITS] = { 20, };
 static int vdd_core_therm_floors_table[MAX_THERMAL_LIMITS] = { 950, };
 
+static int vdd_gpu_therm_trips_table[MAX_THERMAL_LIMITS] = { 20, };
+static int vdd_gpu_therm_floors_table[MAX_THERMAL_LIMITS] = { 900, };
+
 static struct tegra_cooling_device cpu_cdev = {
        .cdev_type = "cpu_cold",
 };
@@ -51,6 +54,10 @@ static struct tegra_cooling_device core_cdev = {
        .cdev_type = "core_cold",
 };
 
+static struct tegra_cooling_device gpu_cdev = {
+       .cdev_type = "gpu_cold",
+};
+
 static struct dvfs_rail tegra12_dvfs_rail_vdd_cpu = {
        .reg_id = "vdd_cpu",
        .max_millivolts = 1400,
@@ -80,6 +87,7 @@ static struct dvfs_rail tegra12_dvfs_rail_vdd_gpu = {
        .max_millivolts = 1350,
        .min_millivolts = 700,
        .step = VDD_SAFE_STEP,
+       .vmin_cdev = &gpu_cdev,
        .alignment = {
                .step_uv = 10000, /* 10mV */
        },
@@ -788,6 +796,8 @@ void __init tegra12x_init_dvfs(void)
                &tegra12_dvfs_rail_vdd_cpu, &cpu_dvfs.dfll_data);
        init_rail_thermal_profile(vdd_core_therm_trips_table,
                vdd_core_therm_floors_table, &tegra12_dvfs_rail_vdd_core, NULL);*/
+       init_rail_vmin_thermal_profile(vdd_gpu_therm_trips_table,
+               vdd_gpu_therm_floors_table, &tegra12_dvfs_rail_vdd_gpu, NULL);
 
        /* Init rail structures and dependencies */
        tegra_dvfs_init_rails(tegra12_dvfs_rails,