ARM: tegra: power: save cluster switch status before entering LP0
Jin Qian [Fri, 2 Sep 2011 23:22:18 +0000 (16:22 -0700)]
warm boot reads SCRATCH4 to choose wake-up from LP or G

Bug 862504

Change-Id: I5ee4697c6268d379a6708e6a87e3f7df12f2994a
Reviewed-on: http://git-master/r/50610
Reviewed-by: Jin Qian <jqian@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R7e61acb99f023449c2416054c44b75837c3aff94

arch/arm/mach-tegra/pm.c

index 7e17902..91615b0 100644 (file)
@@ -135,10 +135,15 @@ struct suspend_context tegra_sctx;
 #define PMC_COREPWRGOOD_TIMER  0x3c
 #define PMC_SCRATCH0           0x50
 #define PMC_SCRATCH1           0x54
+#define PMC_SCRATCH4           0x60
 #define PMC_CPUPWRGOOD_TIMER   0xc8
 #define PMC_CPUPWROFF_TIMER    0xcc
 #define PMC_COREPWROFF_TIMER   PMC_WAKE_DELAY
 
+#ifdef CONFIG_TEGRA_CLUSTER_CONTROL
+#define PMC_SCRATCH4_WAKE_CLUSTER_MASK (1<<31)
+#endif
+
 #define CLK_RESET_CCLK_BURST   0x20
 #define CLK_RESET_CCLK_DIVIDER  0x24
 #define CLK_RESET_PLLC_BASE    0x80
@@ -771,15 +776,23 @@ int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags)
        cpu_cluster_pm_enter();
 
        if (mode == TEGRA_SUSPEND_LP0) {
+#ifdef CONFIG_TEGRA_CLUSTER_CONTROL
+               u32 reg = readl(pmc + PMC_SCRATCH4);
+               if (is_lp_cluster())
+                       reg |= PMC_SCRATCH4_WAKE_CLUSTER_MASK;
+               else
+                       reg &= (~PMC_SCRATCH4_WAKE_CLUSTER_MASK);
+               pmc_32kwritel(reg, PMC_SCRATCH4);
+#endif
                tegra_lp0_suspend_mc();
                tegra_cpu_reset_handler_save();
+
        }
+       else if (mode == TEGRA_SUSPEND_LP1)
+               *iram_cpu_lp1_mask = 1;
 
        suspend_cpu_complex(flags);
 
-       if (mode == TEGRA_SUSPEND_LP1)
-               *iram_cpu_lp1_mask = 1;
-
        flush_cache_all();
        outer_flush_all();
        outer_disable();