ARM: tegra: Tegra12x sdio clock gate enable
Bitan Biswas [Tue, 29 Oct 2013 07:20:46 +0000 (12:20 +0530)]
SDIO clock gate is enabled for following T12x
boards:
ardbeg
loki
vcm30_t124

bug 1299485

Change-Id: I01f3777269c8d82899ac427c91618f3a2962a2eb
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/304727
Reviewed-by: Automatic_Commit_Validation_User

arch/arm/mach-tegra/board-ardbeg-sdhci.c
arch/arm/mach-tegra/board-loki-sdhci.c
arch/arm/mach-tegra/board-vcm30_t124-sdhci.c

index afd3a15..3332896 100644 (file)
@@ -184,7 +184,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
                MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .disable_clock_gate = true,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
index 8483350..b0306b2 100644 (file)
@@ -156,7 +156,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
                MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .disable_clock_gate = true,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
index c2d8367..b77602f 100644 (file)
@@ -95,7 +95,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data1 = {
        .tap_delay = 0x0F,
        .ddr_clk_limit = 30000000,
        .is_8bit = false,
-       .disable_clock_gate = true,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {