arm: tegra: ardbeg: add initial board file
Mitch Luban [Wed, 3 Apr 2013 20:41:24 +0000 (13:41 -0700)]
Adding basic board file for ardbeg.

Bug 1257423

Change-Id: I6c8c666da189e6b0ea39024218937ded2f8fe148
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/216248
Reviewed-by: Chao Xu <cxu@nvidia.com>

arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-ardbeg.c [new file with mode: 0644]
arch/arm/mach-tegra/platsmp.c
arch/arm/mach-tegra/tegra12_speedo.c [new file with mode: 0644]

index ccf0eb4..7ae5e17 100644 (file)
@@ -112,10 +112,12 @@ endif
 ifeq ($(CONFIG_TEGRA_SILICON_PLATFORM),y)
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += tegra11_speedo.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += tegra14_speedo.o
+obj-$(CONFIG_ARCH_TEGRA_12x_SOC)        += tegra12_speedo.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra3_actmon.o
 endif
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += tegra3_actmon.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += tegra3_actmon.o
+obj-$(CONFIG_ARCH_TEGRA_12x_SOC)        += tegra3_actmon.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_emc.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra3_emc.o
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += tegra11_emc.o
@@ -146,6 +148,7 @@ ifeq ($(CONFIG_TEGRA_CPUQUIET),y)
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += cpuquiet.o
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += cpuquiet.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += cpuquiet.o
+obj-$(CONFIG_ARCH_TEGRA_12x_SOC)        += cpuquiet.o
 else
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += cpu-tegra3.o
 endif
@@ -154,11 +157,13 @@ obj-$(CONFIG_TEGRA_PCI)                 += pcie.o
 ifeq ($(CONFIG_TEGRA_SOCTHERM),y)
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += tegra11_soctherm.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += tegra11_soctherm.o
+obj-$(CONFIG_ARCH_TEGRA_12x_SOC)        += tegra11_soctherm.o
 endif
 ifeq ($(CONFIG_TEGRA_THERMAL_THROTTLE),y)
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra3_throttle.o
 obj-$(CONFIG_ARCH_TEGRA_11x_SOC)        += tegra3_throttle.o
 obj-$(CONFIG_ARCH_TEGRA_14x_SOC)        += tegra3_throttle.o
+obj-$(CONFIG_ARCH_TEGRA_12x_SOC)        += tegra3_throttle.o
 endif
 obj-$(CONFIG_DEBUG_ICEDCC)              += sysfs-dcc.o
 obj-$(CONFIG_TEGRA_CLUSTER_CONTROL)     += sysfs-cluster.o
@@ -255,6 +260,8 @@ obj-${CONFIG_MACH_TEGRA_PLUTO}          += panel-l-720p-5.o
 obj-${CONFIG_MACH_TEGRA_PLUTO}          += panel-j-720p-4-7.o
 obj-${CONFIG_MACH_TEGRA_PLUTO}          += panel-s-1080p-5.o
 
+obj-${CONFIG_MACH_ARDBEG}               += board-ardbeg.o
+
 obj-${CONFIG_TEGRA_BB_XMM_POWER}        += baseband-xmm-power.o
 obj-${CONFIG_TEGRA_BB_XMM_POWER2}       += baseband-xmm-power2.o
 
diff --git a/arch/arm/mach-tegra/board-ardbeg.c b/arch/arm/mach-tegra/board-ardbeg.c
new file mode 100644 (file)
index 0000000..f5425ba
--- /dev/null
@@ -0,0 +1,137 @@
+/*
+ * arch/arm/mach-tegra/board-ardbeg.c
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/ctype.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/memblock.h>
+#include <linux/of_platform.h>
+
+#include <mach/irqs.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include "board.h"
+#include "board-common.h"
+#include "clock.h"
+#include "common.h"
+#include "devices.h"
+#include "iomap.h"
+
+static struct resource tegra_rtc_resources[] = {
+       [0] = {
+               .start = TEGRA_RTC_BASE,
+               .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start = INT_RTC,
+               .end = INT_RTC,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device tegra_rtc_device = {
+       .name = "tegra_rtc",
+       .id   = -1,
+       .resource = tegra_rtc_resources,
+       .num_resources = ARRAY_SIZE(tegra_rtc_resources),
+};
+
+static struct platform_device tegra_camera = {
+       .name = "tegra_camera",
+       .id = -1,
+};
+
+static struct platform_device *ardbeg_devices[] __initdata = {
+       &tegra_pmu_device,
+       &tegra_rtc_device,
+       &tegra_udc_device,
+#if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
+       &tegra_smmu_device,
+#endif
+       &tegra_camera,
+       &tegra_ahub_device,
+       &tegra_pcm_device,
+       &tegra_dam_device0,
+       &tegra_dam_device1,
+       &tegra_dam_device2,
+       &tegra_i2s_device0,
+       &tegra_i2s_device1,
+       &tegra_i2s_device2,
+       &tegra_i2s_device3,
+       &tegra_i2s_device4,
+       &tegra_spdif_device,
+       &spdif_dit_device,
+       &bluetooth_dit_device,
+       &baseband_dit_device,
+       &tegra_hda_device,
+};
+
+static __initdata struct tegra_clk_init_table ardbeg_clk_init_table[] = {
+       /* name         parent          rate            enabled */
+       { "pll_m",      NULL,           0,              false},
+       { NULL,         NULL,           0,              0},
+};
+
+static void __init tegra_ardbeg_init(void)
+{
+       tegra_clk_init_from_table(ardbeg_clk_init_table);
+       tegra_enable_pinmux();
+       tegra_soc_device_init("ardbeg");
+       platform_add_devices(ardbeg_devices, ARRAY_SIZE(ardbeg_devices));
+}
+
+static void __init tegra_ardbeg_dt_init(void)
+{
+       tegra_ardbeg_init();
+
+       of_platform_populate(NULL,
+               of_default_bus_match_table, NULL, NULL);
+}
+
+static void __init tegra_ardbeg_reserve(void)
+{
+}
+
+static const char * const ardbeg_dt_board_compat[] = {
+       "nvidia,ardbeg",
+       NULL
+};
+
+DT_MACHINE_START(ARDBEG, "ardbeg")
+       .atag_offset    = 0x100,
+       .soc            = &tegra_soc_desc,
+       .map_io         = tegra_map_common_io,
+       .reserve        = tegra_ardbeg_reserve,
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+       .init_early     = tegra11x_init_early,
+#else
+       .init_early     = tegra12x_init_early,
+#endif
+       .init_irq       = tegra_dt_init_irq,
+       .init_time      = tegra_init_timer,
+       .init_machine   = tegra_ardbeg_dt_init,
+       .restart        = tegra_assert_system_reset,
+       .dt_compat      = ardbeg_dt_board_compat,
+MACHINE_END
index ca567f0..7abe88d 100644 (file)
@@ -7,7 +7,7 @@
  *  Copyright (C) 2009 Palm
  *  All Rights Reserved
  *
- *  Copyright (C) 2010-2011 NVIDIA Corporation
+ *  Copyright (C) 2010-2013, NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -330,6 +330,7 @@ static int __cpuinit tegra_boot_secondary(unsigned int cpu, struct task_struct *
                break;
        case TEGRA_CHIPID_TEGRA11:
        case TEGRA_CHIPID_TEGRA14:
+       case TEGRA_CHIPID_TEGRA12:
                status = tegra11x_power_up_cpu(cpu);
                break;
        default:
diff --git a/arch/arm/mach-tegra/tegra12_speedo.c b/arch/arm/mach-tegra/tegra12_speedo.c
new file mode 100644 (file)
index 0000000..14a6694
--- /dev/null
@@ -0,0 +1,122 @@
+/*
+ * arch/arm/mach-tegra/tegra12_speedo.c
+ *
+ * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/bug.h>                 /* For BUG_ON.  */
+
+#include <mach/tegra_fuse.h>
+#include <mach/hardware.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+
+#include "fuse.h"
+#include "iomap.h"
+
+#define TEGRA124_CPU_SPEEDO 17777 /* FIXME: Get Correct Value */
+
+static int threshold_index;
+
+static int cpu_process_id;
+static int core_process_id;
+static int cpu_speedo_id;
+static int cpu_speedo_value;
+static int soc_speedo_id;
+static int package_id;
+static int cpu_iddq_value;
+
+static int enable_app_profiles;
+
+void tegra_init_speedo_data(void)
+{
+       cpu_speedo_value = TEGRA124_CPU_SPEEDO;
+
+       pr_info("Tegra12: CPU Speedo ID %d, Soc Speedo ID %d",
+               cpu_speedo_id, soc_speedo_id);
+}
+
+int tegra_cpu_process_id(void)
+{
+       return cpu_process_id;
+}
+
+int tegra_core_process_id(void)
+{
+       return core_process_id;
+}
+
+int tegra_cpu_speedo_id(void)
+{
+       return cpu_speedo_id;
+}
+
+int tegra_soc_speedo_id(void)
+{
+       return soc_speedo_id;
+}
+
+int tegra_package_id(void)
+{
+       return package_id;
+}
+
+int tegra_cpu_speedo_value(void)
+{
+       return cpu_speedo_value;
+}
+
+/*
+ * CPU and core nominal voltage levels as determined by chip SKU and speedo
+ * (not final - can be lowered by dvfs tables and rail dependencies; the
+ * latter is resolved by the dvfs code)
+ */
+int tegra_cpu_speedo_mv(void)
+{
+       /* Not applicable on Tegra12 */
+       return -ENOSYS;
+}
+
+int tegra_core_speedo_mv(void)
+{
+       switch (soc_speedo_id) {
+       case 0:
+               return 1100;
+       default:
+               BUG();
+       }
+}
+
+int tegra_get_cpu_iddq_value()
+{
+       return cpu_iddq_value;
+}
+
+static int get_enable_app_profiles(char *val, const struct kernel_param *kp)
+{
+       return param_get_uint(val, kp);
+}
+
+static struct kernel_param_ops tegra_profiles_ops = {
+       .get = get_enable_app_profiles,
+};
+
+module_param_cb(tegra_enable_app_profiles,
+       &tegra_profiles_ops, &enable_app_profiles, 0444);