ARM: tegra: power: Rename CPU idle rate control APIs
Alex Frid [Fri, 22 Feb 2013 06:27:44 +0000 (22:27 -0800)]
Change-Id: Id9bc9deabf8573a0743c5aafd1dc42f654b6f842
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/204413
Reviewed-on: http://git-master/r/207898
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/cpuidle-t11x.c
arch/arm/mach-tegra/cpuidle.h
arch/arm/mach-tegra/tegra11_clocks.c

index b87731d..3c11573 100644 (file)
@@ -508,11 +508,11 @@ bool tegra11x_idle_power_down(struct cpuidle_device *dev,
 
        if (clkgt_at_vmin) {
                rate = 0;
-               status = tegra11_cpu_dfll_rate_exchange(&rate);
+               status = tegra_cpu_g_idle_rate_exchange(&rate);
                if (!status) {
                        idle_stats.clk_gating_vmin++;
                        cpu_do_idle();
-                       tegra11_cpu_dfll_rate_exchange(&rate);
+                       tegra_cpu_g_idle_rate_exchange(&rate);
                        power_down = true;
                } else
                        power_down = tegra_cpu_core_power_down(dev, state,
@@ -520,14 +520,14 @@ bool tegra11x_idle_power_down(struct cpuidle_device *dev,
        } else if (!power_gating_cpu_only) {
                if (is_lp_cluster()) {
                        rate = ULONG_MAX;
-                       status = tegra_cpu_backup_rate_exchange(&rate);
+                       status = tegra_cpu_lp_idle_rate_exchange(&rate);
                }
 
                power_down = tegra_cpu_cluster_power_down(dev, state, request);
 
                /* restore cpu clock after cluster power ungating */
                if (status == 0)
-                       tegra_cpu_backup_rate_exchange(&rate);
+                       tegra_cpu_lp_idle_rate_exchange(&rate);
        } else
                power_down = tegra_cpu_core_power_down(dev, state, request);
 
index 0c080d2..7746d13 100644 (file)
@@ -45,8 +45,8 @@ int tegra2_cpuidle_init_soc(struct tegra_cpuidle_ops *ops);
 int tegra3_cpuidle_init_soc(struct tegra_cpuidle_ops *ops);
 int tegra11x_cpuidle_init_soc(struct tegra_cpuidle_ops *ops);
 int tegra14x_cpuidle_init_soc(struct tegra_cpuidle_ops *ops);
-int tegra11_cpu_backup_rate_exchange(unsigned long *rate);
-int tegra11_cpu_dfll_rate_exchange(unsigned long *rate);
+int tegra11_cpu_lp_idle_rate_exchange(unsigned long *rate);
+int tegra11_cpu_g_idle_rate_exchange(unsigned long *rate);
 
 static inline int tegra_cpuidle_init_soc(struct tegra_cpuidle_ops *ops)
 {
@@ -64,19 +64,19 @@ static inline int tegra_cpuidle_init_soc(struct tegra_cpuidle_ops *ops)
 #endif
 }
 
-static inline int tegra_cpu_dfll_rate_exchange(unsigned long *rate)
+static inline int tegra_cpu_g_idle_rate_exchange(unsigned long *rate)
 {
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
-       return tegra11_cpu_dfll_rate_exchange(rate);
+       return tegra11_cpu_g_idle_rate_exchange(rate);
 #else
        return -ENOSYS;
 #endif
 }
 
-static inline int tegra_cpu_backup_rate_exchange(unsigned long *rate)
+static inline int tegra_cpu_lp_idle_rate_exchange(unsigned long *rate)
 {
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
-       return tegra11_cpu_backup_rate_exchange(rate);
+       return tegra11_cpu_lp_idle_rate_exchange(rate);
 #else
        return -ENOSYS;
 #endif
index 639382a..db185f0 100644 (file)
@@ -7004,7 +7004,7 @@ static void tegra11_init_one_clock(struct clk *c)
 }
 
 /* Direct access to CPU clock sources fot CPU idle driver */
-int tegra11_cpu_dfll_rate_exchange(unsigned long *rate)
+int tegra11_cpu_g_idle_rate_exchange(unsigned long *rate)
 {
        int ret = 0;
        struct clk *dfll = tegra_clk_cpu_cmplx.parent->u.cpu.dynamic;
@@ -7027,7 +7027,7 @@ int tegra11_cpu_dfll_rate_exchange(unsigned long *rate)
        return ret;
 }
 
-int tegra11_cpu_backup_rate_exchange(unsigned long *rate)
+int tegra11_cpu_lp_idle_rate_exchange(unsigned long *rate)
 {
        int ret = 0;
        struct clk *backup = tegra_clk_cpu_cmplx.parent->u.cpu.backup;