ARM: tegra11: clock: Remove ISO BW double scaling
Alex Frid [Fri, 29 Mar 2013 23:47:51 +0000 (16:47 -0700)]
ISO clients bandwidth requests were scaled up twice in a row: first
to meet iso share allocation, second to account for overall memory
bandwidth efficiency. This commit applies each scale separately and
choose maximum between the two.

Change-Id: Ic5e673ac02402736a2a1fa9e4ae990edef9a4bf7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/215161
(cherry picked from commit d5a9d5e52c3e0bb7c551da1b7471a3530f713a09)
Reviewed-on: http://git-master/r/217120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/tegra11_clocks.c

index d34be12..8c40d34 100644 (file)
@@ -5143,14 +5143,13 @@ static unsigned long tegra11_clk_shared_bus_update(struct clk *bus,
                        iso_bw = (iso_bw < bus->max_rate / 100) ?
                                        (iso_bw * 100) : bus->max_rate;
                }
-               bw = max(bw, iso_bw);
                efficiency = tegra_emc_bw_efficiency;
-
                if (bw && efficiency && (efficiency < 100)) {
                        bw = bw / efficiency;
                        bw = (bw < bus->max_rate / 100) ?
                                (bw * 100) : bus->max_rate;
                }
+               bw = max(bw, iso_bw);
        }
 
        rate = override_rate ? : max(rate, bw);