Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/genesis-2.6
Russell King [Mon, 15 Mar 2010 14:27:06 +0000 (14:27 +0000)]
arch/arm/boot/compressed/misc.c
arch/arm/include/asm/elf.h
arch/arm/include/asm/pgtable-nommu.h
arch/arm/kernel/perf_event.c
arch/arm/kernel/smp.c
arch/arm/mach-at91/board-sam9g20ek.c
arch/arm/plat-samsung/include/plat/uncompress.h
drivers/video/amba-clcd.c
include/linux/amba/clcd.h

index d32bc71..d2b2ef4 100644 (file)
@@ -33,6 +33,7 @@ unsigned int __machine_arch_type;
 #else
 
 static void putstr(const char *ptr);
+extern void error(char *x);
 
 #include <mach/uncompress.h>
 
index a399bb5..bff0564 100644 (file)
@@ -98,6 +98,7 @@ extern int elf_check_arch(const struct elf32_hdr *);
 extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
 #define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
 
+struct task_struct;
 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
 #define ELF_CORE_COPY_TASK_REGS dump_task_regs
 
index 013cfcd..ffc0e85 100644 (file)
@@ -67,6 +67,7 @@ static inline int pte_file(pte_t pte) { return 0; }
  */
 #define pgprot_noncached(prot) __pgprot(0)
 #define pgprot_writecombine(prot) __pgprot(0)
+#define pgprot_dmacoherent(prot) __pgprot(0)
 
 
 /*
index 3875d99..9e70f20 100644 (file)
@@ -332,7 +332,8 @@ armpmu_reserve_hardware(void)
 
        for (i = 0; i < pmu_irqs->num_irqs; ++i) {
                err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
-                                 IRQF_DISABLED, "armpmu", NULL);
+                                 IRQF_DISABLED | IRQF_NOBALANCING,
+                                 "armpmu", NULL);
                if (err) {
                        pr_warning("unable to request IRQ%d for ARM "
                                   "perf counters\n", pmu_irqs->irqs[i]);
@@ -1624,7 +1625,7 @@ enum armv7_counters {
 /*
  * EVTSEL: Event selection reg
  */
-#define        ARMV7_EVTSEL_MASK       0x7f            /* Mask for writable bits */
+#define        ARMV7_EVTSEL_MASK       0xff            /* Mask for writable bits */
 
 /*
  * SELECT: Counter selection reg
index 57162af..577543f 100644 (file)
@@ -99,6 +99,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
        *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) |
                     PMD_TYPE_SECT | PMD_SECT_AP_WRITE);
        flush_pmd_entry(pmd);
+       outer_clean_range(__pa(pmd), __pa(pmd + 1));
 
        /*
         * We need to tell the secondary core where to find
@@ -106,7 +107,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
         */
        secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
        secondary_data.pgdir = virt_to_phys(pgd);
-       wmb();
+       __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
+       outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
 
        /*
         * Now bring the CPU into our world.
index 29cf831..c11fd47 100644 (file)
@@ -271,10 +271,12 @@ static void __init ek_add_device_buttons(void) {}
 
 
 static struct i2c_board_info __initdata ek_i2c_devices[] = {
-       {
-               I2C_BOARD_INFO("24c512", 0x50),
-               I2C_BOARD_INFO("wm8731", 0x1b),
-       },
+        {
+                I2C_BOARD_INFO("24c512", 0x50)
+        },
+        {
+                I2C_BOARD_INFO("wm8731", 0x1b)
+        },
 };
 
 
index e87ce8f..7d6ed72 100644 (file)
@@ -140,8 +140,6 @@ static void arch_decomp_error(const char *x)
 #define arch_error arch_decomp_error
 #endif
 
-static void error(char *err);
-
 #ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
 static inline void arch_enable_uart_fifo(void)
 {
index a21efcd..afe21e6 100644 (file)
@@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb)
        if (fb->board->disable)
                fb->board->disable(fb);
 
-       val = readl(fb->regs + CLCD_CNTL);
+       val = readl(fb->regs + fb->off_cntl);
        if (val & CNTL_LCDPWR) {
                val &= ~CNTL_LCDPWR;
-               writel(val, fb->regs + CLCD_CNTL);
+               writel(val, fb->regs + fb->off_cntl);
 
                clcdfb_sleep(20);
        }
        if (val & CNTL_LCDEN) {
                val &= ~CNTL_LCDEN;
-               writel(val, fb->regs + CLCD_CNTL);
+               writel(val, fb->regs + fb->off_cntl);
        }
 
        /*
@@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
         * Bring up by first enabling..
         */
        cntl |= CNTL_LCDEN;
-       writel(cntl, fb->regs + CLCD_CNTL);
+       writel(cntl, fb->regs + fb->off_cntl);
 
        clcdfb_sleep(20);
 
@@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
         * and now apply power.
         */
        cntl |= CNTL_LCDPWR;
-       writel(cntl, fb->regs + CLCD_CNTL);
+       writel(cntl, fb->regs + fb->off_cntl);
 
        /*
         * finally, enable the interface.
@@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info)
                readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
                readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
                readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
-               readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL));
+               readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 #endif
 
        return 0;
@@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb)
 {
        int ret;
 
+       /*
+        * ARM PL111 always has IENB at 0x1c; it's only PL110
+        * which is reversed on some platforms.
+        */
+       if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
+               fb->off_ienb = CLCD_PL111_IENB;
+               fb->off_cntl = CLCD_PL111_CNTL;
+       } else {
+#ifdef CONFIG_ARCH_VERSATILE
+               fb->off_ienb = CLCD_PL111_IENB;
+               fb->off_cntl = CLCD_PL111_CNTL;
+#else
+               fb->off_ienb = CLCD_PL110_IENB;
+               fb->off_cntl = CLCD_PL110_CNTL;
+#endif
+       }
+
        fb->clk = clk_get(&fb->dev->dev, NULL);
        if (IS_ERR(fb->clk)) {
                ret = PTR_ERR(fb->clk);
@@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb)
        /*
         * Ensure interrupts are disabled.
         */
-       writel(0, fb->regs + CLCD_IENB);
+       writel(0, fb->regs + fb->off_ienb);
 
        fb_set_var(&fb->fb, &fb->fb.var);
 
index 29c0448..ca16c38 100644 (file)
 #define CLCD_UBAS              0x00000010
 #define CLCD_LBAS              0x00000014
 
-#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
-#define CLCD_IENB              0x00000018
-#define CLCD_CNTL              0x0000001c
-#else
-/*
- * Someone rearranged these two registers on the Versatile
- * platform...
- */
-#define CLCD_IENB              0x0000001c
-#define CLCD_CNTL              0x00000018
-#endif
-
-#define CLCD_STAT              0x00000020
-#define CLCD_INTR              0x00000024
-#define CLCD_UCUR              0x00000028
-#define CLCD_LCUR              0x0000002C
+#define CLCD_PL110_IENB                0x00000018
+#define CLCD_PL110_CNTL                0x0000001c
+#define CLCD_PL110_STAT                0x00000020
+#define CLCD_PL110_INTR        0x00000024
+#define CLCD_PL110_UCUR                0x00000028
+#define CLCD_PL110_LCUR                0x0000002C
+
+#define CLCD_PL111_CNTL                0x00000018
+#define CLCD_PL111_IENB                0x0000001c
+#define CLCD_PL111_RIS         0x00000020
+#define CLCD_PL111_MIS         0x00000024
+#define CLCD_PL111_ICR         0x00000028
+#define CLCD_PL111_UCUR                0x0000002c
+#define CLCD_PL111_LCUR                0x00000030
+
 #define CLCD_PALL              0x00000200
 #define CLCD_PALETTE           0x00000200
 
@@ -147,6 +146,8 @@ struct clcd_fb {
        struct clcd_board       *board;
        void                    *board_data;
        void __iomem            *regs;
+       u16                     off_ienb;
+       u16                     off_cntl;
        u32                     clcd_cntl;
        u32                     cmap[16];
 };